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#
# This file is part of the coreboot project.
#
# Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
chip northbridge/intel/x4x # Northbridge
device cpu_cluster 0 on # APIC cluster
chip cpu/intel/socket_LGA775
device lapic 0 on end
end
chip cpu/intel/model_1067x # CPU
device lapic 0xACAC off end
end
end
device domain 0 on # PCI domain
subsystemid 0x1458 0x5000 inherit
device pci 0.0 on # Host Bridge
subsystemid 0x1458 0x5000
end
device pci 1.0 off end # PCI Bridge to Management Engine
device pci 2.0 on # Integrated graphics controller
subsystemid 0x1458 0xd000
end
device pci 2.1 on # Integrated graphics controller 2
subsystemid 0x1458 0xd001
end
device pci 3.0 off end # ME
device pci 3.1 off end # ME
chip southbridge/intel/i82801gx # Southbridge
register "pirqa_routing" = "0x0b"
register "pirqb_routing" = "0x0b"
register "pirqc_routing" = "0x0b"
register "pirqd_routing" = "0x0b"
register "pirqe_routing" = "0x0b"
register "pirqf_routing" = "0x0b"
register "pirqg_routing" = "0x0b"
register "pirqh_routing" = "0x0b"
register "ide_legacy_combined" = "0x0" # Combined mode broken
register "ide_enable_primary" = "0x1"
register "ide_enable_secondary" = "0x0"
register "sata_ahci" = "0x0" # AHCI does not work
register "sata_ports_implemented" = "0x3"
register "gpe0_en" = "0x40"
device pci 1b.0 on # Audio
subsystemid 0x1458 0xa002
end
device pci 1c.0 on end # PCIe 1
device pci 1c.1 on # PCIe 2 (NIC)
device pci 00.0 on # PCI 10ec:8168
subsystemid 0x1458 0xe000
end
end
device pci 1c.2 on end # PCIe 3
device pci 1c.3 on end # PCIe 4
device pci 1d.0 on # USB
subsystemid 0x1458 0x5004
end
device pci 1d.1 on # USB
subsystemid 0x1458 0x5004
end
device pci 1d.2 on # USB
subsystemid 0x1458 0x5004
end
device pci 1d.3 on # USB
subsystemid 0x1458 0x5004
end
device pci 1d.7 on # USB
subsystemid 0x1458 0x5006
end
device pci 1e.0 on end # PCI bridge
device pci 1f.0 on # ISA bridge
subsystemid 0x1458 0x5001
chip superio/ite/it8718f # Super I/O
device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
irq 0xf0 = 0x00
irq 0xf1 = 0x80
end
device pnp 2e.1 on # COM1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.2 on # COM2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.3 on # Parallel port
io 0x60 = 0x378
irq 0x70 = 7
io 0x62 = 0x000
drq 0x74 = 4
irq 0xf0 = 0x08
end
device pnp 2e.4 on # Environment controller
io 0x60 = 0x290
irq 0x70 = 0x00
io 0x62 = 0x000
irq 0xf0 = 0x80
irq 0xf1 = 0x00
irq 0xf2 = 0x0a
irq 0xf3 = 0x80
irq 0xf4 = 0x00
irq 0xf5 = 0x00
irq 0xf6 = 0xff
end
device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
irq 0x70 = 1
io 0x62 = 0x64
irq 0xf0 = 0x48
end
device pnp 2e.6 on # Mouse
irq 0x70 = 12
irq 0x71 = 2
irq 0xf0 = 0
end
end
end
device pci 1f.1 on # PATA/IDE
subsystemid 0x1458 0xb004
end
device pci 1f.2 on # SATA
subsystemid 0x1458 0xb005
end
device pci 1f.3 on # SMbus
subsystemid 0x1458 0x5001
end
device pci 1f.4 off end
device pci 1f.5 off end
device pci 1f.6 off end
end
end
end
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