blob: e53df3845efc2069d82422eec1c42e8d84ea12f9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <memlayout.h>
#include <arch/header.ld>
#include <mainboard/addressmap.h>
// Stages start after CBFS in DRAM
#define STAGES_START (QEMU_VIRT_DRAM + CONFIG_ROM_SIZE)
SECTIONS
{
// the virt target doesn't emulate flash and just puts the CBFS into DRAM.
// fake SRAM where CBFS resides. It's only done for better integration.
SRAM_START(QEMU_VIRT_DRAM)
BOOTBLOCK(QEMU_VIRT_DRAM, 64K)
// CBFS goes here
SRAM_END(STAGES_START)
DRAM_START(STAGES_START)
#if ENV_ROMSTAGE
ROMSTAGE(STAGES_START, 128K)
#endif
#if ENV_RAMSTAGE
REGION(opensbi, STAGES_START, 128K, 4K)
#endif
PRERAM_CBMEM_CONSOLE(STAGES_START + 128K, 8K)
FMAP_CACHE(STAGES_START + 136K, 2K)
RAMSTAGE(STAGES_START + 200K, 16M)
STACK(STAGES_START + 200K + 16M, 4K)
}
|
