blob: 4af23624747757e1ed5307de596438709c6bb703 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
/*
* This file is part of the coreboot project.
*
* Copyright 2019 Asami Doi <d0iasm.pub@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#include <memlayout.h>
#include <arch/header.ld>
/*
* Memory map for QEMU virt machine since
* a578cdfbdd8f9beff5ced52b7826ddb1669abbbf (June 2019):
*
* 0..128MiB (0x0000_0000..0x0080_0000) is the space for a flash device.
* 128MiB..256MiB (0x0080_0000..0x0100_0000) is used for miscellaneous device I/O.
* 256MiB..1GiB (0x0100_0000..0x4000_0000) is reserved for possible future PCI support.
* 1GiB.. (0x4000_0000) is RAM and the size depends on initial RAM and device memory settings.
*/
SECTIONS
{
REGION(flash, 0x00000000, CONFIG_ROM_SIZE, 8)
REGION(secram, 0xe000000, 0x1000000, 4096)
DRAM_START(0x40000000)
BOOTBLOCK(0x60010000, 64K)
STACK(0x60020000, 62K)
FMAP_CACHE(0x6002F800, 2K)
ROMSTAGE(0x60030000, 128K)
TTB(0x60070000, 128K)
RAMSTAGE(0x600b0000, 16M)
POSTRAM_CBFS_CACHE(0x61200000, 1M)
}
|