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## SPDX-License-Identifier: GPL-2.0-only
chip northbridge/intel/sandybridge
device cpu_cluster 0 on
chip cpu/intel/model_206ax
register "acpi_c1" = "1"
register "acpi_c2" = "3"
register "acpi_c3" = "5"
device lapic 0 on end
device lapic 0xacac off end
end
end
device domain 0 on
device pci 00.0 on end # Host bridge
device pci 01.0 on end # PCIEX16_1
device pci 02.0 on end # iGPU
chip southbridge/intel/bd82x6x
register "c2_latency" = "0x0065"
register "sata_interface_speed_support" = "0x3"
register "sata_port_map" = "0x3f"
register "spi_lvscc" = "0x2005"
register "spi_uvscc" = "0x2005"
register "superspeed_capable_ports" = "0x0000000f"
register "xhci_overcurrent_mapping" = "0x00000c03"
register "xhci_switchable_ports" = "0x0000000f"
device pci 14.0 on end # xHCI
device pci 16.0 on end # MEI #1
device pci 16.1 off end # MEI #2
device pci 16.2 off end # ME IDE-R
device pci 16.3 off end # ME KT
device pci 19.0 off end # Intel GbE
device pci 1a.0 on end # EHCI #2
device pci 1b.0 on end # HD Audio
device pci 1c.0 off end # RP #1
device pci 1c.1 off end # RP #2
device pci 1c.2 off end # RP #3
device pci 1c.3 off end # RP #4
device pci 1c.4 off end # RP #5
device pci 1c.5 off end # RP #6
device pci 1c.6 off end # RP #7
device pci 1c.7 off end # RP #8
device pci 1d.0 on end # EHCI #1
device pci 1e.0 off end # PCI bridge
device pci 1f.0 on # LPC bridge
end
device pci 1f.2 on end # SATA (AHCI)
device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA (Legacy)
device pci 1f.6 off end # Thermal
end
end
end
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