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# sample config for advansus/A785E-I
chip northbridge/amd/amdfam10/root_complex
device lapic_cluster 0 on
chip cpu/amd/socket_AM3 #L1 and DDR3
device lapic 0 on end
end
end
device domain 0 on
subsystemid 0x1043 0x843e inherit #TODO: Set the correctly subsystem id.
chip northbridge/amd/amdfam10
device pci 18.0 on # northbridge
chip southbridge/amd/rs780
device pci 0.0 on end # HT 0x9600
device pci 1.0 on end # Internal Graphics P2P bridge 0x9712
device pci 2.0 on end # PCIE P2P bridge (external graphics) 0x9603
device pci 3.0 off end # PCIE P2P bridge 0x960b
device pci 4.0 on end # PCIE P2P bridge 0x9604 wireless
device pci 5.0 off end # PCIE P2P bridge 0x9605
device pci 6.0 off end # PCIE P2P bridge 0x9606
device pci 7.0 off end # PCIE P2P bridge 0x9607
device pci 8.0 off end # NB/SB Link P2P bridge
device pci 9.0 on end # Ethernet
device pci a.0 on end # Ethernet
register "gppsb_configuration" = "4" # Configuration E
register "gpp_configuration" = "3" # Configuration D
register "port_enable" = "0x6f6"
register "gfx_dev2_dev3" = "0"
register "gfx_dual_slot" = "0"
register "gfx_lane_reversal" = "0"
register "gfx_compliance" = "0"
register "gfx_reconfiguration" = "1"
register "gfx_link_width" = "0"
register "gfx_tmds" = "1"
register "gfx_pcie_config" = "3" # 1x8 GFX on Lanes 8-15
register "gfx_ddi_config" = "1" # Lanes 0-3 DDI_SL
end
chip southbridge/amd/cimx/sb800 # it is under NB/SB Link, but on the same pci bus
device pci 11.0 on end # SATA
device pci 12.0 on end # USB
device pci 12.2 on end # USB
device pci 13.0 on end # USB
device pci 13.2 on end # USB
device pci 14.0 on # SM
chip drivers/generic/generic #dimm 0-0-0
device i2c 50 on end
end
chip drivers/generic/generic #dimm 0-0-1
device i2c 51 on end
end
chip drivers/generic/generic #dimm 0-1-0
device i2c 52 on end
end
chip drivers/generic/generic #dimm 0-1-1
device i2c 53 on end
end
end # SM
device pci 14.1 on end # IDE 0x439c
device pci 14.2 on end # HDA 0x4383
device pci 14.3 on
chip superio/ite/it8721f
device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0
irq 0x70 = 6
drq 0x74 = 2
end
device pnp 2e.1 off # Parallel Port
io 0x60 = 0x378
irq 0x70 = 7
end
device pnp 2e.2 on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.3 on # Com2
io 0x60 = 0x2f8
irq 0x70 = 3
end
device pnp 2e.5 on # Keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
irq 0x72 = 12
end
device pnp 2e.6 off # SFI
io 0x62 = 0x100
end
device pnp 2e.7 off # GPIO_GAME_MIDI
io 0x60 = 0x220
io 0x62 = 0x300
irq 0x70 = 9
end
device pnp 2e.8 off end # WDTO_PLED
device pnp 2e.9 off end # GPIO_SUSLED
device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor
io 0x60 = 0x290
irq 0x70 = 5
end
end #superio/winbond/w83627hf
end # LPC 0x439d
device pci 14.4 off end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0}
device pci 14.5 on end # USB 2
device pci 14.6 off end # Gec
device pci 15.0 on end # PCIe 0
device pci 15.1 on end # PCIe 1
device pci 15.2 on end # PCIe 2
device pci 15.3 on end # PCIe 3
device pci 16.0 on end # USB
device pci 16.2 on end # USB
#register "gpp_configuration" = "0" #4:0:0:0
#register "gpp_configuration" = "2" #2:2:0:0
#register "gpp_configuration" = "3" #2:1:1:0
register "gpp_configuration" = "4" #1:1:1:1
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
end #southbridge/amd/cimx/sb800
end # device pci 18.0
device pci 18.1 on end
device pci 18.2 on end
device pci 18.3 on end
device pci 18.4 on end
end
end #domain
end
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