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chip soc/amd/genoa
# eSPI configuration
register "common_config.espi_config" = "{
.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN,
.io_mode = ESPI_IO_MODE_SINGLE,
.op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
.crc_check_enable = 1,
.alert_pin = ESPI_ALERT_PIN_PUSH_PULL,
.periph_ch_en = 0,
.vw_ch_en = 0,
.oob_ch_en = 0,
.flash_ch_en = 0,
}"
device domain 0 on
end
end
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