blob: 8a54481681859aae617bee48e27c641f488a8f4b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
|
# SPDX-License-Identifier: GPL-2.0-only
if BOARD_AMD_MAYAN_MORGANA
config BOARD_SPECIFIC_OPTIONS
def_bool y
select BOARD_ROMSIZE_KB_16384 # Mayan actually has a 32MiB ROM
select EC_ACPI
select SOC_AMD_COMMON_BLOCK_USE_ESPI
select AMD_SOC_CONSOLE_UART
select MAINBOARD_HAS_CHROMEOS
select PCIEXP_ASPM
select PCIEXP_CLK_PM
select PCIEXP_COMMON_CLOCK
select PCIEXP_L1_SUB_STATE
select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN
config FMDFILE
default "src/mainboard/amd/mayan/chromeos.fmd" if CHROMEOS
default "src/mainboard/amd/mayan/board.fmd"
config MAINBOARD_DIR
default "amd/mayan"
config MAINBOARD_PART_NUMBER
default "Mayan_Morgana"
config DEVICETREE
default "devicetree_morgana.cb"
config AMD_FWM_POSITION_INDEX
int
default 3 if CHROMEOS
help
TODO: might need to be adapted for better placement of files in cbfs
config MAYAN_HAVE_MCHP_FW
bool "Have Microchip EC firmware?"
default n
config MAYAN_MCHP_SIG_FILE
string "Microchip EC signature file"
depends on MAYAN_HAVE_MCHP_FW
default "3rdparty/blobs/mainboard/amd/mayan/EC_mayan_sig.bin"
help
The EC sig blob is the first 4kBytes of the firmware image.
The first 4 bytes form a pointer (with CRC) to where the EC firmware
is located
config MAYAN_MCHP_FW_FILE
string "Microchip EC firmware file"
depends on MAYAN_HAVE_MCHP_FW
default "3rdparty/blobs/mainboard/amd/mayan/EC_mayan.bin"
help
The EC firmware blob is at the MAYAN_MCHP_FW_OFFSET offset of the
firmware image.
config MAYAN_MCHP_FW_OFFSET
hex
depends on MAYAN_HAVE_MCHP_FW
default 0xB80000
help
The EC firmware blob defaults to the 4MByte offset of the firmware
image. If this offset needs to change, a new signature block must be
generated with the updated offset.
config VBOOT
select VBOOT_NO_BOARD_SUPPORT
select VBOOT_SEPARATE_VERSTAGE
select VBOOT_STARTS_IN_BOOTBLOCK
config VBOOT_VBNV_OFFSET
hex
default 0x2A
config RO_REGION_ONLY
string
depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A
# Add the EFS and EC to the RO region only
# This is a mayan-specific override of soc/amd/morgana/Kconfig
default "apu/amdfw apu/ecfw"
config CHROMEOS
# Use default libpayload config
select LP_DEFCONFIG_OVERRIDE if PAYLOAD_DEPTHCHARGE
# We don't have recovery buttons, so we can't manually enable devmode.
select GBB_FLAG_FORCE_DEV_SWITCH_ON
if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig
config EFS_SPI_READ_MODE
default 3 # Quad IO (1-1-4)
config EFS_SPI_SPEED
default 0 # 66MHz
config EFS_SPI_MICRON_FLAG
default 0
config NORMAL_READ_SPI_SPEED
default 1 # 33MHz
config ALT_SPI_SPEED
default 1 # 33MHz
config TPM_SPI_SPEED
default 1 # 33MHz
endif # !EM100
endif # BOARD_AMD_MAYAN_MORGANA
|
