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##
## This file is part of the coreboot project.
##
## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; either version 2 of the License, or
## (at your option) any later version.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config BOARD_A_TREND_ATC_6220
bool "ATC-6220"
select ARCH_X86
select CPU_INTEL_SLOT_2
select NORTHBRIDGE_INTEL_I440BX
select SOUTHBRIDGE_INTEL_I82371EB
select SUPERIO_WINBOND_W83977TF
select HAVE_PIRQ_TABLE
select UDELAY_TSC
select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
select BOARD_ROMSIZE_KB_256
config MAINBOARD_DIR
string
default a-trend/atc-6220
depends on BOARD_A_TREND_ATC_6220
config MAINBOARD_PART_NUMBER
string
default "ATC-6220"
depends on BOARD_A_TREND_ATC_6220
config HAVE_OPTION_TABLE
bool
default n
depends on BOARD_A_TREND_ATC_6220
config IRQ_SLOT_COUNT
int
default 7
depends on BOARD_A_TREND_ATC_6220
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