blob: e896704e39b6535d7b2f634cd03ed9814f276dc0 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
|
## SPDX-License-Identifier: GPL-2.0-only
config MISSING_BOARD_RESET
bool
help
Selected by boards that don't provide a do_board_reset()
implementation. This activates a stub that logs the missing
board reset and halts execution.
config ROMSTAGE_ADA
bool
help
Selected by features that use Ada code in romstage.
config RAMSTAGE_ADA
bool
help
Selected by features that use Ada code in ramstage.
config RAMSTAGE_LIBHWBASE
bool
select RAMSTAGE_ADA
help
Selected by features that require `libhwbase` in ramstage.
config ROMSTAGE_LIBHWBASE
bool
select ROMSTAGE_ADA
help
Selected by features that require `libhwbase` in romstage.
config FLATTENED_DEVICE_TREE
bool
help
Selected by features that require to parse and manipulate a flattened
devicetree in ramstage.
config HAVE_SPD_IN_CBFS
bool
help
If enabled, add support for adding spd.hex files in cbfs as spd.bin
and locating it runtime to load SPD.
config DIMM_MAX
int
default 4
help
Total number of memory DIMM slots available on motherboard.
It is multiplication of number of channel to number of DIMMs per
channel
config DIMM_SPD_SIZE
int
default 256
help
Total SPD size that will be used for DIMM.
Ex: DDR3 256, DDR4 512.
config SPD_READ_BY_WORD
bool
config SPD_CACHE_IN_FMAP
bool
default n
help
Enables capability to cache DIMM SPDs in a dedicated FMAP region
to speed loading of SPD data. Currently requires board-level
romstage implementation to read/write/utilize cached SPD data.
When the default FMAP is used, will create a region named RW_SPD_CACHE
to store the cached SPD data.
config SPD_CACHE_FMAP_NAME
string
depends on SPD_CACHE_IN_FMAP
default "RW_SPD_CACHE"
help
Name of the FMAP region created in the default FMAP to cache SPD data.
if RAMSTAGE_LIBHWBASE && !ROMSTAGE_LIBHWBASE
config HWBASE_DYNAMIC_MMIO
def_bool y
endif
if ROMSTAGE_LIBHWBASE
config HWBASE_STATIC_MMIO
def_bool y
endif
if RAMSTAGE_LIBHWBASE || ROMSTAGE_LIBHWBASE
config HWBASE_DEFAULT_MMCONF
hex
default ECAM_MMCONF_BASE_ADDRESS
config HWBASE_DIRECT_PCIDEV
def_bool y
endif
config NO_FMAP_CACHE
bool
help
If your platform really doesn't want to use an FMAP cache (e.g. due to
space constraints), you can select this to disable warnings and save
a bit more code.
config ESPI_DEBUG
bool
help
This option enables eSPI library helper functions for displaying debug
information.
config NO_CBFS_MCACHE
bool
help
Disables the CBFS metadata cache. This means that your platform does
not need to provide a CBFS_MCACHE section in memlayout and can save
the associated CAR/SRAM size. In that case every single CBFS file
lookup must re-read the same CBFS directory entries from flash to find
the respective file.
config CBFS_CACHE_ALIGN
int
default 8
help
Sets the alignment of the buffers returned by the cbfs_cache.
config CBFS_PRELOAD
bool
depends on COOP_MULTITASKING
help
When enabled it will be possible to preload CBFS files into the
cbfs_cache. This helps reduce boot time by loading the files
in the background before they are actually required. This feature
depends on the read-only boot_device having a DMA controller to
perform the background transfer.
config DECOMPRESS_OFAST
bool
depends on COMPILER_GCC
default y
help
Compile the decompressing function in -Ofast instead of standard -Os
config PROBE_RAM
def_bool y if VENDOR_EMULATION
help
When enabled it will be possible to detect usable RAM using probe_ram
function.
config HAVE_CUSTOM_BMP_LOGO
def_bool n
depends on BMP_LOGO
|