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config MISSING_BOARD_RESET
bool
help
Selected by boards that don't provide a do_board_reset()
implementation. This activates a stub that logs the missing
board reset and halts execution.
config RAMSTAGE_ADA
bool
help
Selected by features that use Ada code in ramstage.
config RAMSTAGE_LIBHWBASE
bool
select RAMSTAGE_ADA
help
Selected by features that require `libhwbase` in ramstage.
config FLATTENED_DEVICE_TREE
bool
help
Selected by features that require to parse and manipulate a flattened
devicetree in ramstage.
config HAVE_SPD_IN_CBFS
bool
help
If enabled, add support for adding spd.hex files in cbfs as spd.bin
and locating it runtime to load SPD.
config DIMM_MAX
int
default 4
help
Total number of memory DIMM slots available on motherboard.
It is multiplication of number of channel to number of DIMMs per
channel
config DIMM_SPD_SIZE
int
default 256
help
Total SPD size that will be used for DIMM.
Ex: DDR3 256, DDR4 512.
config SPD_READ_BY_WORD
bool
config SPD_CACHE_IN_FMAP
bool
default n
help
Enables capability to cache DIMM SPDs in a dedicated FMAP region
to speed loading of SPD data. Currently requires board-level
romstage implementation to read/write/utilize cached SPD data.
When the default FMAP is used, will create a region named RW_SPD_CACHE
to store the cached SPD data.
config SPD_CACHE_FMAP_NAME
string
depends on SPD_CACHE_IN_FMAP
default "RW_SPD_CACHE"
help
Name of the FMAP region created in the default FMAP to cache SPD data.
if RAMSTAGE_LIBHWBASE
config HWBASE_DYNAMIC_MMIO
def_bool y
config HWBASE_DEFAULT_MMCONF
hex
default MMCONF_BASE_ADDRESS
config HWBASE_DIRECT_PCIDEV
def_bool y
endif
config NO_FMAP_CACHE
bool
help
If your platform really doesn't want to use an FMAP cache (e.g. due to
space constraints), you can select this to disable warnings and save
a bit more code.
config ESPI_DEBUG
bool
help
This option enables eSPI library helper functions for displaying debug
information.
config NO_CBFS_MCACHE
bool
help
Disables the CBFS metadata cache. This means that your platform does
not need to provide a CBFS_MCACHE section in memlayout and can save
the associated CAR/SRAM size. In that case every single CBFS file
lookup must re-read the same CBFS directory entries from flash to find
the respective file.
config CBFS_MCACHE_RW_PERCENTAGE
int
depends on VBOOT && !NO_CBFS_MCACHE
default 25 if CHROMEOS # Chrome OS stores many L10n files in RO only
default 50
help
The amount of the CBFS_MCACHE area that's used for the RW CBFS, in
percent from 0 to 100. The remaining area will be used for the RO
CBFS. Default is an even 50/50 split. When VBOOT is disabled, this
will automatically be 0 (meaning the whole MCACHE is used for RO).
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