1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
|
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef PCI_OPS_H
#define PCI_OPS_H
#include <stdint.h>
#include <device/device.h>
#include <device/pci_type.h>
#include <arch/pci_ops.h> /* IWYU pragma: export */
void __noreturn pcidev_die(void);
static __always_inline pci_devfn_t pcidev_bdf(const struct device *dev)
{
return (dev->path.pci.devfn << 12) | (dev->upstream->secondary << 20) |
(dev->upstream->segment_group << 28);
}
static __always_inline pci_devfn_t pcidev_assert(const struct device *dev)
{
if (!dev)
pcidev_die();
return pcidev_bdf(dev);
}
#if defined(__SIMPLE_DEVICE__)
#define ENV_PCI_SIMPLE_DEVICE 1
#else
#define ENV_PCI_SIMPLE_DEVICE 0
#endif
#if ENV_PCI_SIMPLE_DEVICE
/* Avoid name collisions as different stages have different signature
* for these functions. The _s_ stands for simple, fundamental IO or
* MMIO variant.
*/
#define pci_read_config8 pci_s_read_config8
#define pci_read_config16 pci_s_read_config16
#define pci_read_config32 pci_s_read_config32
#define pci_write_config8 pci_s_write_config8
#define pci_write_config16 pci_s_write_config16
#define pci_write_config32 pci_s_write_config32
#else
static __always_inline
u8 pci_read_config8(const struct device *dev, u16 reg)
{
return pci_s_read_config8(PCI_BDF(dev), reg);
}
static __always_inline
u16 pci_read_config16(const struct device *dev, u16 reg)
{
return pci_s_read_config16(PCI_BDF(dev), reg);
}
static __always_inline
u32 pci_read_config32(const struct device *dev, u16 reg)
{
return pci_s_read_config32(PCI_BDF(dev), reg);
}
static __always_inline
void pci_write_config8(const struct device *dev, u16 reg, u8 val)
{
pci_s_write_config8(PCI_BDF(dev), reg, val);
}
static __always_inline
void pci_write_config16(const struct device *dev, u16 reg, u16 val)
{
pci_s_write_config16(PCI_BDF(dev), reg, val);
}
static __always_inline
void pci_write_config32(const struct device *dev, u16 reg, u32 val)
{
pci_s_write_config32(PCI_BDF(dev), reg, val);
}
#endif
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_update_config8(pci_devfn_t dev, u16 reg, u8 mask, u8 or)
#else
static __always_inline
void pci_update_config8(const struct device *dev, u16 reg, u8 mask, u8 or)
#endif
{
u8 reg8;
reg8 = pci_read_config8(dev, reg);
reg8 &= mask;
reg8 |= or;
pci_write_config8(dev, reg, reg8);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_update_config16(pci_devfn_t dev, u16 reg, u16 mask, u16 or)
#else
static __always_inline
void pci_update_config16(const struct device *dev, u16 reg, u16 mask, u16 or)
#endif
{
u16 reg16;
reg16 = pci_read_config16(dev, reg);
reg16 &= mask;
reg16 |= or;
pci_write_config16(dev, reg, reg16);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_update_config32(pci_devfn_t dev, u16 reg, u32 mask, u32 or)
#else
static __always_inline
void pci_update_config32(const struct device *dev, u16 reg, u32 mask, u32 or)
#endif
{
u32 reg32;
reg32 = pci_read_config32(dev, reg);
reg32 &= mask;
reg32 |= or;
pci_write_config32(dev, reg, reg32);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_and_config8(pci_devfn_t dev, u16 reg, u8 andmask)
#else
static __always_inline
void pci_and_config8(const struct device *dev, u16 reg, u8 andmask)
#endif
{
pci_update_config8(dev, reg, andmask, 0);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_and_config16(pci_devfn_t dev, u16 reg, u16 andmask)
#else
static __always_inline
void pci_and_config16(const struct device *dev, u16 reg, u16 andmask)
#endif
{
pci_update_config16(dev, reg, andmask, 0);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_and_config32(pci_devfn_t dev, u16 reg, u32 andmask)
#else
static __always_inline
void pci_and_config32(const struct device *dev, u16 reg, u32 andmask)
#endif
{
pci_update_config32(dev, reg, andmask, 0);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_or_config8(pci_devfn_t dev, u16 reg, u8 ormask)
#else
static __always_inline
void pci_or_config8(const struct device *dev, u16 reg, u8 ormask)
#endif
{
pci_update_config8(dev, reg, 0xff, ormask);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_or_config16(pci_devfn_t dev, u16 reg, u16 ormask)
#else
static __always_inline
void pci_or_config16(const struct device *dev, u16 reg, u16 ormask)
#endif
{
pci_update_config16(dev, reg, 0xffff, ormask);
}
#if ENV_PCI_SIMPLE_DEVICE
static __always_inline
void pci_or_config32(pci_devfn_t dev, u16 reg, u32 ormask)
#else
static __always_inline
void pci_or_config32(const struct device *dev, u16 reg, u32 ormask)
#endif
{
pci_update_config32(dev, reg, 0xffffffff, ormask);
}
u16 pci_s_find_next_capability(pci_devfn_t dev, u16 cap, u16 last);
u16 pci_s_find_capability(pci_devfn_t dev, u16 cap);
static __always_inline
u16 pci_find_next_capability(const struct device *dev, u16 cap, u16 last)
{
return pci_s_find_next_capability(PCI_BDF(dev), cap, last);
}
static __always_inline
u16 pci_find_capability(const struct device *dev, u16 cap)
{
return pci_s_find_capability(PCI_BDF(dev), cap);
}
/*
* Determine if the given PCI device is the source of wake from sleep by checking PME_STATUS and
* PME_ENABLE bits in PM control and status register.
*
* Returns true if PCI device is wake source, false otherwise.
*/
bool pci_dev_is_wake_source(pci_devfn_t dev);
#endif /* PCI_OPS_H */
|
