blob: 6ce7f5fc7d6eaf7839ebf3aeb843830610b45a16 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
|
#ifndef CPU_X86_TSC_H
#define CPU_X86_TSC_H
#if CONFIG_TSC_SYNC_MFENCE
#define TSC_SYNC "mfence\n"
#elif CONFIG_TSC_SYNC_LFENCE
#define TSC_SYNC "lfence\n"
#else
#define TSC_SYNC
#endif
struct tsc_struct {
unsigned lo;
unsigned hi;
};
typedef struct tsc_struct tsc_t;
static inline tsc_t rdtsc(void)
{
tsc_t res;
asm volatile (
TSC_SYNC
"rdtsc"
: "=a" (res.lo), "=d"(res.hi) /* outputs */
);
return res;
}
#if !defined(__ROMCC__)
/* Too many registers for ROMCC */
static inline unsigned long long rdtscll(void)
{
unsigned long long val;
asm volatile (
TSC_SYNC
"rdtsc"
: "=A" (val)
);
return val;
}
#endif
#endif /* CPU_X86_TSC_H */
|