blob: ff0a167a0d7b4fb7009cec1103ed127c6c2fe9a6 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
|
#ifndef _CPU_INTEL_ROMSTAGE_H
#define _CPU_INTEL_ROMSTAGE_H
#include <arch/cpu.h>
void mainboard_romstage_entry(void);
/* fill_postcar_frame() is called after raminit completes and right before
* calling run_postcar_phase(). Implementation should call postcar_frame_add_mtrr()
* to tag memory ranges as cacheable to speed up execution of postcar and
* early ramstage. */
void fill_postcar_frame(struct postcar_frame *pcf);
#endif /* _CPU_INTEL_ROMSTAGE_H */
|