blob: b4fbd60f74b0144ef25f5878d58908ab17ac20c9 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
|
#ifndef _CPU_AMD_CAR_H
#define _CPU_AMD_CAR_H
#include <arch/cpu.h>
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx);
void done_cache_as_ram_main(void);
void post_cache_as_ram(void);
void cache_as_ram_switch_stack(void *stacktop);
void cache_as_ram_new_stack(void);
#if CONFIG_CPU_AMD_AGESA || CONFIG_CPU_AMD_PI
void disable_cache_as_ram(void);
#endif
void asmlinkage early_all_cores(void);
void * asmlinkage romstage_main(unsigned long bist);
void asmlinkage romstage_after_car(void);
#endif
|