blob: 0a73d829adf9833b414f8dc1e8c518097e51fb12 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
|
/* SPDX-License-Identifier: GPL-2.0-only */
#include <device/mmio.h>
#include <boot/coreboot_tables.h>
#include <console/uart.h>
#include <drivers/uart/pl011.h>
void uart_init(unsigned int idx)
{
}
void uart_tx_byte(unsigned int idx, unsigned char data)
{
struct pl011_uart *regs = uart_platform_baseptr(idx);
write8(®s->dr, data);
uart_tx_flush(idx);
}
void uart_tx_flush(unsigned int idx)
{
struct pl011_uart *regs = uart_platform_baseptr(idx);
/* FIXME: add a timeout */
while (!(read32(®s->fr) & PL011_UARTFR_TXFE))
;
}
unsigned char uart_rx_byte(unsigned int idx)
{
struct pl011_uart *regs = uart_platform_baseptr(idx);
while (read32(®s->fr) & PL011_UARTFR_RXFE)
;
return read8(®s->dr);
}
void uart_fill_lb(void *data)
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE);
serial.baud = get_uart_baudrate();
serial.regwidth = 1;
serial.input_hertz = uart_platform_refclk();
serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
}
|