1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
|
/* This file is part of the coreboot project. */
/*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "pinmux.h"
#include <device/mmio.h>
static struct am335x_pinmux_regs *regs =
(struct am335x_pinmux_regs *)(uintptr_t)AM335X_PINMUX_REG_ADDR;
void am335x_pinmux_uart0(void)
{
write32(®s->uart0_rxd, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->uart0_txd, MODE(0) | PULLUDEN);
}
void am335x_pinmux_uart1(void)
{
write32(®s->uart1_rxd, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->uart1_txd, MODE(0) | PULLUDEN);
}
void am335x_pinmux_uart2(void)
{
// UART2_RXD
write32(®s->spi0_sclk, MODE(1) | PULLUP_EN | RXACTIVE);
// UART2_TXD
write32(®s->spi0_d0, MODE(1) | PULLUDEN);
}
void am335x_pinmux_uart3(void)
{
// UART3_RXD
write32(®s->spi0_cs1, MODE(1) | PULLUP_EN | RXACTIVE);
// UART3_TXD
write32(®s->ecap0_in_pwm0_out, MODE(1) | PULLUDEN);
}
void am335x_pinmux_uart4(void)
{
// UART4_RXD
write32(®s->gpmc_wait0, MODE(6) | PULLUP_EN | RXACTIVE);
// UART4_TXD
write32(®s->gpmc_wpn, MODE(6) | PULLUDEN);
}
void am335x_pinmux_uart5(void)
{
// UART5_RXD
write32(®s->lcd_data9, MODE(4) | PULLUP_EN | RXACTIVE);
// UART5_TXD
write32(®s->lcd_data8, MODE(4) | PULLUDEN);
}
void am335x_pinmux_mmc0(int cd, int sk_evm)
{
write32(®s->mmc0_dat0, MODE(0) | RXACTIVE | PULLUP_EN);
write32(®s->mmc0_dat1, MODE(0) | RXACTIVE | PULLUP_EN);
write32(®s->mmc0_dat2, MODE(0) | RXACTIVE | PULLUP_EN);
write32(®s->mmc0_dat3, MODE(0) | RXACTIVE | PULLUP_EN);
write32(®s->mmc0_clk, MODE(0) | RXACTIVE | PULLUP_EN);
write32(®s->mmc0_cmd, MODE(0) | RXACTIVE | PULLUP_EN);
if (!sk_evm) {
// MMC0_WP
write32(®s->mcasp0_aclkr, MODE(4) | RXACTIVE);
}
if (cd) {
// MMC0_CD
write32(®s->spi0_cs1, MODE(5) | RXACTIVE | PULLUP_EN);
}
}
void am335x_pinmux_mmc1(void)
{
// MMC1_DAT0
write32(®s->gpmc_ad0, MODE(1) | RXACTIVE | PULLUP_EN);
// MMC1_DAT1
write32(®s->gpmc_ad1, MODE(1) | RXACTIVE | PULLUP_EN);
// MMC1_DAT2
write32(®s->gpmc_ad2, MODE(1) | RXACTIVE | PULLUP_EN);
// MMC1_DAT3
write32(®s->gpmc_ad3, MODE(1) | RXACTIVE | PULLUP_EN);
// MMC1_CLK
write32(®s->gpmc_csn1, MODE(2) | RXACTIVE | PULLUP_EN);
// MMC1_CMD
write32(®s->gpmc_csn2, MODE(2) | RXACTIVE | PULLUP_EN);
// MMC1_WP
write32(®s->gpmc_csn0, MODE(7) | RXACTIVE | PULLUP_EN);
// MMC1_CD
write32(®s->gpmc_advn_ale, MODE(7) | RXACTIVE | PULLUP_EN);
}
void am335x_pinmux_i2c0(void)
{
write32(®s->i2c0_sda, MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL);
write32(®s->i2c0_scl, MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL);
}
void am335x_pinmux_i2c1(void)
{
// I2C_DATA
write32(®s->spi0_d1, MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL);
// I2C_SCLK
write32(®s->spi0_cs0, MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL);
}
void am335x_pinmux_spi0(void)
{
write32(®s->spi0_sclk, MODE(0) | RXACTIVE | PULLUDEN);
write32(®s->spi0_d0, MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN);
write32(®s->spi0_d1, MODE(0) | RXACTIVE | PULLUDEN);
write32(®s->spi0_cs0, MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN);
}
void am335x_pinmux_gpio0_7(void)
{
write32(®s->ecap0_in_pwm0_out, MODE(7) | PULLUDEN);
}
void am335x_pinmux_rgmii1(void)
{
write32(®s->mii1_txen, MODE(2));
write32(®s->mii1_rxdv, MODE(2) | RXACTIVE);
write32(®s->mii1_txd0, MODE(2));
write32(®s->mii1_txd1, MODE(2));
write32(®s->mii1_txd2, MODE(2));
write32(®s->mii1_txd3, MODE(2));
write32(®s->mii1_txclk, MODE(2));
write32(®s->mii1_rxclk, MODE(2) | RXACTIVE);
write32(®s->mii1_rxd0, MODE(2) | RXACTIVE);
write32(®s->mii1_rxd1, MODE(2) | RXACTIVE);
write32(®s->mii1_rxd2, MODE(2) | RXACTIVE);
write32(®s->mii1_rxd3, MODE(2) | RXACTIVE);
}
void am335x_pinmux_mii1(void)
{
write32(®s->mii1_rxerr, MODE(0) | RXACTIVE);
write32(®s->mii1_txen, MODE(0));
write32(®s->mii1_rxdv, MODE(0) | RXACTIVE);
write32(®s->mii1_txd0, MODE(0));
write32(®s->mii1_txd1, MODE(0));
write32(®s->mii1_txd2, MODE(0));
write32(®s->mii1_txd3, MODE(0));
write32(®s->mii1_txclk, MODE(0) | RXACTIVE);
write32(®s->mii1_rxclk, MODE(0) | RXACTIVE);
write32(®s->mii1_rxd0, MODE(0) | RXACTIVE);
write32(®s->mii1_rxd1, MODE(0) | RXACTIVE);
write32(®s->mii1_rxd2, MODE(0) | RXACTIVE);
write32(®s->mii1_rxd3, MODE(0) | RXACTIVE);
write32(®s->mdio_data, MODE(0) | RXACTIVE | PULLUP_EN);
write32(®s->mdio_clk, MODE(0) | PULLUP_EN);
}
void am335x_pinmux_nand(void)
{
write32(®s->gpmc_ad0, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_ad1, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_ad2, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_ad3, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_ad4, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_ad5, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_ad6, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_ad7, MODE(0) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_wait0, MODE(0) | RXACTIVE | PULLUP_EN);
write32(®s->gpmc_wpn, MODE(7) | PULLUP_EN | RXACTIVE);
write32(®s->gpmc_csn0, MODE(0) | PULLUDEN);
write32(®s->gpmc_advn_ale, MODE(0) | PULLUDEN);
write32(®s->gpmc_oen_ren, MODE(0) | PULLUDEN);
write32(®s->gpmc_wen, MODE(0) | PULLUDEN);
write32(®s->gpmc_be0n_cle, MODE(0) | PULLUDEN);
}
|
