blob: 93ece2e27036e32d3c2267ded3a4f88c027f5cf3 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
|
config BOOTBLOCK_CPU_INIT
string
default "cpu/samsung/exynos5420/bootblock.c"
help
CPU/SoC-specific bootblock code. This is useful if the
bootblock must load microcode or copy data from ROM before
searching for the bootblock.
config EXYNOS_ACE_SHA
bool
default n
config BL1_SIZE_KB
int
default 8
# Example SRAM/iRAM map for Exynos5420 platform:
#
# 0x0202_0000: vendor-provided BL1
# 0x0202_4400: bootblock, assume up to 32KB in size
# 0x0203_0000: romstage, assume up to 128KB in size.
# 0x0207_4000: stack pointer
config BOOTBLOCK_BASE
hex
default 0x02024400
config ROMSTAGE_BASE
hex
default 0x02030000
config ROMSTAGE_SIZE
hex
default 0x10000
# Stack may reside in either IRAM or DRAM. We will define it to live
# at the top of IRAM for now.
#
# Stack grows downward, push operation stores register contents in
# consecutive memory locations ending just below SP
config STACK_TOP
hex
default 0x02074000
config STACK_BOTTOM
hex
default 0x02073000
config STACK_SIZE
hex
default 0x1000
config CBFS_ROM_OFFSET
# Calculated by BL1 + max bootblock size.
hex "offset of CBFS data in ROM"
default 0x0A000
# TODO Change this to some better address not overlapping bootblock when
# cbfstool supports creating header in arbitrary location.
config CBFS_HEADER_ROM_OFFSET
hex "offset of master CBFS header in ROM"
default 0x2040
# TODO We may probably move this to board-specific implementation files instead
# of KConfig values.
config CBFS_CACHE_ADDRESS
hex "memory address to put CBFS cache data"
default 0x02060000
config CBFS_CACHE_SIZE
hex "size of CBFS cache data"
default 0x000013000
# FIXME: other magic numbers that should probably go away
config XIP_ROM_SIZE
hex
default ROMSTAGE_SIZE
config SYS_SDRAM_BASE
hex
default 0x20000000
config SYS_TEXT_BASE
hex
default 0x23e00000
config COREBOOT_TABLES_SIZE
hex
default 0x4000000
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART3
depends on CONSOLE_SERIAL_UART
config CONSOLE_SERIAL_UART0
bool "UART0"
help
Serial console on UART0
config CONSOLE_SERIAL_UART1
bool "UART1"
help
Serial console on UART1
config CONSOLE_SERIAL_UART2
bool "UART2"
help
Serial console on UART2
config CONSOLE_SERIAL_UART3
bool "UART3"
help
Serial console on UART3
endchoice
config CONSOLE_SERIAL_UART_ADDRESS
hex
depends on CONSOLE_SERIAL_UART
default 0x12c00000 if CONSOLE_SERIAL_UART0
default 0x12c10000 if CONSOLE_SERIAL_UART1
default 0x12c20000 if CONSOLE_SERIAL_UART2
default 0x12c30000 if CONSOLE_SERIAL_UART3
help
Map the UART names to the respective MMIO address.
|
