aboutsummaryrefslogtreecommitdiff
path: root/src/cpu/intel/model_6dx/acpi/cpu.asl
blob: 04438a227aa008fb219328c5dd82ea752522cf80 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
/* These come from the dynamically created CPU SSDT */
External(PDC0)
External(PDC1)

// Power notification

External (\_PR_.CP00, DeviceObj)
External (\_PR_.CP01, DeviceObj)
External (\_PR_.CP00._PPC)
External (\_PR_.CP01._PPC)

Method (PNOT)
{
	If (MPEN) {
		If(And(PDC0, 0x08)) {
			Notify (\_PR_.CP00, 0x80)	 // _PPC

			If (And(PDC0, 0x10)) {
				Sleep(100)
				Notify(\_PR_.CP00, 0x81) // _CST
			}
		}

		If(And(PDC1, 0x08)) {
			Notify (\_PR_.CP01, 0x80)	 // _PPC
			If (And(PDC1, 0x10)) {
				Sleep(100)
				Notify(\_PR_.CP01, 0x81) // _CST
			}
		}

	} Else { // UP
		Notify (\_PR_.CP00, 0x80)
		Sleep(0x64)
		Notify(\_PR_.CP00, 0x81)
	}
}