src/cpu/intel/model_106cx/Makefile.inc


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ramstage-y += model_106cx_init.c
subdirs-y += ../../x86/name

cpu_incs-y += $(src)/cpu/intel/car/cache_as_ram_ht.inc
romstage-y += ../car/romstage.c
cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin