index
:
coreboot.git
macbookair5_2
macbookpro10_1
main
master
mbp101_medisable
mbp101_medisable_1
mbp82
x230
my copy of coreboot
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refs
log
tree
commit
diff
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author
committer
range
path:
root
/
src
/
cpu
/
amd
/
car
Mode
Name
Size
-rw-r--r--
cache_as_ram.inc
10288
log
plain
-rw-r--r--
disable_cache_as_ram.c
1629
log
plain
-rw-r--r--
post_cache_as_ram.c
3630
log
plain