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|
menu "Console"
config BOOTBLOCK_CONSOLE
bool "Enable early (bootblock) console output."
depends on ARCH_ARM
default n
help
Use console during the bootblock if supported
config SQUELCH_EARLY_SMP
bool "Squelch AP CPUs from early console."
default y
help
When selected only the BSP CPU will output to early console.
Console drivers have unpredictable behaviour if multiple threads
attempt to share the same resources without a spinlock.
If unsure, say Y.
config CONSOLE_SERIAL
bool "Serial port console output"
default y
depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL
help
Send coreboot debug output to a serial port.
The type of serial port driver selected based on your configuration is
shown on the following menu line. Supporting multiple different types
of UARTs in one build is not supported.
if CONSOLE_SERIAL
comment "I/O mapped, 8250-compatible"
depends on DRIVERS_UART_8250IO
comment "memory mapped, 8250-compatible"
depends on DRIVERS_UART_8250MEM
comment "device-specific UART"
depends on HAVE_UART_SPECIAL
config UART_FOR_CONSOLE
int "Index for UART port to use for console"
default 0
# FIXME: Early programming in romstage is incorrect as we should
# program different LDN to actually change the physical port.
config TTYS0_BASE
hex
depends on DRIVERS_UART
default 0x3f8 if UART_FOR_CONSOLE = 0
default 0x2f8 if UART_FOR_CONSOLE = 1
default 0x3e8 if UART_FOR_CONSOLE = 2
default 0x2e8 if UART_FOR_CONSOLE = 3
help
Map the COM port number to the respective I/O port.
choice
prompt "Baud rate"
default CONSOLE_SERIAL_115200
config CONSOLE_SERIAL_115200
bool "115200"
help
Set serial port Baud rate to 115200.
config CONSOLE_SERIAL_57600
bool "57600"
help
Set serial port Baud rate to 57600.
config CONSOLE_SERIAL_38400
bool "38400"
help
Set serial port Baud rate to 38400.
config CONSOLE_SERIAL_19200
bool "19200"
help
Set serial port Baud rate to 19200.
config CONSOLE_SERIAL_9600
bool "9600"
help
Set serial port Baud rate to 9600.
endchoice
#FIXME(dhendrix): Change name to SERIAL_BAUD? (Stefan sayz: yes!!)
config TTYS0_BAUD
int
default 115200 if CONSOLE_SERIAL_115200
default 57600 if CONSOLE_SERIAL_57600
default 38400 if CONSOLE_SERIAL_38400
default 19200 if CONSOLE_SERIAL_19200
default 9600 if CONSOLE_SERIAL_9600
help
Map the Baud rates to an integer.
# TODO: Allow user-friendly selection of settings other than 8n1.
config TTYS0_LCS
int
default 3
depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM
endif # CONSOLE_SERIAL
config SPKMODEM
bool "spkmodem (console on speaker) console output"
default n
help
Send coreboot debug output through speaker
config CONSOLE_USB
bool "USB dongle console output"
depends on USBDEBUG
default n
help
Send coreboot debug output to USB.
Configuration for USB hardware is under menu Generic Drivers.
# TODO: Deps?
# TODO: Improve description.
config ONBOARD_VGA_IS_PRIMARY
bool "Use onboard VGA as primary video device"
default n
help
If not selected, the last adapter found will be used.
config CONSOLE_NE2K
bool "Network console over NE2000 compatible Ethernet adapter"
default n
help
Send coreboot debug output to a Ethernet console, it works
same way as Linux netconsole, packets are received to UDP
port 6666 on IP/MAC specified with options bellow.
Use following netcat command: nc -u -l -p 6666
config CONSOLE_NE2K_DST_MAC
depends on CONSOLE_NE2K
string "Destination MAC address of remote system"
default "00:13:d4:76:a2:ac"
help
Type in either MAC address of logging system or MAC address
of the router.
config CONSOLE_NE2K_DST_IP
depends on CONSOLE_NE2K
string "Destination IP of logging system"
default "10.0.1.27"
help
This is IP address of the system running for example
netcat command to dump the packets.
config CONSOLE_NE2K_SRC_IP
depends on CONSOLE_NE2K
string "IP address of coreboot system"
default "10.0.1.253"
help
This is the IP of the coreboot system
config CONSOLE_NE2K_IO_PORT
depends on CONSOLE_NE2K
hex "NE2000 adapter fixed IO port address"
default 0xe00
help
This is the IO port address for the IO port
on the card, please select some non-conflicting region,
32 bytes of IO spaces will be used (and align on 32 bytes
boundary, qemu needs broader align)
config CONSOLE_CBMEM
bool "Send console output to a CBMEM buffer"
default n
help
Enable this to save the console output in a CBMEM buffer. This would
allow to see coreboot console output from Linux space.
config CONSOLE_CBMEM_BUFFER_SIZE
depends on CONSOLE_CBMEM
hex "Room allocated for console output in CBMEM"
default 0x10000
help
Space allocated for console output storage in CBMEM. The default
value (64K or 0x10000 bytes) is large enough to accommodate
even the BIOS_SPEW level.
config CONSOLE_CAR_BUFFER_SIZE
depends on CONSOLE_CBMEM
hex "Room allocated for console output in Cache as RAM"
default 0xc00
help
Console is used before RAM is initialized. This is the room reserved
in the DCACHE based RAM to keep console output before it can be
saved in a CBMEM buffer. 3K bytes should be enough even for the
BIOS_SPEW level.
config CONSOLE_QEMU_DEBUGCON
bool "QEMU debug console output"
depends on BOARD_EMULATION_QEMU_X86
default y
help
Send coreboot debug output to QEMU's isa-debugcon device:
qemu-system-x86_64 \
-chardev file,id=debugcon,path=/dir/file.log \
-device isa-debugcon,iobase=0x402,chardev=debugcon
config CONSOLE_QEMU_DEBUGCON_PORT
hex "QEMU debug console port"
depends on CONSOLE_QEMU_DEBUGCON
default 0x402
choice
prompt "Default console log level"
default DEFAULT_CONSOLE_LOGLEVEL_8
config DEFAULT_CONSOLE_LOGLEVEL_8
bool "8: SPEW"
help
Way too many details.
config DEFAULT_CONSOLE_LOGLEVEL_7
bool "7: DEBUG"
help
Debug-level messages.
config DEFAULT_CONSOLE_LOGLEVEL_6
bool "6: INFO"
help
Informational messages.
config DEFAULT_CONSOLE_LOGLEVEL_5
bool "5: NOTICE"
help
Normal but significant conditions.
config DEFAULT_CONSOLE_LOGLEVEL_4
bool "4: WARNING"
help
Warning conditions.
config DEFAULT_CONSOLE_LOGLEVEL_3
bool "3: ERR"
help
Error conditions.
config DEFAULT_CONSOLE_LOGLEVEL_2
bool "2: CRIT"
help
Critical conditions.
config DEFAULT_CONSOLE_LOGLEVEL_1
bool "1: ALERT"
help
Action must be taken immediately.
config DEFAULT_CONSOLE_LOGLEVEL_0
bool "0: EMERG"
help
System is unusable.
endchoice
config DEFAULT_CONSOLE_LOGLEVEL
int
default 0 if DEFAULT_CONSOLE_LOGLEVEL_0
default 1 if DEFAULT_CONSOLE_LOGLEVEL_1
default 2 if DEFAULT_CONSOLE_LOGLEVEL_2
default 3 if DEFAULT_CONSOLE_LOGLEVEL_3
default 4 if DEFAULT_CONSOLE_LOGLEVEL_4
default 5 if DEFAULT_CONSOLE_LOGLEVEL_5
default 6 if DEFAULT_CONSOLE_LOGLEVEL_6
default 7 if DEFAULT_CONSOLE_LOGLEVEL_7
default 8 if DEFAULT_CONSOLE_LOGLEVEL_8
help
Map the log level config names to an integer.
config NO_POST
bool "Don't show any POST codes"
default n
config CMOS_POST
bool "Store post codes in CMOS for debugging"
depends on !NO_POST && PC80_SYSTEM
default n
help
If enabled, coreboot will store post codes in CMOS and switch between
two offsets on each boot so the last post code in the previous boot
can be retrieved. This uses 3 bytes of CMOS.
config CMOS_POST_OFFSET
hex "Offset into CMOS to store POST codes"
depends on CMOS_POST
default 0
help
If CMOS_POST is enabled then an offset into CMOS must be provided.
If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value
defined in the mainboard option table.
config CMOS_POST_EXTRA
bool "Store extra logging info into CMOS"
depends on CMOS_POST
default n
help
This will enable extra logging of work that happens between post
codes into CMOS for debug. This uses an additional 8 bytes of CMOS.
config CONSOLE_POST
bool "Show POST codes on the debug console"
depends on !NO_POST
default n
help
If enabled, coreboot will additionally print POST codes (which are
usually displayed using a so-called "POST card" ISA/PCI/PCI-E
device) on the debug console.
config POST_DEVICE
bool "Send POST codes to an external device"
depends on !NO_POST
default y
choice
prompt "Device to send POST codes to"
depends on POST_DEVICE
default POST_DEVICE_NONE
config POST_DEVICE_NONE
bool "None"
config POST_DEVICE_LPC
bool "LPC"
config POST_DEVICE_PCI_PCIE
bool "PCI/PCIe"
endchoice
config POST_IO
bool "Send POST codes to an IO port"
depends on PC80_SYSTEM && !NO_POST
default y
help
If enabled, POST codes will be written to an IO port.
config POST_IO_PORT
depends on POST_IO
hex "IO port for POST codes"
default 0x80
help
POST codes on x86 are typically written to the LPC bus on port
0x80. However, it may be desirable to change the port number
depending on the presence of coprocessors/microcontrollers or if the
platform does not support IO in the conventional x86 manner.
endmenu
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