blob: fb5d13fe75162c4375688dc30f128b03fa25ba31 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
|
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef ARCH_CPU_INTERNAL_H
#define ARCH_CPU_INTERNAL_H
/*
* Do the necessary work to prepare for secondary CPUs coming up. The
* SoC will call this function before bringing up the other CPUs. The
* entry point for the seoncdary CPUs is returned.
*/
void *prepare_secondary_cpu_startup(void);
/*
* Code path for the non-BSP CPUs. This is an internal function used.
*/
void arch_secondary_cpu_init(void);
/* Return the top of the stack for the specified cpu. */
void *cpu_get_stack(unsigned int cpu);
/* Return the top of the exception stack for the specified cpu. */
void *cpu_get_exception_stack(unsigned int cpu);
#endif /* ARCH_CPU_INTERNAL_H */
|