blob: d50ff4e74f78b21702ee62ce36768ef56b813b02 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
|
<!DOCTYPE html>
<html>
<head>
<title>Board</title>
</head>
<body>
<h1>x86 Board Development</h1>
<p>
Board development requires System-on-a-Chip (SoC) support.
The combined steps are listed
<a target="_blank" href="../development.html">here</a>.
The development steps for the board are listed below:
</p>
<ol>
<li><a href="#RequiredFiles">Required Files</a></li>
<li>Enable <a href="#SerialOutput">Serial Output</a></li>
</ol>
<hr>
<h1><a name="RequiredFiles">Required Files</a></h1>
<p>
Create the board directory as src/mainboard/<Vendor>/<Board>.
</p>
<p>
The following files are required to build a new board:
</p>
<ol>
<li>Kconfig.name - Defines the Kconfig value for the board</li>
<li>Kconfig
<ol type="A">
<li>Selects the SoC for the board and specifies the SPI flash size
<ol type="I">
<li>BOARD_ROMSIZE_KB_<Size></li>
<li>SOC_<Vendor>_<Chip Family></li>
</ol>
</li>
<li>Declare the Kconfig values for:
<ol type="I">
<li>MAINBOARD_DIR</li>
<li>MAINBOARD_PART_NUMBER</li>
<li>MAINBOARD_VENDOR</li>
</ol>
</li>
</ol>
</li>
<li>devicetree.cb - Enable root bridge and serial port
<ol type="A">
<li>The first line must be "chip soc/Intel/<soc family>";
this path is used by the generated static.c to include the chip.h
header file
</li>
</ol>
</li>
<li>romstage.c
<ol type="A">
<li>Add routine mainboard_romstage_entry which calls romstage_common</li>
</ol>
</li>
<li>Configure coreboot build:
<ol type="A">
<li>Set LOCALVERSION</li>
<li>FLASHMAP_OFFSET = 0x00700000</li>
<li>Select vendor for the board</li>
<li>Select the board</li>
<li>CBFS_SIZE = 0x00100000</li>
<li>Set the CPU_MICROCODE_CBFS_LEN</li>
<li>Set the CPU_MICROCODE_CBFS_LOC</li>
<li>Set the FSP_IMAGE_ID_STRING</li>
<li>Set the FSP_LOC</li>
<li>Disable GOP_SUPPORT</li>
<li>No payload</li>
<li>Choose the default value for all other options</li>
</ol>
</li>
</ol>
<hr>
<h1><a name="SerialOutput">Enable Serial Output</a></h1>
<p>
Use the following steps to enable serial output:
</p>
<ol>
<li>Implement the car_mainboard_pre_console_init routine in the com_init.c
file:
<ol type="A">
<li>Power on and enable the UART controller</li>
<li>Connect the UART receive and transmit data lines to the
appropriate SoC pins
</li>
</ol>
</li>
<li>Add Makefile.inc
<ol type="A">
<li>Add com_init.c to romstage</li>
</ol>
</li>
</ol>
<hr>
<p>Modified: 31 January 2016</p>
</body>
</html>
|