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2008-10-28Allow superiotool to compile and work on FreeBSD. Tested on FreeBSD 7.Andriy Gapon
Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-28Mark Winbond W39V040FA" (512 KB) as fully supported, tested byUwe Hermann
Martin Stecklum <stecky@gmx.net> (both write and erase). The tests were done on an MSI MS-7065 board, so that's supported now too (wiki page will be updated). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3697 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-28Add support for the Intel 82371MX (MPIIX) southbridge (trivial).Uwe Hermann
Untested, but should work just as well as the other *PIIX* southbridges according to the datasheets. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3696 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-26Add support for the Intel 82371FB PIIX and 82371SB (PIIX3) southbridges.Uwe Hermann
Tested on PIIX3 hardware. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3694 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-25Add support for the VIA VT82C586A/B chipset, improve documentation.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-23Add support for the ITE IT8661F/IT8770F, IT8673F, and IT8671F/IT8687R.Urja Rannikko
They all use a different init sequence than the more modern ITE Super I/Os. For now we only use 0x370 as config port, but 0x3f0 or 0x3bd would also be valid. Contrary to other Super I/Os, the config port for these is _not_ hardcoded via hardware, instead it can be programmed by software, i.e. you get to choose whether you want to use 0x370, 0x3f0, or 0x3bd. Tested on IT8671F by Uwe Hermann and on IT8770F by Urja Rannikko. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3692 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-21Reduce serial output, otherwise flashing will fail very often (trivial).Uwe Hermann
This has been tested on hardware by me. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-19Add register definitions for W83627HF based on publicly availableAndriy Gapon
specification and local testing. Also tweak a little bit algorithm for (internal) device ID calculation: Chips from the W83627HF/F/HG/G family have an ID of 0x52 and a multitude of revisions (0x1x, 0x3a, 0x41, maybe more), chips from the W83627HF/GF family have the same device ID but revisions 0xfx. Please note that the last line of the patch simply fixes the comment about internal device ID composition (upper half of reg 0x21 is used). I chose the most conservative way of detecting W83627HF - only if reg 0x21 value matches 0xFx we skip the previous logic and keep using it for all other revisions. Signed-off-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-18Coding-style fixes for flashrom, partly indent-aided (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-18flashrom: Allow the SiS 620 chipset to detect and read at least 256kb chips.Urja Rannikko
Based on the 5595 datasheet and uniflash 1.40 sources, only looking for info about SiS620. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3668 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-15SB600 has four write once LPC ROM protect areas. It is not possible to writeMarc Jones
enable that area once the register is set so print a warning. Signed-off-by: Marc Jones <marcj.jones@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3659 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14Drop global register 0x07 for all Super I/Os (trivial).Uwe Hermann
This is useless, as it changes with each access; it doesn't convey any useful information at all. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-14Add dump support to ITE IT8726F, and add comments and a missing GPIOJosh Profitt
register to ITE IT8718F. Signed-off-by: Josh Profitt <zorn169@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-10Add ICH10 support to flashrom.Carl-Daniel Hailfinger
The ICH9 and ICH10 data sheets are identical regarding FWH/SPI flash interfaces, so this just adds the required PCI IDs. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-10flashrom: Check that a filename was specified also when using force readPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-09Add Fintek F71882FG support (trivial).Uwe Hermann
Tested on actual hardware, the MSI K9AG Neo2-Digital (MS-7368). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-07Support for AM29F002(N)B[BT]. Fully tested on AM29F002NBT.Mats Erik Andersson
Probing, reading, and erasing use the Jedec-routines, whereas writing resort to the recent write_en29f002a(), since also these chips use a byte wise algorithm. Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-01Add some more Super I/O IDs/names (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-30Add an abuild command line option for -fno-stack-protect for toolchains that ↵Marc Jones
might require it. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-30This patch fixes support for the AT49F002N(T) chip in the flashrom tool.Tim ter Laak
It replaces the write function to one based on write_byte_program_jedec() instead of write_page_write_jedec(), as this part does not support page programming. I have verified the NT variant to fully work now, and adjusted the test status accordingly. The N variant *should* also work with this patch, but remains untested. Signed-off-by: Tim ter Laak <timl@scintilla.utwente.nl> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-30flashrom: ST M29F040B status TEST_OK_ PROBE READ ERASE WRITEPeter Stuge
Per report from Daniel Lindenaar. Thanks! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-29flashrom: Fix typo in r3615 (TEST_PREW -> TEST_OK_PREW)Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-29Mark the SyncMOS S29C51002T as working (trivial).Uwe Hermann
All operations tested by me on hardware. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-27Add string support to nvramtool.Stefan Reinauer
To add a string to your cmos.layout, you need to specify type 's': #start len type unused name 416 512 s 0 boot_devices With this patch you can do $ nvramtool -w boot_devices="(hd0,0);(hd2,1);(hd3)" And FILO will attempt to load a menu.lst from any of these devices in that order. The patch is not exactly pretty, but a cleaner solution might have resulted in a complete rewrite of the tool, which I did not want. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-26Activate proper support for EN29F002(A)(N)[BT].Mats Erik Andersson
Fully tested for Probe/Read/Erase/Write on EN29F002NT. Jedec subroutines 'probe_jedec()' and 'erase_chip_jedec()' are still in use, but a tailored 'write_en29f002a()' is needed due to a byte wise writing mechanism for this chip. Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3602 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-18fix two minor bugs in nvramtool. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-10flashrom: Winbond W49V002A TEST_OK_ PROBE READ ERASE WRITEPeter Stuge
Per report from Kevin O'Connor. Thanks Kevin! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3570 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-07flashrom: Debug print actual time base calculated by myusec_calibrate_delay()Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-04This changes the python generated makefilesCarl-Daniel Hailfinger
targets/*/*/Makefile targets/*/*/normal/Makefile targets/*/*/fallback/Makefile to use a common copy of romcc, and to leave this compiler untouched by 'make clean' in targets/*/*/fallback/ and targets/*/*/normal/ . 'make clean' in targets/*/*/ will clean romcc. Thanks to Mats for the initial idea and implementation of a tool to do this. This patch has almost the same behaviour as the original tool without having to run the tool each time. Tested for abuild-friendliness. The patch saves ~10-12 seconds for every target using romcc. For a full abuild run, this is ~20% time saved. For the first 38 abuild targets, total build time is down to 13m24s instead of 16m22s on my machine. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-03flashrom: Only find "unknown .. SPI chip" if no other chip was foundPeter Stuge
This removes the false positive matches we've been seeing, and also removes the true positive match in case there is more than one flash chip and the 2nd or 3rd are unknown - but I think that case is uncommon enough to warrant the improvement in the common case. Use flashrom -frc forced read if you have the uncommon case, and/or please add the flash chip to the flashchips array. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3562 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-09-02flashrom: SST49LF016C TEST_OK_ PROBE READ ERASE WRITEPeter Stuge
Per test report from Bari Ari. Thanks! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-27flashrom: SST25VF016B TEST_OK_ PROBE READ ERASE WRITEPeter Stuge
Per test report from Ward. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-20flashrom: Recognize the Intel EP80579 LPC flash interface.Ed Swierk
Signed-off-by: Ed Swierk <eswierk@arastra.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-20split the one file, as the several printing functions will continue to growStefan Reinauer
immensly when they know more systems / cpus / chipsets Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-20use seperate array for core 2 cpus (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3530 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-19Add support for MSI KT4V to flashrom. The KT4V is autodetected and supportsSean Nelson
the KT3 Ultra 2 with "-m msi:kt4v" (but is not autodetected, yet). Signed-off-by: Sean Nelson <snelson@nmt.edu> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-18inteltool: match cpuid before attempting to print MSRs (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3514 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-15fix typo in superiotool (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-12flashrom: Fix error -EINVAL on mmap()Segher Boessenkool
Don't calculate "flash_baseaddr" until the final value of "size" is known, otherwise we end up trying to map a page right after the end of memory. Fixes #112. Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3502 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-08flashrom: ST M50FW040 TEST_OK PROBE READ ERASE WRITEPeter Stuge
Per test report from Marcel Konrad. Thanks! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-06Add the contents of buildrom'sWard Vandewege
packages/mkelfimage/mkelfimage-autoconf.patch packages/mkelfimage/mkelfImage-2.7-x86_64.patch to our svn copy of mkelfimage. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Jordan Crouse <jordan.crouse@amd.com> These are the original commit messages from the buildrom svn tree: ----------------------------------------------------------------------- r61 | jcrouse | 2007-11-28 13:06:23 -0500 (Wed, 28 Nov 2007) | 9 lines [BUILDROM] Fixup mkelfimage My patch makes it so all targets use vmlinux and 2.7. Including the mkelfimage patch from Yhinghai Lu. Signed-off-by: Myles Watson <myles@pel.cs.byu.edu> Acked-by: Jordan Crouse <jordan.crouse@amd.com> ------------------------------------------------------------------------ r80 | jcrouse | 2007-12-10 13:56:40 -0500 (Mon, 10 Dec 2007) | 8 lines [BUILDROM] Fix breakage in the new mkelfimage autoconf scripts Whack the autoconf scripts in mkelfimage to allow us to pass our stack protection flags in. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> ------------------------------------------------------------------------ git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02update copyright year (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3464 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-02tested another intel chip (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3462 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01fix build warnings for buildrom (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-08-01fix typos in config.g, and don't arbitrarily hide some build informationStefan Reinauer
(doesn't make sense in v2). For silent build, use make -s (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3438 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-21flashrom: Winbond W39V040C and MSI K8T Neo2-FPeter Stuge
W39V040C does standard JEDEC commands except chip erase so add a small driver. probe_w39v040c() prints the block lock pin status when a chip is found. The Neo2 board enable matches on 8237-internal IDE and onboard NIC PCI IDs. Many thanks to Daniel McLellan for testing all of this on hardware! Build tested by Uwe. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3431 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19superiotool: add support for SMSC SIO10N268 (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3429 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-19add support for 2 new SMSC superio chips. Information is a bit ambiguousStefan Reinauer
and scattered within the datasheets. (trivial patch) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-11Fix and clean up coreboot image detection heuristic.Carl-Daniel Hailfinger
Additional compile fix for NetBSD. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-07flashrom: Trivial SPI cleanupsPeter Stuge
While writing a new SPI driver I fixed some things in the SPI code: All calls to spi_command() had unneccessary #define duplications, and in some cases the read count define could theoretically become harmful because NULL was passed for the read buffer. Avoid a crash, should someone change the #defines. I also noticed that the only caller of spi_page_program() was the it87 driver, and spi_page_program() could only call back into the it87 driver. Removed the function for easier-to-follow code and made it8716f_spi_page_program() static. The ichspi driver's static page functions are already static. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-07flashrom: Trivial indent fix in ichspi.cPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3417 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-06r3415 removed symbolic constants for device IDs by accident.Carl-Daniel Hailfinger
flash.h is a database of known IDs, whereas flashchips.c is a database of chips for which support has been implemented. Keep it that way. Trivial. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3416 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-06flashrom: Add AMIC A29002Andreas Thienemann
This patch adds support to the AMIC A29002 chip in its top and bottom configuration to flashrom. Additionally, the alphabetic order of the AMIC chips was fixed. The datasheet is at <http://www.amictechnology.com/pdf/A29002.pdf>. A29002T PREW functionality was tested and works. This flash chip has asymmetric sector layout so it is important to use the mx29f002 driver, which does chip erase before writing, rather than am29f040b, which uses sector erase. Signed-off-by: Andreas Thienemann <andreas@bawue.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3415 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-05Adding support for flashing system with Nvidia MCP67Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3414 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-05flashrom: Add PCI IDs for EPIA-CNPeter Stuge
Uses the 0.0 Host bridge CN700/VN800/P4M800CE/Pro and 11.0 ISA bridge devices with their 1106:aa08 subsystem id:s for autodetection. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3413 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03Minor cosmetics, e.g. make stuff fit in 80 chars/line etc. (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03Mark SST49LF040B as tested.Carl-Daniel Hailfinger
Thanks to Paul Seidler and Ward Vandewege for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3411 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03Mark the SST SST49LF040 as OK (tested by me), all operations (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3410 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03flashrom: Winbond W25x80 TEST_OK PROBE READ ERASE WRITEPeter Stuge
Per test report from Björn Gerhart. Thanks! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3409 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-03Improve coreboot image detection heuristic in flashrom. It's notCarl-Daniel Hailfinger
absolutely perfect, but the likelihood of this check to fail is 0.000000000000000000000000013 (1.3*10^-26) which is good enough for me. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3408 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02flashrom: probe_flash() cleanup for better code readabilityPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3407 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02set w39v080fa to fully supported. I'm am flashing this chip several times aStefan Reinauer
day. Also enable unlocking which is only needed when running coreboot, that slipped in the original commit and through the original review ;-) So it must be trivial enough. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3406 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02flashrom: Update to TEST_OK for Winbond W39V040FA PROBE READPeter Stuge
Thanks to Jake for the test report! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3405 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02flashrom: Don't rm *~ in make clean, who knows what files that could bePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02flashrom: Unknown vendor:board message can be triggered by -m tooPeter Stuge
Thanks to Stefan for pointing this one out. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3403 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-07-02flashrom: Case insensitive matching of vendor:board strings in coreboot tablePeter Stuge
Needed at least for GIGABYTE:m57sli in coreboot to match gigabyte:m57sli in flashrom. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30First attempt to clean up SPI probing and create a commonStefan Reinauer
construct: the flash bus. At some point the flash bus will be part of struct flashchip. Pardon me for pushing this in, but I think it is important to beware of further decay and it will improve things for other developers in the short run. Carl-Daniel, I will consider your suggestions in another patch. I want to keep things from getting too much for now. The patch includes Rudolf's VIA SPI changes though. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3401 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30Mine AMIC flash chip needs 4 bytes RDID. This enables to use the new probing ↵Rudolf Marek
code. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3400 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30Mine AMIC flash chip needs 4 bytes RDID. Following patch adds support for that.Rudolf Marek
Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3399 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-30This patch adds support for VIA SPI controller on VT8237S. It is similar withRudolf Marek
few documented exceptions to ICH7 SPI controller. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-29Add a debug marker after ICH SPI opcode programming.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-29flashrom: Fix ICH7 non-SPI that broke in r3393Peter Stuge
r3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back to 0 when BOOT BIOS Straps indicate something else than SPI. Also fixes a build error in ichspi.c with gcc 4.2.2. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-28Use symbolic constants for PCI subsystem probing in flashrom.Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3394 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-27* ICH7 SPI supportStefan Reinauer
* fix some variable names in ichspi.c (Offset -> offset) * Dump ICH7 SPI bar with -V * Improve error message in case IOPL goes wrong. (It might not even be an IOPL) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3393 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-27indent according to development guidelines (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-26Winbond W39V080FA: Probe and Read are OK.Jens Kühnel
Signed-off-by: Jens Kühnel <coreboot@jens.kuehnel.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24flashrom: Test status OK for ST M50FW040 PROBE READPeter Stuge
Per test report from Alex Perez. Thanks Alex! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24flashrom: Test status OK for Macronix MX25L8005 PROBE READ ERASE WRITEPeter Stuge
Per test report from Andrew Paprocki. Thanks Andrew! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3388 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24flashrom: Increase delay in probe_jedec() after Product ID Entry to 10msPeter Stuge
We should follow data sheet timing, even if chips have been tested to answer faster in the field. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-24flashrom: Slight restructure of SPI probe_ functionsPeter Stuge
Preparation for a probe optimization patch. This patch does not change any functionality. spi_probe_rdid was tested to still work on my M57SLI rev 2. The idea is to have error checks return error immediately when something fails, rather than having code inside an if block where the condition tests for success. This means: Less indentation, more clear what the code is checking. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22Some flashrom documentation fixes, and removal of duplicated info (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22flashrom: A few changes were committed before the DoC remove, update README.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3384 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22as per Peter's suggestion. clean binary in make cleanStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22flashrom: Remove dead M-Systems Disk on Chip codePeter Stuge
DOC support has been disabled by default for many years. The write function does nothing but print text. It has a call to write_page_md2802() commented out, but that function does not exist. This is dead code with ugly #ifdefs. Updates README to reflect that there was a time when there was code, but it didn't work. Removes M-Systems #defines and also includes svn rm msys_doc.* Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3382 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22flashrom: Update test status to TEST_OK_PREW for ST M50FLW080A and SST49LF008APeter Stuge
Many thanks to Julio Cesar Costa for the test report! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3379 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-22flashrom: Some Makefile cleaningPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-21flashrom: Fix OBJS in Makefile to compile stm50flw0x0x.c like the othersPeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3377 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-21flashrom: Uppercase AMIC since that's what they write in datasheets.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3376 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-21flashrom: Update comment to match delay change in probe_jedec() r3373Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-21flashrom: Update test status for Atmel AT29C020 and SST29EE010Peter Stuge
Thanks to Urja Rannikko for reporting test results with these flash chips. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3374 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-21flashrom: Increase delay in probe_jedec() to 2ms to reliably detect AT29C020Peter Stuge
Run time is increased a few 100ms but this is needed for reliability. I consider this trivial. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-20flashrom: Show expected and read byte on verify failure. Trivial.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3372 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-18flashrom: Add support for AMIC Technology A49LF040A and do not probe ↵Jens Kuehnel
W29EE011 anymore Jens sent the first patch that added A49LF040A to flash.h and flashchips.c using _jedec and _49lf040 functions. An issue was found with probe_w29ee011() for the Winbond W29EE011, which caused the A49LF040A to no longer respond to any commands. Ward made a patch to disable probing by default for the W29EE011 following some discussion. Using -c W29EE011 will make flashrom probe for the chip. Peter did some more datasheet diving and found that the Pm49FL00x functions suited this chip quite well because of the block locking registers in A49LF040A, and finally tested PROBE READ ERASE WRITE to work on ALIX.3c3. Ward confirmed that this works on alix.2c3 too. Signed-off-by: Jens Kuehnel <coreboot@jens.kuehnel.org> Signed-off-by: Ward Vandewege <ward@gnu.org> Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3368 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-18flashrom: Force read unknown flash chipsPeter Stuge
When flash chip detection fails, it is still useful and possible to read the flash chip contents. If no flash chip is found in normal probes and the -f -r -c CHIPNAME options are given, a successful probe for the specified chip is forced, and then flashrom reads the flash chip using either the read function for the specified chip, or if there is none, a simple memcpy(). The patch also moves the global variable int force in flashrom.c into main() and passes it as a parameter to layout.c:show_id(), which was the only other function that used the variable. This is needed to avoid confusion with the new parameter int force which is added to flashrom.c:probe_flash() and used to force probe success for the chip named in char *chip_to_probe. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-13flashrom: Board enable and autodetection for GIGABYTE GA-7VT600Peter Stuge
Uses the VT8237 ISA bridge with mainboard subsystem ID and Realtek 8139 with mainboard subsystem ID for board detection. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-11flashrom: Add support for Amic Technology A29040B flash chip.Peter Stuge
PROBE READ tested by Lyos Gemini Norezel on BioStar P4M80-M4. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3365 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-11flashrom: Board enable and autodetection for BioStar P4M80-M4.Peter Stuge
Thanks to Reinder for clean room reverse engineering and data sheet diving! This board is autodetected because there are some good BioStar subsystem IDs. Matching uses onboard VT6420 SATA RAID with subsystem BioStar 3206 and onboard UniChrome Pro IGP graphics with subsystem BioStar 1202. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Lyos Gemini Norezel <lyos.gemininorezel@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3364 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-08Changes Makefile generation so that recursive "make" calls readPierre Pronchery
"$(MAKE)" instead, as GNU make (or "gmake") is currently necessary to build. Signed-off-by: Pierre Pronchery <khorben@defora.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3363 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-07Add dump support for Winbond (NSC) PC87427. Dumps available from real hardware.Tom Sylla
Signed-off-by: Tom Sylla <tsylla@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-06-03Ward writes:Peter Stuge
SST SST49LF160C is confirmed to work for PROBE READ ERASE WRITE, at least on 2 MCP55-based boards (gigabyte m57sli v1 and supermicro h8dmr). On the m57sli board, it only works > 512K when booted into coreboot; the proprietary bios seems to do something weird where it locks rom access down to the first 512K of the chip. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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