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2015-03-27urara: use proper SOC nameVadim Bendebury
Danube has become Pistachio, let's rename all instances where this SOC is mentioned. BUG=none TEST=board urara still builds Change-Id: Iea91419121eb6ab5665c2f9f95e82f461905268e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 58696cc7c77a70dca2bfd512d695d143e1097a78 Original-Change-Id: Ie5ede401c4f69ed5d832a9eabac008eeac6db62d Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/220401 Original-Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Reviewed-on: http://review.coreboot.org/9048 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-26inteltool: add ICH8M-E supportLubomir Rintel
Tested on a Lenovo X61. Change-Id: I047f5a029d9be9fe6a000e2b45be44c7f14b33d7 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: http://review.coreboot.org/8568 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-26util: Add miniconfig, a script to minimize coreboot configurationsStefan Reinauer
This script produces a "minimal" configuration from a full coreboot configuration, e.g. a configuration file that only contains the differences between the default configuration of a board and the input configuration file. Usage: util/kconfig/miniconfig config.big config.mini This will read config.big and produce config.mini. If you omit config.mini, config.big will be changed in place. Minimal configurations are easier to read and more robust when reusing them among different versions of coreboot as they reflect exactly the changes made to the default configuration instead of a full snapshot of all configuration options. Change-Id: Ifbee49e0192c2c557b18bcc1a92fe2a5d5164a3a Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/8974 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-25crossgcc: Factor out error reportingPatrick Georgi
Instead of repeating the ok/failed test all the time, move it into a function. Change-Id: I7496dfb5d3d2385316c577e1cf0901950b0e7083 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/8987 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-03-25crossgcc: point users to the log file in case of errorPatrick Georgi
The first problem for crossgcc users that encounter build errors is figuring out what is wrong with the build. Point out where the logs reside. Change-Id: I0300ecf6356c1a4ce18ae1e37fe0a56f46210d13 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/8982 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-25crossgcc: check for more tools that we requirePatrick Georgi
Change-Id: Ie002c69ab23cfc961b77771c4f2c20e5ae6bea60 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8633 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24checkpatch: Fix running out of coreboot's treeStefan Reinauer
* Fix up tree detection to work in a coreboot tree * Switch C99_COMMENT from ERR to CHK Change-Id: Ie8d6d1407853b77a4b3e9763f23481bd9402bc61 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/8418 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-24add make_idb.py & update bootblockhuang lin
BUG=chrome-os-partner:29778 TEST=Build coreboot Change-Id: Ica7b2bf2cf649c2731933ce59a263692bb2c0282 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: ba9c36daedc749748f45e68a84f8c34c636adb1c Original-Change-Id: Ia0e4e39d4391674f25e630b40913eb99ff3f75c4 Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/209427 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Commit-Queue: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/8862 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-23build: mips: add default compilation optionsVadim Bendebury
MIPS targets should be compiled with no position independent code allowed, as the generated image often does not support short range components reference. BUG=chrome-os-partner:31438 TEST=with the rest of the patches included MIPS board urara builds successfully Change-Id: I8ac2a2f6979d3b468159c9e29d07e022f48ab18a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e932b203db3e7cb510a7bf862d4538d55b6c7271 Original-Change-Id: I637dd44eb565447c18b2c3cdb022d0933c52fd20 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/215677 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8822 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21Allow for different BFD elf formats per architectureVadim Bendebury
The upcoming MIPS toolchain inside chroot generates elf images of elf32-tradlittlemips format, whereas readily available tools outside of chroot generate images of elf32-littlemips format. Both of these formats are perfectly fine, but xcompile accepts only one format per CPU architecture. This patch allows to specify multiple formats per architecture, any matching format will suffice. BUG=chrome-os-partner:31438 TEST=emerged arm, x86 and mips targets inside chroot Change-Id: I2c6b8e46b9299059b8e099b93c8c3dcf0a569899 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7f2f1d51643f33b72ac5e4091669f38662e5b9ce Original-Change-Id: I22405e71ac72b985fad51e2f5d7cc014107b8a9e Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/214599 Original-Reviewed-by: Stefan Reinauer <reinauer@google.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8823 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21imgtec/danube: Build BIMG boot imagesPaul Burton
Add a new utility named bimgtool, a simple tool which generates boot images in the BIMG format. This is the format the Danube boot ROM expects the user supplied code to be wrapped in, it is described by struct bimg_header in the code. This utility will be used to wrap the coreboot bootblock when building Danube targets. BUG=chrome-os-partner:31438 TEST=none yet Change-Id: I08ddb1b70d0b1feb1ffb3d62c4e5e6f07f4acdb7 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7fe6a9f383b79120f9ae231453d4b3a0f85b4fa7 Original-Change-Id: I63b9f5e09cd1f12765317b38e2a0dd033cdd6d39 Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/207975 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8768 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21cbmem: stop assuming 1MiB of memory can be mappedAaron Durbin
The default mapping size is 1MiB of ram. However, not all systems allow 1MiB of memory to mapped depending on the kernel's memory map. Therefore, be explicit about the sizes to mmap(). The only path that wasn't cleaned up was the coverage path as that needs to handle dynamic cbmem. The correct way to fix that is to add a global like the timestamps that is set while parsing cbtable. BUG=chrome-os-partner:31355 BRANCH=None TEST=Can cbmem -ltc on ryu. Change-Id: I548afa5ddbe0a859f52bc2ab2d0931186ee378a5 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: df4991ce1da7f0c25e99d84222cbc8d3189d0d66 Original-Change-Id: I27b70ae8a8fba168d1c1829bbef0135c7b651eac Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/221971 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8829 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21ARM64 rmodule: Add new reloc type R_AARCH64_LDST8_ABS_LO12_NCFurquan Shaikh
BUG=chrome-os-partner:33962 BRANCH=None TEST=Compiles and boots to kernel prompt. Change-Id: Id7b0dfb5a51c2f29bdb031b98606940c118959ec Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7a1c4d2f35c135d542708c4dabcca5e8c1d453c0 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Change-Id: If132323885f23d75e1fcde064398e85c2c17f257 Original-Reviewed-on: https://chromium-review.googlesource.com/231560 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8809 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21cbfstool: Remove empty line that looks out of placeJulius Werner
BRANCH=None BUG=None TEST=Manual Change-Id: I8b31a0b194d353ea3e7863513f2e36f3e032fad8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7ccba49a7c2372cdfff6e2947e417d4d4f5436c2 Original-Change-Id: I9beebdf29e4fc4aa645581146fdc61c659de72df Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/229973 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/8808 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21rmodtool: add another aarch64 relocationAaron Durbin
BUG=chrome-os-partner:32112 BRANCH=None TEST=Built secmon which had this type of relocation. Change-Id: Ie367c348fbf59465e238e5fa60f217f5373501b3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a754bc1fe39c19ab8b2f7be9648cccb06156b0ef Original-Change-Id: If170d9e270daf3153e92d16c06516915c727e930 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/218843 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: http://review.coreboot.org/8807 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21rmodtool: Add support for aarch64Furquan Shaikh
BUG=chrome-os-partner:31615 BRANCH=None TEST=Compiles succesfully, rmodule created and loaded for ryu Change-Id: Icc80b845fe43a012665d77c3ef55bd30784fd3fc Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 24ad4383a9ea75ba6beb084451b74e8a8735085b Original-Change-Id: I4f3a5dbb8fc8150aa670d2e6fed56a6774feb4a6 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/214329 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8806 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-19uio_usbdebug: User-space-i/o framework for usbdebugNico Huber
uio_usbdebug enables you to debug coreboot's usbdebug driver inside a running operating system (only Linux at this time). This comes very handy if you're hacking the usbdebug driver and don't have any other debug output from coreboot itself. Currently, only Intel chipsets are supported. Change-Id: Iaf0bcd4b4c01ae0b099d1206d553344054a62f31 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: http://review.coreboot.org/4695 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-18crossgcc: jump to crossgcc path before building the toolchainPatrick Georgi
We use paths relative to that in the buildgcc script. Change-Id: I2b79c3d2c75088af7e8e362d18a38274352eb965 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/8713 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-17cbfstool: Add relocation codes for arm modeFurquan Shaikh
Add relocation codes required for arm mode. These are required by armv4. BUG=chrome-os-partner:30784 BRANCH=None TEST=Compiles successfully for rush Original-Change-Id: Ie7c5b3e07689c85091036a619a65f9fea1918b6b Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/209973 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit dc5f411f95e02a02b4a4ef4652303ce62aa220c2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ie62ed730080299e474c256371ab88f605b54c10f Reviewed-on: http://review.coreboot.org/8675 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-17crossgcc: Add x86_64 to list of supported architecturesStefan Reinauer
You can build your new toolchain with: $ cd util/crossgcc/ $ ./buildgcc -d /opt/cross -p x86_64-elf -j 16 or $ make crossgcc-x64 Change-Id: I8eb584166294578d2b33c63e94ed3aca9b5de4f4 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/8668 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-16genbuild_h.sh: use the last git commit as timesource if availableAlexander Couzens
Change-Id: I1472265adac9406a86da22839199ec6bbdaa0c69 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8619 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-10crossgcc: fix copy-paste mistake on riscv make targetAlexander Couzens
Change-Id: Id618595a321529770964b125f7490dcb08376643 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8637 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-10util/inteltool: Support reading RCBA of NM70 southbridgeAlexandru Gagniuc
Change-Id: Ia90f967a4988214c719f374a49233bb6fade11b0 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/8481 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09genbuild_h.sh: set TZ + LANG variable for predictable `date` and `git` outputAlexander Couzens
Change-Id: I10fb0f797b79a2bdbc41c31fe846cc04e26260b3 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8618 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09genbuild_h.sh: derive all timestamp variables from one timestampAlexander Couzens
If not derived it's possible it defines inconsistent timestamps which differ from each other. Change-Id: I090fdce4c4c1c24135ec72818eecb69e168df565 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8617 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09build.h: remove variable for the builduser, -hostname and -domainAlexander Couzens
They don't contain any useful information and also block us from having reproducible builds. Change-Id: Ib03887f6a548230de9f75fb308c73a800e180c48 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8616 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <gaumless@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-09crossgcc: Unify tool tests, add check for g++ or clangPatrick Georgi
Change-Id: I406f5cfc61bc87ccc2c0b9283b4fbb8cef8dfc1b Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/8522 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-08crossgcc: Add RISC-V supportPatrick Georgi
Change-Id: If1e0f7ed21f67d7a185dad251ede81ddbc18c4e5 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8629 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-03-08crossgcc: Update toolchainPatrick Georgi
Update GCC to 4.9.2, binutils to 2.25. Change-Id: Iae9763163b7f42c55a39e26b4beedee67d14a6e4 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8628 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-03-08crossgcc: Add mipsel-elf as supported targetPatrick Georgi
Change-Id: Icd8050d9193f9957468cfa13901ec14e993e50de Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8630 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-03-06Move generation of build.h into a shell scriptMartin Roth
Moving the routines that create build.h into a script offers several advantages. We can create more complex functions to run and we don't have to deal with both bash and Make at the same time. This script combines what is currently in Makefile.inc with a couple of updates. - Update how it determines whether to use git for the timestamp - Move the git revision string generation inside the routine that checks to see if we have git. - Add a timeout for the domain name check. Change-Id: I93c131e8d01a0099eb13db720fa865c627985750 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/8428 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-04board-status: update mediawiki interfacePatrick Georgi
Our Mediawiki instance doesn't accept the old txt format anymore. Change-Id: I94b9f5366900ec8e192abab3ed716dbced4fc4f7 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8567 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-04cbfstool: Clean up codeStefan Reinauer
cbfstool has diverged between coreboot upstream and the chromium tree. Bring in some of the chromium changes, in particular the useful remainders of cbf37fe (https://chromium-review.googlesource.com/176710) - fix coding style - mark unused variables explicitly unused - remove some dead code Change-Id: I354aaede8ce425ebe99d4c60c232feea62bf8a11 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/8577 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-03-03cbfstool: Add the MIPS architecturePaul Burton
Specify a CBFS architecture value for MIPS and allow cbfstool to make use of it. Original-Change-Id: I604d61004596b65c9903d444e030241f712202bd Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com> Original-Reviewed-on: https://chromium-review.googlesource.com/207971 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 7c4df61715df3767673841789d02fe5d1bd1d4a0) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ib30524f5e7e8c7891cb69fc8ed8f6a7e44ac3325 Reviewed-on: http://review.coreboot.org/8519 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-28crossgcc: Clean GNU make context so builds succeedPatrick Georgi
GCC's build system is sometimes confused by our build system's configuration: make crossgcc failed, while util/crossgcc/buildgcc -p armv7-a-eabi didn't. Make sure the GCC build system runs independently from ours by breaking any ties. Change-Id: I563e17b22127bc8c83ebfb17252184a3b6e0e58b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8545 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-02-24build: mipsel cross compiler supportPaul Burton
This patch introduces support for building a MIPS cross compiler targetting little endian machines by default. Original-Change-Id: I116f6f431cdf80f5f5f58d2743357a9f70a7347d Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com> Original-Reviewed-on: https://chromium-review.googlesource.com/207970 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit d6c9603c41b3d11400cee7b5b409203af0632aa2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I543cd2276d2f63ed2036a1c1259c9a07cb8a4ba8 Reviewed-on: http://review.coreboot.org/8518 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-23util/crossgcc/buildgcc: Upgrade MPC from 1.0.1 to 1.0.3Paul Menzel
The following changes are included. Changes in version 1.0.3: - Fixed mpc_pow, see http://lists.gforge.inria.fr/pipermail/mpc-discuss/2014-October/001315.html - #18257: Switched to libtool 2.4.5. Changes in version 1.0.2: - Fixed mpc_atan, mpc_atanh for (+-0, +-1), see http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57994#c7 - Fixed mpc_log10 for purely imaginary argument, see http://lists.gforge.inria.fr/pipermail/mpc-discuss/2012-September/001208.html Upgrading also fixes the issue, where for example running `make crossgcc-arm` ails as MPC cannot be built. Building MPC 1.0.1 ... failed As it worked for others, it turns out that I had a release archive for MPC 1.0.1 cached from October 2014, which was generated incorrectly, so that `./configure` and `Makefile` are missing. $ LANG=C ls -l util/crossgcc/tarballs/mpc-1.0.1.tar.gz -rw-r--r-- 1 joey joey 224232 Oct 19 2013 util/crossgcc/tarballs/mpc-1.0.1.tar.gz $ md5sum util/crossgcc/tarballs/mpc-1.0.1.tar.gz 22a27bee89616dca4d654fc579a816e5 util/crossgcc/tarballs/mpc-1.0.1.tar.gz $ md5sum mpc-1.0.1.tar.gz # downloaded today b32a2e1a3daa392372fbd586d1ed3679 mpc-1.0.1.tar.gz So upgrade to MPC 1.0.3 as the release archive as of today contains the needed files. $ md5sum util/crossgcc/tarballs/mpc-1.0.3.tar.gz d6a1d5f8ddea3abd2cc3e98f58352d26 util/crossgcc/tarballs/mpc-1.0.3.tar.gz Change-Id: Ibfd02a9b362b12361b210d512420b87caebb0fdf Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> TEST:Run `make crossgcc-arm` and observe `Building MPC 1.0.3 ... ok`. Reviewed-on: http://review.coreboot.org/8521 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-02-20util/board_status/board_status.sh: Move comment to right positionPaul Menzel
Fix up commit 1b6e7a67 (Updates to the board status script) adding this comment before running `cbfstool` by moving it to a more appropriate place. Change-Id: Iff79ed44e8e5ced55f2345407d1668858098ebe4 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/8491 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2015-02-17xcompile: specify arm64 subarchesPatrick Georgi
This tells abuild that it can in fact build arm64 images. Change-Id: I47695372053513ca039e118776aa904ea0afa21d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/8474 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-02-15cbootimage: Add HOSTCC and flagsMarc Jones
Add the flags used by the Nvidia makefile and use HOSTCC to build cbootimage. Note that adding -g makes the BCT very large, so leave that flag out. Change-Id: I4431efffdfdcbd030665b26f5b799352e38d1f95 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/8411 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-12lint: exclude *.hex files from whitespace checkingWerner Zeh
If one needs raw binary files, .bin extension cannot be used due to settings in .gitignore. This patch allows to use .hex files. To avoid lint checks on these files, exclude the .hex extension from the test. Change-Id: I4b503229d63694c48cce12ca8cd33ea58172af01 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: http://review.coreboot.org/8403 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-12lint: exclude nvidia submodule from file listPatrick Georgi
From git's point of view submodules are a weird third thing between file and directory. Avoid trying to apply file handling on a directory. Change-Id: Ibbc9c28e1657d96413c5fb08705d30e25171254d Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/8372 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2015-02-11Add Linux kernel's checkpatch.pl scriptStefan Reinauer
Carefully staging to enable checkpatch for coreboot contributions. The biggest offender of the rules enforced by checkpatch I have found so far is ... Oh, you guessed it? It's checkpatch itself. Change-Id: Iaacbcd52c3bc22b083a24127a3ea17a7cc706245 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/8417 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-11utils/msrtool: add westmere cpuids to nehalemAlexander Couzens
Westmere's are nehalem's in 32nm Change-Id: I529194d50dbe3f585faee14961542433ea96ab75 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8293 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11ectool: remove extra printf("Not dumping EC IDX RAM.")Alexander Couzens
It doesn't provide any useful information. Change-Id: I13e68d443bbcadea45b8fbcc262ceb9deb3e2e61 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8380 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11ectool: add write supportAlexander Couzens
Use `ectool -w <addr> -z <data>` to write into ec ram Change-Id: Id4aca045f6b7c2343be96ea474ee74033897b8b7 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8323 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2015-01-26xcompile: Rename aarch64 to arm64Marc Jones
coreboot toolchain.inc uses the ARCH_SUPPORTED variable set by xcompile. This change allows for consistent naming in the toolchain.inc generated variables. Change-Id: Iafed06cf2d19a533f99e10b76aca82adc3e09fa8 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/8235 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2015-01-13cbmem: Add support for new 'coreboot' compatible device tree bindingJulius Werner
This patch brings the cbmem utility in line with the recent change to coreboot's device tree binding. Since trying to find the right node to place this binding has been so hard (and still isn't quite agreed upon), and because it's really the more correct thing to do, this code searches through the device tree for the 'coreboot' compatible property instead of looking up a hardcoded path. It also provides bullet-proof '#address-cells' handling that should work for any endianness and size. BUG=chrome-os-partner:29311 TEST=Ran cbmem -c and cbmem -t on Nyan_Big. Also straced the to make sure everything looks as expected. 'time cbmem -t' = ~35ms shows that there is no serious performance problem from the more thorough lookup code. Original-Change-Id: I806a21270ba6cec6e81232075749016eaf18508b Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/204274 Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> (cherry picked from commit 3e64e28f684e60e8b300906c1abffee75ec6a5c2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I0a0a4f69330d3d8c5c3ea92b55f5dde4d43fca65 Reviewed-on: http://review.coreboot.org/8141 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-13cbfstool: Remove arch check for different stagesFurquan Shaikh
Remove the arch check for each stage as the arch for different stages can be different based on the SoC. e.g.: Rush has arm32-based romstage whereas arm64-based ramstage BUG=None BRANCH=None TEST=Compiles successfully for nyan, link and rush Original-Change-Id: I561dab5a5d87c6b93b8d667857d5e181ff72e35d Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/205761 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Ronald Minnich <rminnich@chromium.org> (cherry picked from commit 6a6a87b65fcab5a7e8163258c7e8d704fa8d97c3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ic412d60d8a72dac4f9807cae5d8c89499a157f96 Reviewed-on: http://review.coreboot.org/8179 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-09cbfstool: Fix help display messageFurquan Shaikh
For arm64, the machine type is arm64 in cbfstool, however it was displayed as aarch64 in help message. This patch corrects it. BUG=None BRANCH=None TEST=None Original-Change-Id: I0319907d6c9d136707ed35d6e9686ba67da7dfb2 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/204379 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 1f5f4c853efac5d842147ca0373cf9b5dd9f0ad0) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I00f51f1d4a9e336367f0619910fd8eb965b69bab Reviewed-on: http://review.coreboot.org/8144 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-01-08inteltool: add `-s` to dump spi bar and bios_cntl registersAlexander Couzens
Change-Id: I3bb5dc23885af8c992456ee5e4bd374cd4b813bf Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: http://review.coreboot.org/8049 Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-01-03util/cbfstool: Fix byte-ordering for payload type field.Hung-Te Lin
In https://chromium-review.googlesource.com/181272 the payload->type has been changed to big-endian (network ordering) but the cbfs_image is still parsing type as host ordering, which caused printing cbfs image verbosely (cbfstool imge print -v) to fail to find entry field and print numerous garbage output. Payload fields should be always parsed in big-endian (network ordering). BUG=none TEST=make; cbfstool image.bin print -v -v -v # see payloads correctly Original-Change-Id: If1ac355b8847fb54988069f694bd2f317ce49a1a Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/200158 Original-Reviewed-by: Ronald Minnich <rminnich@chromium.org> (cherry picked from commit 423f7dd28f8b071692d57401e144232d5ee2e479) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I5a4694e887c7ff48d8d0713bb5808c29256141a9 Reviewed-on: http://review.coreboot.org/8005 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2014-12-30cbmem: use a single id to name mapping tableVadim Bendebury
CBMEM IDs are converted to symbolic names by both target and host code. Keep the conversion table in one place to avoid getting out of sync. BUG=none TEST=manual . the new firmware still displays proper CBMEM table entry descriptions: coreboot table: 276 bytes. CBMEM ROOT 0. 5ffff000 00001000 COREBOOT 1. 5fffd000 00002000 . running make in util/cbmem still succeeds Original-Change-Id: I0bd9d288f9e6432b531cea2ae011a6935a228c7a Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/199791 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 5217446a536bb1ba874e162c6e2e16643caa592a) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I0d839316e9697bd3afa0b60490a840d39902dfb3 Reviewed-on: http://review.coreboot.org/7938 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-29abuild: silence makePatrick Georgi
make called within make prints 'Entering directory' cruft which confuses the architecture support test. Silence it. Change-Id: I7ce7e0ff49e9317fe736ed80f5f18186d416ae63 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7968 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2014-12-28cbfstool: Fix update-fit commandKyösti Mälkki
Regression in commit 3fcde22 caused parse_microcode_blob() to access data outside cpu_microcode_blob.bin file in CBFS and create invalid Intel Firmware Interface Table entries. Change-Id: I1a687060084c2acd6cac5f5053b74a332b4ac714 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7958 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-19util: Remove 'getpir' and 'mptable' toolsAlexandru Gagniuc
They create output in an obsolete form, are not actively maintained, and the quality of the output is not better than randomly copy pasting from other boards. These tools are no longer of any practical value. remove them. Change-Id: I49d7c5c86b908e08a3d79a06f5cb5b28cea1c806 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/5158 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19util/superiotool: change displayed name of chip id 0xc333 (nct6776)Felix Held
nct6776f and nct6776d are just two package variants containing the same die Change-Id: I4d319fa0e791e66ad04857dede2fdfc8e42dd45a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7806 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-19util/superiotool: fix default values for nct6776 (rev. c)Felix Held
change default values according to the datasheet in revision 1.2 Change-Id: Iec1d55dd7b906a7a41940f3f8e42413922883efd Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7805 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-19ifdtool: Add O_BINARY to open flags for Windows compatibilityScott Duplichan
Windows requires O_BINARY when opening a binary file. Otherwise \n characters get expanded to \r\n and <ctrl>z is treated as end of file. For compatibility with non-Windows hosts, the patch defines O_BINARY if it is not already defined. Change-Id: I04cd609b644b1edbe9104153b43b9996811ffd38 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/7789 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19arm_boot_tools: Add 'b' to fopen flags for Windows compatibilityScott Duplichan
Windows requires the 'b' (binary) flag when using fopen to open a binary file. Otherwise \n characters get expanded to \r\n and <ctrl>z is treated as end of file. Change-Id: I3b85e4f9a8f7749801a39154881fe2eedd33f9b8 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/7790 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-18nvidia/cbootimage: update to latest upstreamPatrick Georgi
Scott Duplichan provided a win32 related fix that we want to use. Change-Id: I791b470f9f6c5bf140fc190d290741f35f05d254 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7827 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-16inteltool: Start adding Bay TrailMartin Roth
- Add silvermont (Bay Trail core) MSRs - these are shared with rangeley/avoton. - Add GPIO values and GPIO muxing information. - Add Bay Trail to the PM list. Still to do: - Northbridge functionality (RCBA, Memory timings, etc.) - Add Graphics registers Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7711 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-15buildgcc: Fix msys2 crossgcc build failScott Duplichan
A leading double slash can result when $DESTDIR/$TARGETDIR is expanded in the libelf portion of buildgcc. The leading double slash causes buildgcc to fail when run from Windows/Msys2. Replace $DESTDIR/$TARGETDIR with $DESTDIR$TARGETDIR to avoid the problem. Change-Id: Ide2bae41c07c1566f80104c3a2e2acab53de0d17 Signed-off-by: Scott Duplichan <scott@notabs.org> Reviewed-on: http://review.coreboot.org/7788 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-11abuild: Don't print "Using payload ..." message in quiet modeAlexandru Gagniuc
It's not useful in quiet mode, and is very distracting. Change-Id: I59dc8caa22b66980560d5afb76eae801efaa29ad Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/124 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-10crossgcc: clean up aarch64 target integrationPatrick Georgi
We already have aarch64 targets. Extend the "all" target. Change-Id: I74d9bf5123695318c15b73c89f170f3ebb20aa80 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7729 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2014-12-10abuild: update output so multithreaded is decipherableMartin Roth
- add a 'quiet' mode that only prints important messages - add vendor/mainboard to all strings printed With quiet on, multithreaded looks like this: skipping google/storm because we're missing compilers for (arm armv4 armv7) iwill/dk8_htx built successfully. (took 5s) jetway/j7f2 built successfully. (took 6s) iwill/dk8x built successfully. (took 8s) iwill/dk8s2 built successfully. (took 8s) jetway/j7f4k1g5d built successfully. (took 10s) With quiet off, single threaded now looks like this: Building intel/emeraldlake2 Creating config file for intel/emeraldlake2... intel/emeraldlake2 (blobs, ccache) intel/emeraldlake2 config created. Compiling intel/emeraldlake2 image... intel/emeraldlake2 built successfully. (took 5s) And quiet off multithreaded looks like this: Building iwill/dk8_htx Creating config file for iwill/dk8_htx... iwill/dk8_htx (blobs, ccache) intel/mohonpeak config created. Compiling intel/mohonpeak image on 1 cpu... intel/minnowmax config created. --- snip --- intel/mtarvon built successfully. (took 4s) Building iwill/dk8s2 Creating config file for iwill/dk8s2... iwill/dk8s2 (blobs, ccache) intel/mohonpeak built successfully. (took 5s) Building iwill/dk8x Change-Id: Ib7b9a625d77bb8e0663afc00d7133e415866ecec Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7716 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-09aarch64: Add aarch64-elf toolchain to crossgcc MakefileMarcelo Povoa
BUG=None BRANCH=none TEST=Build crosgcc for aarch64-elf Signed-off-by: Marcelo Povoa <marcelogp@chromium.org> Original-Change-Id: Ifc886b6bd125552855ad1cf49ee7c1b7a0350895 Original-Reviewed-on: https://chromium-review.googlesource.com/186413 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Original-Tested-by: Marcelo Póvoa <marcelogp@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Commit-Queue: Marcelo Póvoa <marcelogp@chromium.org> (cherry picked from commit 9959047c82c96108f4bdedad1db0219fcdc85378) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I5e781443bb11a7db3420bb8cfc447de8494b1d24 Reviewed-on: http://review.coreboot.org/7661 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-09aarch64: Add ELF supportMarcelo Povoa
BUG=None BRANCH=none TEST=Build coreboot Signed-off-by: Marcelo Povoa <marcelogp@chromium.org> Original-Change-Id: I38684794fdf5bd95a32f157128434a13f5e2a2d5 Original-Reviewed-on: https://chromium-review.googlesource.com/185271 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Tested-by: Marcelo Póvoa <marcelogp@chromium.org> Original-Commit-Queue: Marcelo Póvoa <marcelogp@chromium.org> (cherry picked from commit 67b74d3dc98a773c3d82b141af178b13e9bb6c06) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Id82a31dc94bb181f2d24eddcbfbfb6d6cdc99643 Reviewed-on: http://review.coreboot.org/7659 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-09utils: Remove references to tracker from manpagesMartin Roth
abuild, inteltool, and superiotool's manpages still referenced reporting bugs to tracker.coreboot.org. Remove that url and change the message to point to the coreboot mailing list instead. Change-Id: I7a85bc2b36ccdb7f3798a39a08345c1a02a67e65 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7712 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-04to-wiki.sh: Show the same status for clones.Vladimir Serbinenko
While it may not be the best way theoretically as theoretically only one of clones may fail if clones are not perfect, in practice there is more variance between e.g. different X60 variants than between most of the clones, yet we put all X60 variants together. Also in most cases we don't even have a way to tell the clones apart. Change-Id: I786aeed55300026fae0d9f0497d0c830a9f5e452 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7564 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-12-03util/cbmem: Print name instead of ID of CBMEM_ID_SMM_SAVE_SPACEPaul Menzel
Commit b4b9eb39 (x86: provide infrastructure to backup default SMM region) introduced the new CBMEM type `CBMEM_ID_SMM_SAVE_SPACE`, but did not add its name `SMM BACKUP` to the utility `cbmem`, causing the following output, when running `cbmem` on a system making use of `BACKUP_DEFAULT_SMM_REGION`. 7. 07e9acee 7f7e5000 00010000 Fix that by adding the name `SMM BACKUP` to the struct `cbmem_id_to_name`. Change-Id: Ib24088c07af4daf6b7d8d5854283b5faa2ad6503 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/7176 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-02nvramtool: make sure that strings are 0-terminatedPatrick Georgi
The call site expects them to be. Change-Id: Ic05fc5831f5743d94fe617dfb3b9e329f01866d1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7621 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-02nvramtool: cmos_read(): Use malloc() instead of alloca()Andrew Engelbrecht
Fixes crash occurring when 'nvramtool -a' tried to free a prematurely freed pointer. (Tested on x60) malloc() is correct because the pointer is accessed outside the calling function. The pointer is freed in the parent function list_cmos_entry(). Change-Id: I1723f09740657f0f0d9e6954bd6d11c0a3820a42 Signed-off-by: Andrew Engelbrecht <sudoman@ninthfloor.org> Reviewed-on: http://review.coreboot.org/7620 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-30buildgcc: support DESTDIR for libelfPatrick Georgi
The libelf build system doesn't support the DESTDIR variable. Work around by mangling prefix when installing. Change-Id: I3a56eb2bf919bcb9b586b945dce26a02dbaff931 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7613 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-30build system: only do the compiler test for gccPatrick Georgi
There isn't a history of broken clang compilers yet so let's give it a chance. Change-Id: Iddb63700e3850116313c1ddee69111f936191055 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7607 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-26Rewrite board_status in go.Vladimir Serbinenko
This allows easy creation of redistribuable binary. Change-Id: I12a82d509cd4bd46baeb4f4066e509c69301ab95 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7565 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-25lint-stable: Ignore .bin files for whitespace check.Vladimir Serbinenko
.bin is the most convenient format for storing SPDs and since it's not text format, whitespace check is useless and gives false positives. Change-Id: I8a7569eac8a1dfbffabe166a38e4dd3e895fdef1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7567 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-23buildgcc: Fix documentationPatrick Georgi
Change-Id: I3983d7a393260238b75e9f52e9451b454c551c30 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7550 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-21util/cbfstool/cbfs-mkstage.c: Fix build issue on 32-bit x86Francis Rowe
Fixes regression caused by commit 405304ac (cbfstool: Add option to ignore section in add-stage) Change-Id: If9e3eea9ab2c05027f660d0057a635abf981b901 Signed-off-by: Francis Rowe <info@gluglug.org.uk> Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7545 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-20crossgcc: Add buildsystem support for aarch64 compilerPatrick Georgi
This adds the crosstools-aarch64 and crossgcc-aarch64 make rules to create a toolchain (with or without gdb) for AArch64 targets. Also adapt xcompile, since it's aarch64-elf. Change-Id: I6fbe09d44ee8b8493d3cd8dbbba869b409e311f7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7527 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-20crossgcc: Update GCC from 4.7.3 to 4.8.3 and update to version 1.25Patrick Georgi
gcc 4.9.2 fails on our tree right now. We should clean that up and test before we make it the reference version. Also, the AMD K8/Fam10 issue we had last year, for which Vladimir provided an "untested" fix (which is in, commit a6c29fe6841ad5e03ddb35803943bed3bc83dfd2), isn't reproducible: I boot-tested an unpublished AMD K8 board with coreboot built with gcc 4.8.3. (Disclaimer: since the old issue depended on compiler decisions on register allocation, any change to code or compiler could mix up things in semi-random ways.) Change-Id: I8f1460a8da2c9e2d581482b22a4824b10b8987fa Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7526 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-18kconfig: create files in target directory if requestedPatrick Georgi
Otherwise rename() fails when used across filesystem boundaries. Change-Id: I22a62310f0e46ac9cfee50b7e9eeed93536ed409 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7504 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-14nvidia/cbootimage: update to masterPatrick Georgi
It contains a number of fixes to bugs found by Coverity Scan. Change-Id: I362a069afd37783f59d8831e44ae885e8490819e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7392 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-11-09abuild: pass compiler configuration options to tool building stepPatrick Georgi
This is required to run abuild parallely with clang without the canonical coreboot toolchain installed. Change-Id: Iea56d3f552d50ab6e762afa134091b0d8e38792c Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7369 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-09inteltool: add more hardware IDs and PCIEXBAR/PXPEPBAR read supportFelix Held
Add IDs of some SNB and Haswell chips; use more descriptive names. Add PCIEXBAR and PXPEPBAR read support for SNB/IVB/Haswell. Change-Id: I16753bf90061fc2065b813b1c2169e7b7bcc89e8 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7360 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Mathias Krause <minipli@googlemail.com>
2014-11-06inteltool: Fix message in case of multiple LPC controllersMathias Krause
If we find multiple LPC controllers, we want to tell the user that we'll ignore all but the first. However, we use 'dev' in the message (the current device found) instead of 'sb' (the one we want to use). Fix the message by using 'sb' and break the loop right away in this case. It's sufficient to tell the user once which LPC controller we'll use. Change-Id: Ibd27e40525fabe8c63b112691ad49fd994c70a48 Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-on: http://review.coreboot.org/7342 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins)
2014-11-06inteltool: Add support for Sandy Bridge desktop processorsFelix Held
Change-Id: I5e68b89c30d5550e4bce5c3e4c7b0689c38756bc Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7337 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Mathias Krause <minipli@googlemail.com>
2014-11-05inteltool: Show more info on sandy/ivy.Vladimir Serbinenko
Change-Id: I408614e743ab6f0f447b327c01d8f4dacf787124 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6692 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-04inteltool/sandybridge: Kill mch_registers codepath.Vladimir Serbinenko
It never worked. Change-Id: Ic68614bb8ed481babf54b4f9d8db00635755f4d1 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7324 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-04abuild: fix cross compiler testPatrick Georgi
Actually abort if a cross compiler is missing, but also handle subarchitectures (currently: armv4 and armv7 for arm) properly. Change-Id: Idf37fb029178df6f2ac029466c66aaa2010bdbd2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/7297 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-04inteltool: Add support for Haswell ULT and Lynx Point LPDennis Wassenberg
Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com> Change-Id: I2d5a31c831afeb92522b2673fde82922dc4efca5 Reviewed-on: http://review.coreboot.org/7275 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-11-04cbfstool: Add option to ignore section in add-stageFurquan Shaikh
Allow add-stage to have an optional parameter for ignoring any section. This is required to ensure proper operation of elf_to_stage in case of loadable segments with zero filesize. Change-Id: I49ad62c2a4260ab9cec173c80c0f16923fc66c79 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/7304 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-04cbfstool: Convert cbfs-mkstage.c into pelfFurquan Shaikh
Change cbfs-mkstage to use parsed elf instead of calling elf_headers. That allows us to have access to the complete elf including the string table. Change-Id: Ie767d28bdf41af38d1df0bce54bc0ada45123136 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/7303 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-02inteltool: refine GPIO and PMBASE/TCO printing on Ibex Peak/5 SeriesStefan Tauner
Nicolas Reinecke was noticing that in my Lenovo T410s logs the GPIO*3 settings were missing. This led to some investigation and this patch, thanks! Change-Id: I7ba28aa00d10f988a7fe81e61d2e216b54a11006 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/7239 Reviewed-by: Nicolas Reinecke <nr@das-labor.org> Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2014-10-28A tool for IPQ8064 encapsulationVadim Bendebury
This is a copy of the tool provided by the vendor. It adds a header which tells the early stage loader where to load the next phase blob for execution. It is going to be used to encapsulate the bootblock. Usage of this tool is as follows: ipqheader.py <base-addr> <input-file> <output-file> Old-Change-Id: I448c006719f4f3dd5a6716ff2e47f7fc275c805e Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/193494 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit 201630f8637eb627f0894ecd7bceb31017244ad4) Make ipqheader.py executable Modify the utility to become a Linux executable. While at it, fix the program name reported by error messages. Old-Change-Id: I25061d43fdea72655a696deb9e494e9c7382f670 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/193495 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit bbbf69c754aa3b6a1bf17ab3ced1c739c3ee0688) ipq8064: SBL headers must have 4 byte aligned blob sizes It turns out that for SBL3 to load the next phase, the sizes in the MBN header must be 4 byres aligned. This change makes sure that this requirement is enforced. Old-Change-Id: Ia64f04bb281ae772b060d2f7713c98dd348972ba Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/196167 (cherry picked from commit fa6a52a07cb87ecf2538a6b0d47605d79104e4cc) Add proper license to the ipqheader tool This patch adds a vanilla BSD 3-Clause license. Original-Change-Id: I9da7176e670b598808ef5be2461b6105a4c5f6c5 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/225783 Original-Reviewed-by: Trevor Bourget <tbourget@codeaurora.org> Original-Tested-by: Trevor Bourget <tbourget@codeaurora.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit a0c47a8d74f1ac131c91e978b6d68bbcfaa52c37) Squashed 4 commits for the ipqheader util. Change-Id: I144c01947a89e1348a06aa82590e972e2ec31247 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/6976 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2014-10-28rmodtool: add support for ARMAaron Durbin
Add support for creating ARM rmodules. There are 3 expected relocations for an ARM rmodule: - R_ARM_ABS32 - R_ARM_THM_PC22 - R_ARM_THM_JUMP24 R_ARM_ABS32 is the only type that needs to emitted for relocation as the other 2 are relative relocations. BUG=chrome-os-partner:27094 BRANCH=None TEST=Built vbootstub for ARM device. Original-Change-Id: I0c22d4abca970e82ccd60b33fed700b96e3e52fb Original-Signed-off-by: Aaron Durbin <adurbin@chromuim.org> Original-Reviewed-on: https://chromium-review.googlesource.com/190922 Original-Reviewed-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit a642102ba7ace5c1829abe7732199eda6646950a) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ib3b3c90ebb672d8d6a537df896b97dc82c6186cc Reviewed-on: http://review.coreboot.org/7204 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-28cbfstool: If compression fails, warn and use the uncompressed data.Gabe Black
The LZMA compression algorithm, currently the only one available, will fail if you ask it to write more data to the output than you've given it space for. The code that calls into LZMA allocates an output buffer the same size as the input, so if compression increases the size of the output the call will fail. The caller(s) were written to assume that the call succeeded and check the returned length to see if the size would have increased, but that will never happen with LZMA. Rather than try to rework the LZMA library to dynamically resize the output buffer or try to guess what the maximal size the data could expand to is, this change makes the caller simply print a warning and disable compression if the call failed for some reason. This may lead to images that are larger than necessary if compression fails for some other reason and the user doesn't notice, but since compression errors were ignored entirely until very recently that will hopefully not be a problem in practice, and we should be guaranteed to at least produce a correct image. Original-Change-Id: I5f59529c2d48e9c4c2e011018b40ec336c4fcca8 Original-Signed-off-by: Gabe Black <gabeblack@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/187365 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Tested-by: Gabe Black <gabeblack@chromium.org> Original-Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit b9f622a554d5fb9a9aff839c64e11acb27785f13) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Change-Id: I5f59529c2d48e9c4c2e011018b40ec336c4fcca8 Reviewed-on: http://review.coreboot.org/6958 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-10-18util/fletcher: fix debug option parsingPatrick Georgi
sizeof(char[]-type+1) isn't very useful. Since one of the strings is constant, we also don't need to use strncmp that string's length. While at it, str*cmp don't return booleans, so check for value instead of faux bools. Change-Id: Iebb194a60eac454dafeade75f135df92068cf4ab Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/6988 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-18abuild: skip boards for which we lack a cross compilerPatrick Georgi
We don't support them, they won't ever pass the build test, so no need to report an error. Change-Id: I2409a79f3c0d66a79b0e065e6b9ebf62d0359b3e Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7121 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-10-18abuild: don't track architecturePatrick Georgi
This didn't work for a while, and we don't _really_ need it. Change-Id: I952243f30e985e7577cd511f40957066db6dd3c5 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7120 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>