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2022-07-19util/spd_tools: Limit memory speed to 5500 Mbps for SabrinaKarthikeyan Ramasubramanian
In Sabrina platform, memory speed is limited to 5500 Mbps. Update the SPD generation tool to limit to that speed. BUG=b:238074863 TEST=Build and boot to OS in Skyrim. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: Ie3507898167012e0d812c9b1aacba72e9055fcd8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65708 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-07-19lint/checkpatch: Add check for used comma where semicolon could beElyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I6d3a49378008bad61b2a18bd8cb28be952a18006 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65837 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Add a check for use of self-assignmentsElyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: If47a7826ee67a2be25a4caa2a447484e5f11411b Reviewed-on: https://review.coreboot.org/c/coreboot/+/65836 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Add a check for existence of a commit logElyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I4e3b98140d900c5717f4badde71c7be88fd1e23a Reviewed-on: https://review.coreboot.org/c/coreboot/+/65835 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'Check patch "separator" and "signoff"'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Id3d7375216af5bf75ed7ce61fa8ea2dfebe8ac77 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65834 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'check for unwanted Gerrit info'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I856bfa0f0d39fda549671b1029cccdc39f831bab Reviewed-on: https://review.coreboot.org/c/coreboot/+/65833 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'uncoalesced string fragments'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I21b2a0d87cbf610fc48e273ed78ab779ad4a6932 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65832 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'concatenated string without spaces between elements'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I04e58aca4a30e82f3da0cda08403d0daf3b5fb10 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65831 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'check indentation of a line with a break'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I79170a45cd8184ebc816b4f16656a3cfdc257f60 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'check for logical continuations'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I222e3378ded4cd73d0141cd1e38ac3282d311cc4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65827 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'check for adding lines without a newline'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bd68e9a6609a3dfa7dc856f24e4b616714d9990 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-19lint/checkpatch: Update 'check for assignments on the start of a line'Elyes Haouas
This reduce the difference with linux v5.19-rc7. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ia7d4b0176bad849e79f037f74c3d99ce9eb061c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65825 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-07-15util/xcompile/xcompile: Define GCOV_${TARCH}Yu-Ping Wu
When payloads analyze the coverage using gcov (or lcov), the gcov version must match the CC version. Otherwise gcov would fail to parse the .gcno files. Therefore, define GCOV_${TARCH} in xcompile, so that payloads don't need to do tedious string manipulations to find the right gcov path. Change-Id: If2fc329810c463a3d2c56deaf4e4a3fc3c0a3ed9 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65840 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org>
2022-07-14commonlib: Substitude macro "__unused" in compiler.hBill XIE
Since there are many identifiers whose name contain "__unused" in headers of musl libc, introducing a macro which expands "__unused" to the source of a util may have disastrous effect during its compiling under a musl-based platform. However, it is hard to detect musl at build time as musl is notorious for having explicitly been refusing to add a macro like "__MUSL__" to announce its own presence. Using __always_unused and __maybe_unused for everything may be a good idea. This is how it works in the Linux kernel, so that would at least make us match some other standard rather than doing our own thing (especially since the other compiler.h shorthand macros are also inspired by Linux). Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Change-Id: I547ae3371d7568f5aed732ceefe0130a339716a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65717 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-07-14util/spd_tools: Add support for 7500 MT/s lp5 modulesJack Rosenthal
spd_tools does not support LP5x modules yet, and the easiest way to do this is to add support for 7500 MT/s in lp5.go (reference the comments on CB:65063). BUG=b:238674174 BRANCH=firmware-brya-14505.B TEST=With follow-on CL, run: util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5 Signed-off-by: Jack Rosenthal <jrosenth@chromium.org> Change-Id: I1558d69bc6f28c02c20aa9cd87d4543c1cf52afd Reviewed-on: https://review.coreboot.org/c/coreboot/+/65794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org> Reviewed-by: Caveh Jalali <caveh@chromium.org>
2022-07-14util/spd_tools: Add Intel Meteor Lake (MTL) platformSubrata Banik
This patch add support for MTL platform to the `spd_tools`. This would be useful to create dynamic SPD for rex variants. BUG=b:224325352 TEST=Able to generate SPD for LP5 DRAM part. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I1db6e3a63d2842c12ef0f256ba1d32b9258670f8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65473 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tarun Tuli <taruntuli@google.com>
2022-07-14Remove executable flag from source codes and text filesPetr Cvek
Markdown, definition file and sconfig source codes don't need to be executables. This patch fixes that. Signed-off-by: Petr Cvek <petrcvekcz@gmail.com> Change-Id: Ic97d684318c689259f7895e3dfbd552434c3882e Reviewed-on: https://review.coreboot.org/c/coreboot/+/65807 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-07-12util: Allow installing to a build rootTim Crawford
Modify util Makefiles to allow installing to a build root specified by DESTDIR. Allows using the `install` target for packaging. Change-Id: I3a31ea0fde9922731e1621dcc8f94b2c1326c93c Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60540 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <patrick@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-07-06util/release/build-release: Use `git log … -1` over `|head -1`Paul Menzel
Avoid piping to `head` to print the top line, and do it in `git log` directly. Change-Id: Id9b99b06c5bdd9c381bd039fc1914a9a2f332aa6 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64941 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-07-04treewide: Unify Google brandingJon Murphy
Branding changes to unify and update Chrome OS to ChromeOS (removing the space). This CL also includes changing Chromium OS to ChromiumOS as well. BUG=None TEST=N/A Change-Id: I39af9f1069b62747dbfeebdd62d85fabfa655dcd Signed-off-by: Jon Murphy <jpmurphy@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65479 Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-30util/amdfwtool: Initalize all variables before useFred Reitberger
Not all of the fields of the amd_cb_config structure were properly initialized. Rather than initialize each field individually, initialize the entire structure to 0. TEST: Boot chausie Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: Ia343f01bce3956d66d01ce485b43963193c9df31 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65533 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-06-27crossgcc: Upgrade CMake from 3.23.0 to 3.23.2Elyes Haouas
Change-Id: I3613522fa2a958d2a42674f17aa794bdda4ca74a Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63123 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-23nvramtool: Fix building on Linux systems with musl libcEvgeny Zinoviev
Current implementation only supports glibc (by looking for __GLIBC__) and fails to build on systems with alternative libc implementations, such as musl; sys/io.h is never included, there are no outb/inb functions which results in undefined references at linking stage. Using __linux__ instead of __GLIBC__ to test whether the system is Linux seems to be a more proper way to detect Linux and it also fixes nvramtool compilation on musl systems. Tested on Gentoo Linux with musl 1.2.2 (builds and works fine) and Void Linux with glibc (still builds and works fine). Change-Id: Idcdc3a033b40f16a6053209813f1e06209ee459a Signed-off-by: Evgeny Zinoviev <me@ch1p.io> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48757 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-23util/ifdtool: Fix printing or setting PCH strapsArthur Heymans
When printing or setting the PCH straps use the PSL directly instead of multiplying it by 4. Change-Id: Ia91697fdf0c6d80502e8611b259c444f39c6cd57 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55753 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-06-22util/lint: Add coreboot specific dictionary fileMartin Roth
This is a wordlist that I've compiled to use in spellcheckers to ignore all of the coreboot specific terms. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I718519000eaf31786380474eb71b99ca442e3bed Reviewed-on: https://review.coreboot.org/c/coreboot/+/64809 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-22util/inteltool: Add an additional Device ID for Intel HD 4400 GPUArashk Mahshidfar
Add 0x0A16 as a Device ID for Intel HD 4400 Change-Id: I0129376c0ce005c1bfabaa9dbd8d8dfc6c92e5d3 Signed-off-by: Arashk Mahshidfar <arashkmahshidfar@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64543 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-06-19util/cbfstool: Set `USE_FLASHROM=0` to build vbootAngel Pons
cbfstool does not need to build vboot with flashrom support. TEST=./util/abuild/abuild -a --timeless -y -c $(nproc) -Z -t hp/280_g2 no longer fails due to missing libflashrom.h header. Change-Id: I57edcb1b67baa4c458874b11e9ca0238b4419c46 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-06-16util/cbfstool/common.c: Deduplicate buffer_create() logicEdward O'Callaghan
BUG=b:207808292,b:231152447 TEST=builds with vboot_ref uprev. Change-Id: Id7d9b6f5254b08720eebb37151e12ee68ed7f8d7 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65145 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-06-16util/cbfstool: Decouple elogtool from vboot_ref flashrom codeEdward O'Callaghan
Currently elogtool sub-proccesses flashrom as calling libflashrom requires a missing function from the previous flashrom release. Pending a new release of flashrom we must continue to use subprocess. However the current subprocess wrapper implementation lives in vboot_reference which is a git sub-module of coreboot. This causes all sorts of grief keeping a subprocess ABI stable from vboot_reference when the rest of vboot_reference builds of HEAD of the flashrom tree (i.e., using unreleased libflashrom functions). In order to not keep finding ourseleves in a bind between the two separately moving trees with different build environments, decouple elogtool with its own mini copy of flashrom subprocess wrapping logic. Squash in, util/cbfstool/elogtool.c: Convert args into struct in flashrom helper vboot signatures for flashrom r/w helpers changed in the upstream commit bd2971326ee94fc5. Reflect the change here to allow vboot ref and coreboot to realign. BUG=b:207808292,b:231152447 TEST=builds with vboot_ref uprev. Change-Id: I04925e4d9a44b52e4a6fb6f9cec332cab2c7c725 Signed-off-by: Edward O'Callaghan <quasisec@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-06-14util/mb/google: add support for nissaShou-Chieh Hsu
Add the file template for creating a new variant of Nissa. BUG=b:229550821 Signed-off-by: Shou-Chieh Hsu <shouchieh@google.com> Change-Id: I04f75ff91f9851b82641f703ba950b04c22e2e72 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64045 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-06-13util/liveiso: Update to NixOS 22.05Felix Singer
Update configs for NixOS 22.05. pulseaudio-modules-bt has been abandoned, and is superseded by pulseaudio's native Bluetooth functionality. Thus, remove it. Change-Id: Ic3b1dbc3c2ab092b576ba2151c93c74d4f298efc Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64969 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-06-10crossgcc/gnat.patch: Add additional gnatlib object filesNico Huber
Newer host versions of gnatbind miss these when building the cross gnat1 and gnatbind. Tested with the following host compilers with and without bootstrapping that the resulting coreboot images of three boards stay the same: * GCC 4.9.2 (Debian) * GCC 6.3 (Debian) * GCC 7.4 (Debian) * GCC 8.3 (Debian) * GCC 9.4 (Debian) * GCC 10.2 (Debian) * GCC 12.1 (ArchLinux) Change-Id: I09c6b3cc7b15f1c505acd3ec2c1959b101d6dfb7 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/65000 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-06-10crossgcc/gnat.patch: Never treat warnings as errorsNico Huber
We used to disable individual warnings that are expected when building our GCC version with a newer one. Not all warnings can be disabled indvidually, though, and it's much easier to simply allow warnings. As a plus, we get the warnings in the log (in case anybody would ever look into it). Partially fixes building with host GCC 12.1. Change-Id: I8fafec4fc49db73b6dba311c775eea2cc92a9b48 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64999 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-06-07util/util_readme: update to give additional informationMartin Roth
Add a note to the top of the util.md document saying not to edit it. The Documentation/util.md file had been updated to contain additional information at the bottom. This copies that information into the file after it's been created. Change-Id: I4b08439420ceb706df62e3949406585ea34c1514 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64580 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-06-07util, Documentation: Run util_readme.sh to regen util.mdMartin Roth
Change-Id: Ie14204d0637bb5081e2fae4a9a0e2590bf7abeeb Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64582 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-06-07cbfstool: Expand CBFS verification validity checkJulius Werner
This patch adds a new line to `cbfstool print -v` output that records the overall CBFS verification health of the image. While this info was already visible from individual fields before, it's nice to have a one-stop location to see "this is a good image" without having to carefully parse a lot of output manually. Also add a few lines to the Makefile that check whether this field is valid for the final image (it always should be, but hopefully this check will allow us to catch regressions like the one fixed by CB:64547 sooner in the future). BUG=b:233263447 Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I1b74b01a55b22294556007aaee835d0fdb9e1c63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64657 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-06-03inteltool/gpio_names/tigerlake.h: Fix HVMOS pad countMichał Żygowski
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I344fd2db9d53ad5e82240aaa2b766ac0d8a2045d Reviewed-on: https://review.coreboot.org/c/coreboot/+/64464 Reviewed-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2022-06-03util/scripts/cross-repo-cherrypick: Modify output formatPatrick Georgi
As far as I know the Chromium OS team is the only user of this script, so align its output with that of other tools used there: - Replace "Original-Commit-Id" with "GitOrigin-RevId" - Reuse Change-Id instead of moving it to the Original- prefix, which leads to the creation of a new Change ID. Change-Id: I8c39c512901c83a64f00aa48a539e6621f827242 Signed-off-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60979 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-06-03util/release/build-release: Use short git hash for .coreboot-versionMartin Roth
Builds were suddenly failing when the release was done, because the coreboot version was overflowing a 64 character limit. We don't need or use the full hash in other places, so limit the hash to just what's needed to identify the commit. Change-Id: I57c535ca251792cae2c9a9c951e6b44bb61e4e78 Signed-off-by: Martin Roth <martin@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64923 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2022-06-01cbfs: Add CBFS_TYPE_INTEL_FIT and exclude it from CBFS verificationJulius Werner
The Intel Firmware Interface Table (FIT) is a bit of an annoying outlier among CBFS files because it gets manipulated by a separate utility (ifittool) after cbfstool has already added it to the image. This will break file hashes created for CBFS verification. This is not actually a problem when booting, since coreboot never actually loads the FIT from CBFS -- instead, it's only in the image for use by platform-specific mechanisms that run before coreboot's bootblock. But having an invalid file hash in the CBFS image is confusing when you want to verify that the image is correctly built for verification. This patch adds a new CBFS file type "intel_fit" which is only used for the intel_fit (and intel_fit_ts, if applicable) file containing the FIT. cbfstool will avoid generating and verifying file hashes for this type, like it already does for the "bootblock" and "cbfs header" types. (Note that this means that any attempt to use the CBFS API to actually access this file from coreboot will result in a verification error when CBFS verification is enabled.) Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I1c1bb6dab0c9ccc6e78529758a42ad3194cd130c Reviewed-on: https://review.coreboot.org/c/coreboot/+/64736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-06-01cbfs: Rename TYPE_FIT to TYPE_FIT_PAYLOADJulius Werner
There are too many "FIT" in firmware land. In order to reduce possible confusion of CBFS_TYPE_FIT with the Intel Firmware Interface Table, this patch renames it to CBFS_TYPE_FIT_PAYLOAD (including the cbfstool argument, so calling scripts will now need to replace `-t fit` with `-t fit_payload`). Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: I826cefce54ade06c6612c8a7bb53e02092e7b11a Reviewed-on: https://review.coreboot.org/c/coreboot/+/64735 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-05-31util/docker: Update dockerfilesMartin Roth
- Remove deprecated "MAINTAINER" lines - Add Sphinx tools to coreboot-jenkins-node to check documentation. - Add mdl to check markdown - Alphabetize packages in docs Dockerfile - Add jinja2 version 3.0.3 to the docs Dockerfile - The latest version breaks with the error: "exception: cannot import name 'contextfunction' from 'jinja2'" Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ia1de62621a6aef4ecd055a1a3afbebad34448002 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64655 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-05-30util: Update description filesMartin Roth
- Spelling fix - Add languages - Update formatting - Move notes that shouldn't be in the description file to a README Change-Id: I4af37327d5834f8546a3f967585658fb5686f17a Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-05-30util: Fix a few spelling mistakesMartin Roth
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ib6f0232292c9e289ee1e87998493ea70beea8e78 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64750 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-05-30Documentation: Move intelp2m from description.md to DocumentionMartin Roth
The description.md file for the intelp2m utility wasn't the description that was needed - just a subject, and what language it was written in. It was instead a set of more full documentation, so move it into the Documentation directory and create a new description file. Change-Id: Ia180ae41f91f8b8eb408351a9e44e899edc031d3 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64578 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-05-29util/lint/checkpatch: Add alloc functions to alloc with multiplies checkElyes Haouas
This reduce difference with linux v5.18. Change-Id: Id9412f7b6c0b9f76b39a094142aaded5c2aa1059 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64740 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-29util/lint/checkpatch: Update 'Check for compiler attributes'Elyes Haouas
This reduce difference with linux v5.18. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I817630321587dec515cd94aa7b73a17819526190 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64604 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-29util/lint/checkpatch.pl: Use 'allocFunctions'Elyes Haouas
This reduce difference with linux v5.18. Change-Id: I1fc71b9cb6a4e4f8b27fbe6d45f4fa4e2c236157 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-28util/inteltool: Add support for Alder Lake chips detection and GPIOsMichał Kopeć
Add PCI IDs for Alder Lake H devices and their GPIO tables. PCI IDs as per Intel PCH-H EDS Vol1 (doc #619362). TEST=dump GPIOs on i5-12600K with Z690 chipset Change-Id: I0001395517e1e7977b0f808d5d74cf85c52298d6 Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63374 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2022-05-28abuild: Build with clang only when supportedArthur Heymans
This changes the behavior of '-L/--clang' to only buildtest when a target has ARCH_SUPPORTS_CLANG set. Change-Id: I362fcd0f795d27f13dde793a79774f08c497bd38 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-28util/lint/checkpatch: Warn on period at the end of commit subjectMartin Roth
This gives a warning when there's a period at the end of the commit subject line. Change-Id: If95bef3ba01e0ac13ce18045928081040abef4fd Signed-off-by: Martin Roth <martin@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63032 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-05-28util/lint: Subtract the patch format string from subject lengthMartin Roth
Checkpatch was looking for a 65 character length, but format-patch adds the text "Subject: [PATCH] " before the actual subject. Checkpatch needs to account for that when looking at the line length. Lines 2863 & 2864 have their indentation fixed as well. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I2f2ee6e0f1b14ae6393ed7e64ba1266aa9debc7d Reviewed-on: https://review.coreboot.org/c/coreboot/+/64656 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-05-28util/lint: Add commit message parsing to checkpatch_json scriptMartin Roth
The commit message wasn't being parsed because there's no filename associated with it in the patch output. This change adds the "filename" for the commit message in Gerrit for any errors that have a line number but no filename. calculations is intentionally misspelled as cacluations as a test. Change-Id: Ie7a2ef06419c7090c8e44b3b734b1edf966597cc Signed-off-by: Martin Roth <martin@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63031 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-05-25util/intelp2m: Add support for Alder Lake macro generationMichał Kopeć
Add support for Alder Lake as a separate parsing profile, copying the existing 'Cannon' profile and adjusting for differences in reset mapping and GPIO macro generation. TEST=Generate GPIO macros for MSI PRO Z690-A Change-Id: I5871394bcb0636c2c803607ffb129441aa934417 Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63403 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
2022-05-24util/lint/checkpatch.pl: Reduce difference with linux v5.18Elyes Haouas
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Id5eb4823399088746a34721a9855bbaf5f97b7b6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64572 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-16Allow trailing whitespaces in .md filesMaximilian Brune
Two trailing whitesspaces have an actual meaning in Markdown files (a new line). Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com> Change-Id: Ibdb92ee857ee4ad32b6afb84ace427b27b41bb7c Reviewed-on: https://review.coreboot.org/c/coreboot/+/64032 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-16util/testing: Remove amdfwread from makefileRobert Zieba
amdfwread was added to the testing makefile but ended up not becoming a separate tool. This commit removes it from the makefile so that `make distclean` works again. Fixes: 29bc79fddb62c30caa33474ac773ae6a6ec1c4f0 ("util/amdfwtool: Add amdfwread utility") TEST=Ran `make distclean` Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: I2c8b920bc69d6c20558a28515c52a1e9cecebe27 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64348 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-05-16util/inteltool: Add support for Gemini LakeSean Rhodes
Tested on: * StarLite Mk III (N5000) * StarLite Mk IV (N5030) Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I0ef7619c04db66ea0c6e179bdf0a58ed1ab61a48 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58537 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-16util/lint/lint-stable-019: Update grep '\s' to [[:blank:]]Martin Roth
For some reason, the '\s' syntax is causing an error for me under freebsd. It's entirely possible that I'm doing something wrong, but this change should be fine regardless. Freebsd's grep, GNU grep, and git grep all handle posix regex classes, so this change should be transparent. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I489ec13b4ea2e9c17692888e42b8741763b1a2c5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63532 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-05-16util/lint/checkpatch.pl: Fix "uninitialized value" error messageElyes Haouas
Change-Id: I74807f240779060158c6769f63a6e9438a6e5fbe Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64173 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-16util/lint/checkpatch.pl: Fix "Invalid color mode" error messageElyes Haouas
Remove duplicated code: "if ($color =~ /^[01]$/) { $color = !$color; } elsif ($color =~ /^always$/i) { $color = 1; } elsif ($color =~ /^never$/i) { $color = 0; } elsif ($color =~ /^auto$/i) { $color = (-t STDOUT); } else { die "$P: Invalid color mode: $color\n"; }" Change-Id: I5713c364edea806e58df26c3a37b4bba7603ed0a Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64172 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-13util/amdfwtool: Add amdfwread utilityRobert Zieba
Amdfwtool creates AMD firmware images however there is currently no way to get information from an existing image. This commit adds amdfwread to support that functionality. At the moment only reading PSP soft fuse flags is supported. Example usage: `amdfwread --soft-fuse bios.bin`, example output: `Soft-fuse:0x400000030000041`. BUG=b:202397678 TEST=Ran amdfwread and verified that it correctly reads the soft fuse bits, verified that built AMD FW still boots on DUT Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: I15fa07c9cad8e4640e9c40e5539b0dab44424850 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62795 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
2022-05-13xcompile,clang: increase the number of bracket-depth for CPPArthur Heymans
Clang has a limit for the number of nested brackets in CPP. For soc/intel/common/block/include/intelblocks this is a problem as it largely exceeds the default limit of 256. Change-Id: I93038f918e07f735394fc495a8ed7371cc5b1569 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62175 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-05-05util/amdfwtool: Add IKEK key for Trusted ApplicationKarthikeyan Ramasubramanian
This binary file is required for use by Trusted Applications that execute in PSP. BUG=b:229947314 TEST=Build and boot to OS in Skyrim. Change-Id: I2d05792cfd98fa9c38f5deef1ac3282625983eeb Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64040 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-05-05cbfstool: MediaTek: Hash bootblock.bin for CBFS_VERIFICATIONYu-Ping Wu
MediaTek's bootROM expects a SHA256 of the bootblock data at the end of bootblock.bin (see util/mtkheader/gen-bl-img.py). To support CBFS verification (CONFIG_CBFS_VERIFICATION) on MediaTek platforms, we need to re-generate the hash whenever a file is added to or removed from CBFS. BUG=b:229670703 TEST=sudo emerge coreboot-utils TEST=emerge-corsola coreboot chromeos-bootimage TEST=Kingler booted with CONFIG_CBFS_VERIFICATION=y Change-Id: Iaf5900df605899af699b25266e87b5d557c4e830 Signed-off-by: Yu-Ping Wu <yupingso@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63925 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-05-04util/scripts: Add options to update_submodulesMartin Roth
This extends and adds various options to the update_submodules script. Extensions: - Add help text - Add all options, but specifically allow a single repo to be specified, along with a minimum number of changes instead of being fixed at 10. - Make it a more formal script with main() and functions - Show changes in commit message, unless there are > 65 commits. Options: -c | --changes <#> Specify the minimum number of changes to update a repo -h | --help Print usage and exit -R | --repo <dir> Specify a single repo directory to update -s | --skipsync Assume that repos are already synced -V | --version Print the version and exit This does not fix style issues in the original, which will be fixed in a follow-on commit. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I222103babff7d5f4f8eb02869c598a4e06748a17 Reviewed-on: https://review.coreboot.org/c/coreboot/+/60831 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-05-02utils/cbfstool: Disable Wstrict-prototypes warningManoj Gupta
As recommended on crrev.com/c/3612466 lz4 code is not supposed to be modified. Since both gcc and clang complain about functions without explicit void in argument with Wstrict-prototypes, just disable it instead instead of enabling. BUG=b:230345382 TEST=llvm tot test BRANCH=none Signed-off-by: Manoj Gupta <manojgupta@google.com> Change-Id: I9f3ae01821447f43b4082598dd618d9f8325dca2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63936 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-27util/cbmem: fix an unused parameter issue in timestamp_getNick Vaccaro
Fix an unused parameter error when building on devices where __i386__ and __x86_64__ are not defined. BUG=none TEST=none Change-Id: I6c04c8e7b931565c87d358aac1025ebcb7617b13 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63880 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-25amdfwtool: Use command line option use-combo to decide if use comboZheng Bao
The macro PSP_COMBO is removed and instead use the flag use_combo. As long as this flag is false, the amdfwtool behaves the same way as the macro does. Change-Id: Ief0d78ae1e94b8183d6cf3195935ff9774fee426 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55455 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-04-25amdfwtool: Change the name of macros for 'BHD'Zheng Bao
Use BHD instead of BDT as the name of cookie macro. Use L2 to make it clear it is for level 2. The 'BHD2' is misleading, which is going to be used for combo entry. The definition in psp_verstage is also changed. Change-Id: Ia10ac5e873dab6db7d66e63773a7c63f504950b2 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-04-25cpu/x86/64bit: Generate static page tables from an assembly fileArthur Heymans
This removes the need for a tool to generate simple identity pages. Future patches will link this page table directly into the stages on some platforms so having an assembly file makes a lot of sense. This also optimizes the size of the page of each 4K page by placing the PDPE_table below the PDE. Change-Id: Ia1e31b701a2584268c85d327bf139953213899e3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63725 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-04-24util/lint/checkpatch.pl: Update lines related to CONST_STRUCTElyes Haouas
Update to v5.18-2 version. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I0fe2ec6a74a4b8c70452fbf05d534a37e1ea2c26 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63582 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24util/lint/checkpatch.pl: Add strlcpy checkElyes Haouas
Update to v5.18-2 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ic4eaa3f26bcd60ea509a52d5715c7ce1f43b6d3d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24util/lint/checkpatch.pl: Update C99_COMMENT_TOLERANCE linesElyes Haouas
Update to v5.18-2 version. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: If230fa5cd01ab3ce91d8c910667c3d609cf978b0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63580 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24util/lint/checkpatch.pl: Update TYPECAST_INT_CONSTANT linesElyes Haouas
Update to v5.18-2 version. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I8ed89e53f647b1b071abff33a434fb3b8dbb1de1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63579 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24util/lint/checkpatch.pl: Update the check of repeated wordsElyes Haouas
Update to v5.18-2 version. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I7f5e597bb76e1b9feeb2d6ea290626f45e9fe6c0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63577 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24lint/checkpatch.pl: Update to v5.18-2 lines related to "CONFIG_"Elyes Haouas
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I8589d053871ad9ac64ae2f8fc380710be8e4556b Reviewed-on: https://review.coreboot.org/c/coreboot/+/63576 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24util/lint/checkpatch.pl: Update lines related to max_line_lengthElyes Haouas
Upadate to v5.18-2 version. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ib9927bfa98e20d4b621bf7abecec234b4754ee9c Reviewed-on: https://review.coreboot.org/c/coreboot/+/63439 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24util/lint/checkpatch.pl: Update lines related to tabsizeElyes Haouas
Update to v5.18-2 version. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I6651a3f8e79beca2e1235fe8de3217875f81ba2b Reviewed-on: https://review.coreboot.org/c/coreboot/+/63438 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-24util/lint/checkpatch.pl: Update to v5.18-2 lines related to verbosityElyes Haouas
Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I66f38cb01e58ee241bf58c4db83693029ddebcfa Reviewed-on: https://review.coreboot.org/c/coreboot/+/63437 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <martinroth@google.com>
2022-04-22util/cbmem: add an option to append timestampMattias Nissler
Add an option to the cbmem utility that can be used to append an entry to the cbmem timestamp table from userspace. This is useful for bookkeeping of post-coreboot timing information while still being able to use cbmem-based tooling for processing the generated data. BUG=b:217638034 BRANCH=none TEST=Manual: cbmem -a 1234 to append timestamp, verify that cbmem -t shows the added timestamp. Change-Id: Ic99e5a11d8cc3f9fffae8eaf2787652105cf4842 Signed-off-by: Mattias Nissler <mnissler@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62639 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-14coreboot_tables: Replace 'struct lb_uint64' with lb_uint64_tJianjun Wang
Replace 'struct lb_uint64' with 'typedef __aligned(4) uint64_t lb_uint64_t', and remove unpack_lb64/pack_lb64 functions since it's no longer needed. Also replace 'struct cbuint64' with 'cb_uint64_t' and remove 'cb_unpack64' in libpayload for compatible with lb_uint64_t. Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Change-Id: If6b037e4403a8000625f4a5fb8d20311fe76200a Reviewed-on: https://review.coreboot.org/c/coreboot/+/63494 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-14util/apcb/apcb_v3_edit.py: Edit APCB based on different SPD magicKarthikeyan Ramasubramanian
APCB edit tool edits APCBs with LP4 specific SPDs. Introduce an option to support different SPD magic so that the tool can be used to edit APCBs with LP5 specific SPDs. BUG=None TEST=Build Skyrim board with LP5 specific SPDs. Build Guybrush board with LP4 specific SPDs. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I8e96c89e4e5ce8e0567a17bf7685b69080fa1708 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63598 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Rob Barnes <robbarnes@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-14util/spd_tools/part_id_gen: Support Sabrina SoCKarthikeyan Ramasubramanian
Add support to generate DRAM part ID for boards using Sabrina SoC. BUG=None TEST=Generate DRAM part ID for Skyrim mainboard. Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: Ica57b12239019831f7bf93982be3c93b7f8b6986 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Robert Zieba <robertzieba@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-04-14util/amdfwtool: Maintain one copy of PSP Level2 entriesKarthikeyan Ramasubramanian
AMDFWtool maintains 2 copies of PSP Level2 entries - one in primary slot A (Type 0x48) and another in backup slot B (Type 0x4A). On boards which use VBOOT with 2 RW firmware slots, maintaining 2 copies of PSP Level2 entries in each FW slot is redundant and space-consuming. Introduce option to maintain only one copy of PSP Level2 entries and point to it from both slots A & B. BUG=None TEST=Build and boot to OS in Skyrim. Ensure that only one copy is added to each FW slot. This achieved a space saving of 1.5 MB in each FW slot. Before: apu/amdfw 0x415fc0 raw 3043328 none After: apu/amdfw 0x415fc0 raw 1556480 none Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Change-Id: I06eef8e14b9c14db1d02b621c2f7207188d86326 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63509 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-04-13amdfwtool: Add a flag to record the second gen instead of romsigZheng Bao
This is for future feature combo, which gets the soc id from fw.cfg in a loop instead of the command line, and the romsig is not set until fw.cfg is processed. Change-Id: Id50311034b46aa1791dcc10b107de4af6c86b927 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-04-11util/lint/checkpatch.pl: Update to v5.18-2 lines related to "codespell"Elyes Haouas
Change-Id: I55cc4255ea88723c813a04d87e4c028c64f92dbd Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63435 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2022-04-06superiotool/ite: add IT8625E EC registersMichał Kopeć
Add support for dumping ITE IT8625E Environmental Controller registers. Values as per "IT8625E Preliminary Specification V0.3 (For D Version)". Change-Id: I68aad90097206c6b8ef40075530c00809d9511e2 Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63310 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-04-05amdfwtool: Add a macro to set explicitly second gen for old SOCsZheng Bao
It is more reasonable than getting the value from memset. For the reserved bits, keep them as they were for old SOCs. Change-Id: I65caa11e835d2ff52bec4b8904057bbced434891 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-04-05util/spd_tools: Add ability to override SPD file for partsRobert Zieba
This commit adds the ability to override the SPD file that is used for a specific part. BUG=b:224884904 TEST=Verified that generated makefile uses specified SPD file and that it remains unchanged when this capability is not used Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: I078dd04fead2bf19f53bc6ca8295187d439adc20 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63281 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rob Barnes <robbarnes@google.com>
2022-04-04crossgcc: Upgrade IASL from 20211217 to 20220331Elyes Haouas
"REDUNDANT_OFFSET_REMARK" to ignore redundant offset remarks is not needed any more as it’s included upstream. Changes: https://acpica.org/node/199 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ice7f9a10051f7f62c53098161fd2f498d724c17d Reviewed-on: https://review.coreboot.org/c/coreboot/+/63279 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-04-04crossgcc: Upgrade CMake from 3.22.2 to 3.23.0Elyes Haouas
Release Notes: https://cmake.org/cmake/help/v3.23/release/3.23.html Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ib31124baa3cae65211ad361a7d41c9504105be91 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63246 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-04-03util/amdfwtool/data_parse: fix SPL table handling regressionFelix Held
Use the SPL table binary from the config file if no override is specified via the spl-table command line argument. This fixes a regression caused by commit 6c5ec8e31ccbe3d9bbf201c956fc3b54703a9767 (amdfwtool: Add options to support mainboard specific SPL table). Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I93419a878b41b1dfcbf58d930740aaae553120f6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63314 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-04-02util/cbmem: add type castPaul Fagerburg
arch_convert_raw_ts_entry returns a uint64_t, which needs to be cast on ARM systems to avoid a type error. BUG=b/227871959 TEST=no build errors in downstream Signed-off-by: Paul Fagerburg <pfagerburg@google.com> Change-Id: I87a83758b7f122b77f9631c669c7cd8df66f8d1b Reviewed-on: https://review.coreboot.org/c/coreboot/+/63317 Reviewed-by: Rob Barnes <robbarnes@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-01util/ifittool: Fix clearing FIT when setting the pointerArthur Heymans
When setting the FIT pointer, the FIT table is only known later in the codeflow. Change-Id: I658f4fffa997d1f7beaf6d6ae37d2885ae602e5c Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63035 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-31util/cbmem: Add FlameGraph-compatible timestamps outputJakub Czapiga
Flame graphs are used to visualize hierarchical data, like call stacks. Timestamps collected by coreboot can be processed to resemble profiler-like output, and thus can be feed to flame graph generation tools. Generating flame graph using https://github.com/brendangregg/FlameGraph: cbmem -S > trace.txt FlameGraph/flamegraph.pl --flamechart trace.txt > output.svg TEST=Run on coreboot-enabled device and extract timestamps using -t/-T/-S options Signed-off-by: Jakub Czapiga <jacz@semihalf.com> Change-Id: I3a4e20a267e9e0fbc6b3a4d6a2409b32ce8fca33 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62474 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-30util/amdfwtool: use ISH support for Sabrina SoCFelix Held
The PSP in the Sabrina SoC uses the image slot header to find the second level PSP directory table, so it needs the ISH to be generated. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I9e6308854147c9f6f72d722215c833ee86ee4f94 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63186 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-30util/amdfwtool: add Sabrina SoC typeFelix Held
Add PLATFORM_SABRINA to the enum of supported platforms and integrate it into the existing code. Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ibe52b44395619f697686bd900a522562abbe7646 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-03-30util/amdfwtool: select A/B recovery when ISH is usedFelix Held
In newer AMD SoCs, the image slot header is used in the AMD A/B recovery scheme, so set recovery_ab to true when need_ish is true. Also move the block of code before the process_config call, since that call will already use the recovery_ab field of the cb_config struct. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I65903765514f215bf5cc9b949d0b95aff781eb34 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63184 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-30util/amdfwtool: use table-relative addressing in ISH caseFelix Held
When the image slot header (ISH) is used, the addresses in the PSP and BIOS directory tables need to be relative to the beginning of the table. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia61f7c8313d5a1af95c68b9177a53a2f5443552a Reviewed-on: https://review.coreboot.org/c/coreboot/+/63183 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-08 16:04:38 +0000