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2023-02-13amdfwtool: Remove command line option soc-nameZheng Bao
5/5 of split changes of https://review.coreboot.org/c/coreboot/+/58552/28 Change-Id: Iba2ebd5d0310538e04c07493d28039509ad02321 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72468 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-13util/autoport: Fix the typo of ehci2 in bd82x6x.goIru Cai
This corrects the word "echi2" to "ehci2". Change-Id: Id8911de147538f4614627cfca449bad528ab6780 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72997 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-02-11amdfwtool: Put soc name setting to fw.cfg from command lineZheng Bao
The fw.cfg should combine the SOC name. This is for future combo feature. Each entry in combo has its own fw.cfg. The soc_id in struct cb_config can only be available after the fw.cfg is processed. Some functions which take soc_id as a parameter can be simplified. 3/5 (and the key one with same change ID) of split changes of https://review.coreboot.org/c/coreboot/+/58552/28 Change-Id: Ib0eead1f2156542ea03d58145f5ad67683bf9b52 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58552 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-10util/chromeos/extract_blobs: allow passing dest dir as argMatt DeVillier
Allow user to pass the output dir for the extracted blobs as the 2nd argument to the script; if not provided, fall back to the existing default. Change-Id: I0f120b69e0b6d14c2763b9a3b2a622e77c4fe0d4 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72910 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2023-02-10amdfwtool: Move soc_id to cb_configZheng Bao
Save the soc_id into a global struct. Change-Id: I2a0f04a09635086e3076a97b535df8a19d0693ce Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72450 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-09util/amdfwtool: Add UMSMU blob supportFred Reitberger
Add PSP blob Type 0xA2 uMsmu support. Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: Ib38ec03bf20f46774f7438b21d18704cc1ec57fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/72900 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ritul guru <ritul.bits@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-02-09amdfwtool: Parse the line with SOC_NAMEZheng Bao
We need to put soc name to fw.cfg for future combo feature. We skip for now when SOC_NAME is found. 1/5 of split changes https://review.coreboot.org/c/coreboot/+/58552/28 Change-Id: I2b8d7154d22db13675ff57b6abe61c747604c524 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-09amdfwtool: Add SOC family definition for CarrizoZheng Bao
For Carrizo, the soc name was set as UNKNOWN. The change is supposed to be binary unmodified, except the SPI settings. According to the spec, the Stoneyridge and Carrizo have the same definition of SPI setting in EFS. Change-Id: I9704a44773b2f541f650451ed883a51e2939e12a Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66823 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-09amdfwtool: Allow the location to be a relative addressZheng Bao
When the BIOS size is more than 32M, the physical address of EFS header will be complicated, like 0xfe020000 or 0xfc020000. So we make it simpler to allow to use relative address. This CL works with https://review.coreboot.org/c/coreboot/+/69852 TEST=Result image is binary same on amd/birman amd/majolica amd/gardina amd/mandolin Change-Id: I4308ec9ea05a87329aba0b409508c79ebf42325c Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69856 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-08util/testing: Allow scanbuild test to be skippedMartin Roth
This is currently killing the jenkins builds. This patch allows it to be disabled until the reason is found. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I16dba80a88953aa95f7f647ba12b2ec3297ab81f Reviewed-on: https://review.coreboot.org/c/coreboot/+/72801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-02-08amdfwtool: Report the address of EFS header and bodyZheng Bao
The address mode is an internal mode which AMD FWs use. Regular developers don't have to know that. Just report the relative address every time. For the cases head and body are split, the address of body is also reported. Change-Id: I77d9aac0b3d996363341c1d2dae049ec344b39aa Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71651 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-07util/abuild: Add flags to allow abuild to skip boardsMartin Roth
This change adds 2 command line parameters, --skip_set and --skip_unset that allows abuild to skip boards with particular Kconfig values either set or not set. Note that it only works on BOOL type variables. This can be set on the abuild command line, or the JENKINS_ABUILD_OPT= variable on the make command line. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I43336484cf25f83065ec7facf45c123d831024b5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71730 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-02-07tree: Drop repeated wordsAlexander Goncharov
Found-by: linter Change-Id: I7c6d0887a45fdb4b6de294770a7fdd5545a9479b Signed-off-by: Alexander Goncharov <chat@joursoir.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72795 Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-06util/docker: Add libgpiod-dev to coreboot-sdk for flashromMartin Roth
Flashrom needs libgpiod-dev to build the new bitbanging programmer driver for Linux libgpiod. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I88f7e11fab115487cc44d4b89b3eab4745ad058d Reviewed-on: https://review.coreboot.org/c/coreboot/+/72371 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
2023-02-06amdfwtool: Add phoenix and glinda in get_psp_fw_typeZheng Bao
Change-Id: If80cc5396703cef41cc615008c9f0dac0b7bbb09 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72717 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kangheui Won <khwon@chromium.org>
2023-02-05amdfwtool: Remove useless printing outZheng Bao
Change-Id: I819633d8d6d1886b48d53e73923add444ca032e4 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72724 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-05amdfwtool: Add a function to make the calling stack less deepZheng Bao
And make less levels of indentations in the code. Change-Id: Ib8cae386eace4f423bde9c252992625e1ff3c690 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51881 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-05util/scripts/testsoc: Pass arguments to abuildMartin Roth
This allows the user to pass one or more arguments through the testsoc script to abuild. Example: testsoc -K SOC_AMD_CEZANNE -a "--skip_unset BOARD_GOOGLE_NIPPERKIN" Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ic2bc8d656022560ed1eebf6eee0512d3633ebe84 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72766 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-04util/amdfwtool: add comment about reused PSP firmware type 0x5fFelix Held
On family 15h and 16h processors with PSP, the PSP firmware type 0x5f corresponds to AMD_FW_PSP_SMUSCS, while on family 17h and 19h this corresponds to AMD_FW_TPMLITE. Add comments to those two enum values to clarify this. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia5c125ec6a0eb548f58a457f9040278391d2101c Reviewed-on: https://review.coreboot.org/c/coreboot/+/72713 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bao Zheng <fishbaozi@gmail.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-02-04util/autoport: Use chipset.cb referencesArthur Heymans
TESTED with x220 logs. Change-Id: I89023b6c6dd5d985168331fbb12b2fc36fb65dc3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72597 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-02-04amdfwtool: Add entry RIB whose subprog equals 1Zheng Bao
For the PHX, it uses subprog 0. For the PHX2, it uses subprog 1. Change-Id: Ib013f264fc9940ad95e559fe19bba72c06a19625 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72507 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-02-03util/scripts/testsoc: Only select mainboardsFred Reitberger
The testsoc script was pulling in odd results when the -K option matched options in sources, Makefiles, and device trees. Adding another grep to limit the list to just Kconfig matches ensures that only actual mainboards are built. TEST="./util/testsoc -K PICASSO" no longer tries to build mainboard "0" Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I3860df4520a5594fb9c1a06e75487520b7d5d275 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72655 Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-02util/cbfstool: Add eventLog support for ELOG_TYPE_FW_EARLY_SOLTarun Tuli
In order to support logging events for when we show early signs of life to the user during CSE FW syncs and MRC trainings add support for the ELOG_TYPE_FW_EARLY_SOL type. BUG=b:266113626 TEST=verify event shows in eventlog CSE sync/MRC training Change-Id: I3913cb8501de9a2605266cf9988a7195576cb91d Signed-off-by: Tarun Tuli <tarun.tuli@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71296 Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2023-02-02amdfwtool: Set the level of RIB file as level 2Zheng Bao
It is about AB recovery layout which only has level 2. Change-Id: I836f11ca0bf5ad37e5093419465244a5c83318cb Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72508 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-02-02ifdtool: Introduce region_name_fmapPatrick Rudolph
Instead of directly accessing the region_name array use a helper function. This allows to move the region name array to a separate file. Change-Id: Ifc810da1628cebd2728d0185502c462ff9428597 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-02-02ifdtool: Add missing chipset_namePatrick Rudolph
Add denverton soc chipset name. Change-Id: I0fd8494123490d6ccc21af2ed30c30d50ddb4e8e Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68693 Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-02ifdtool: Drop chipset without IFDPatrick Rudolph
Drop unused chipsets that do not use an IFD. Change-Id: I999e5e5d2063b8d33819fb22296ed486e1194cbb Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68692 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2023-02-02ifdtool: Cleanup IFDv1 detectionPatrick Rudolph
Change https://review.coreboot.org/c/coreboot/+/54305 "util/ifdtool: Use -p platform name to detect IFDv2 platform and chipset" made the '-p' argument mandatory for IFDv2 platforms. Drop the IFDv2 platform CHIPSET_C620_SERIES_LEWISBURG from IFDv1 detection. Change-Id: If29f8718b7aa696cdc07deef4c98be9a68c66f10 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68680 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-02-02util/ifdtool: Add Wellsburg supportPatrick Rudolph
Wellsburg is IFDv2 compatible in most fields, but not in all. It only has 8 regions and the flash master bits match the defines for IFDv1 and thus has an "IFDv1.5" descriptor. Add a new enum for IFDv1.5 descriptor and use them to properly operate on this IFD. The 'SPI programming guide' is inconsistent and mentions 6 regions in one place, but 7 regions in another chapter. Tests showed that it actually supports 7 regions. Add support using the -p argument to specify Wellsburg platform. The previous patch made sure that only 8 regions are used and that no corruption can happen when operating in IFDv2/IFDv1.5 mode. Tested on Intel Grangeville. Documents used: Intel Document Id: 516552 Intel Document Id: 565117 Change-Id: I651730b05deb512478d059174cf8615547d2fde4 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Co-developed-by: Julian Elischer <jrelis@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68657 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-02-01amdfwtool: Remove the duplicated entry RIBZheng Bao
It should be PSP_RIB_FILE which is already there. Change-Id: Ie7471489bd34554e357510b04473102d002f9988 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72506 Reviewed-by: ritul guru <ritul.bits@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-02-01crossgcc: Upgrade LLVM version 15.0.6 to 15.0.7Elyes Haouas
Change-Id: I3198b065316b98f2d26360c4e65055e7460ea707 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-02-01crossgcc: Upgrade CMake from version 3.25.0 to 3.25.2Elyes Haouas
Change-Id: Iaf0988997c6644e0e4f02d60a1d6de0e498e19bc Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71889 Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-31util/sconfig: Remove lapic devices from devicetree parsersArthur Heymans
This is all handled at runtime now, so there is no need to have the ability to statically add lapics to the devicetree. Change-Id: I0746eb808a2956ac75f76c8189a9ecf190e33ce9 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69378 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-31crossgcc: Upgrade mpfr from 4.1.1 to 4.2.0Elyes Haouas
Changes: https://www.mpfr.org/mpfr-current/#changes Change-Id: Ife757d7a8247c11338ca795109044cdccdf86733 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71722 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-01-31crossgcc: Upgrade mpc from 1.2.1 to 1.3.1Elyes Haouas
Change-Id: I2d98c3b4c7edaf3ff097f5739c7cc0cd13592e91 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70530 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-01-31crossgcc/buildgcc: Add missing "\" at build_NASMElyes Haouas
"\" is missing at the end of CC line for build_NASM. Change-Id: Ic29ee731def31f958f939efe19bdb55b503eb6ba Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72512 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-01-30util/crossgcc/buildgcc: Remove extra "/" at the end of IASL_BASE_URLElyes Haouas
Change-Id: I8df1d93a8b0a0d562c7ae5a9f1a70f2eb26499c9 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71976 Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-27amdfwtool: Update and extend PSP header format descriptionZheng Bao
The comment in the header amdfwtool.c was written long time ago and is needed to get updated. Change-Id: I6f64c9a240503f9d0bf240916c1066944fa39d27 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-01-27elogtool: Fix potential buffer overrunKapil Porwal
BUG=b:239110778 TEST=Make sure that the output of elogtool is unaffected by this change. Signed-off-by: Kapil Porwal <kapilporwal@google.com> Change-Id: Ia1a6341abd834dd9ad5f12c9f2eefb0489364a08 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72099 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-25amdfwtool: Remove comment "fallthrough"Zheng Bao
Fix the comment as "checkpatch" says. Change-Id: Ifa5d7de037aa7024779f3aa4a5d2f5033eed264a Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71648 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-01-24util/inteltool: add support for EBG (Emmitsburg) PCHChristian Walter
EBG (Emmitsburg) PCH is used in Intel SPR-SP chipset. Its datasheet is Intel doc# 606161. Add Intel Emmitsburg PCH GPIO pin definitions. Also common code change is made to support Intel Emmitsburg PCH: a. Instead of 2 PAD registers per GPIO, it has 4 PAD registers. b. The register address space may not be contiguous from one GPIO group to the next GPIO group. Change-Id: Ia0d9179544020b6abb0be1ecd275a9a46356db8a Signed-off-by: Jonathan Zhang <jonzhang@meta.com> Signed-off-by: Christian Walter <christian.walter@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71943 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2023-01-22amdfwtool: Change the variable name to body_locationZheng Bao
The dir_location and efs_location have the same meaning. Now the dir means body. Change-Id: I02d4dc848f189449b6f0a1eea5cd6b8020a7d101 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71649 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-01-22amdfwtool: Add instance = 0 for bios imageZheng Bao
For future BIOS image entry whose instance = 1. Change-Id: Iaa40872b270cf9ff289794c8c51c4d8b448d862d Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69151 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-01-22amdfwtool: Add missing code for checking new family phoenix & glindaZheng Bao
Change-Id: Ib82f6c03b93d277f3f7f27ce57c1a41fdc103575 Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69046 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-01-22amdfwtool: Add entry types required to support glinda & phoenix SOCZheng Bao
Change-Id: I7565c5eda75b332a48613440d7e4cfb388d5012f Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69045 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ritul guru <ritul.bits@gmail.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
2023-01-19tree: Drop Intel Ice Lake supportFelix Singer
Intel Ice Lake is unmaintained and the only user of this platform ever was the Intel CRB (Customer Reference Board). As it looks like, it was never ready for production as only engineering sample CPUIDs are supported. As announced in the 4.19 release notes, remove support for Intel Icelake code and move any maintenance on the 4.19 branch. This affects the following components and their related code: * Intel Ice Lake SoC * Intel Ice Lake CRB mainboard * Documentation Change-Id: Ia796d4dc217bbcc3bbd9522809ccff5a46938094 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72008 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-15util/kconfig: Add comment explaining difference from upstreamNicholas Chin
coreboot adds a patch on top of upstream Kconfig which allows the generated Kconfig dependency files to be placed in a separate directory than the autoconfig files based on the KCONFIG_SPLITCONFIG variable. Add a comment to explain this difference. Change-Id: Ief38ab84f852ff24f896ec8bbf094aa737a172d9 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69952 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-01-15util/kconfig: Fix patch to be compatible with quiltNicholas Chin
The patch added in commit b7f92a0b6a0f (util/kconfig: Add patch to move Kconfig deps to build/config) uses git diff formatting, which is incompatible with quilt. Change-Id: I95bfe6571e3a2cc2b38074b4338f1610a4c8a595 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69863 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-01-12soc/amd: Change Morgana codename to PhoenixMartin Roth
Now that the next generation of APUs is officially announced, we can unmask morgana. The chip formerly known as Morgana is actually Phoenix. Surprise! This patch just changes the name across the entire codebase. Note that the fw.cfg file will stay pointing to the 3rdparty/amd_blobs/morgana/psp directory until the amd_blobs_repo is updated. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: Ie9492a30ae9ff9cd7e15e0f2d239c32190ad4956 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71731 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-11treewide: stop calling custom TPM log "TCPA"Sergii Dmytruk
TCPA usually refers to log described by TPM 1.2 specification. Change-Id: I896bd94f18b34d6c4b280f58b011d704df3d4022 Ticket: https://ticket.coreboot.org/issues/423 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69444 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2023-01-11util/crossgcc/Makefile.inc: Terminate quoted stringFelix Singer
`make help` does not execute successfully because a quoted string is unterminated. Fix that. Change-Id: I643fde1270a154ba523eb21522dcf5f6d4023110 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71768 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2023-01-10utils/inteltool: Add support to print Key Locker statusPratikkumar Prajapati
Add command-line option "-k" to print status. Sample output: $ inteltool -k ============= Dumping INTEL Key Locker status ============= Key Locker supported : YES AESKL instructions enabled : NO =========================================================== Change-Id: Icb1b08619b1dbc535640127f7ab5f6b49d70a6fe Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71657 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
2023-01-10ifdtool: Determine max regions from IFDPatrick Rudolph
IFDv1 always has 8 regions, while IFDv2 always has 16 regions. It's platform specific which regions are used or are reserved. The 'SPI programming guide' as the name says is a guide only, not a specification what the hardware actually does. The best to do is not to rely on the guide, but detect how many regions are present in the IFD and expose them all. Very early IFDv2 chipsets, sometimes unofficially referred to as IFDv1.5 platforms, only have 8 regions. To not corrupt the IFD when operating on an IFDv1.5 detect how much space is actually present in the IFD. Fixes IFD corruption on Wellsburg/Lynxpoint when writing a new flash layout. Change-Id: I0e3f23ec580b8b8402eb1bf165e3995c8db633f1 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68780 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com> Reviewed-by: Christian Walter <christian.walter@9elements.com>
2023-01-10util/liveiso: Update from 22.05 to 22.11Felix Singer
Update and also adjust configs so that they work with NixOS 22.11. Change-Id: Ia0fed68f5449ccf56b25660f5cdbc8c239064748 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70210 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2022-12-25util/docker: Update setuptools to get dtc buildingMartin Roth
python3-setuptools installed via apt-get is not currently working to build dtc from git.kernel.org. Falling back to setuptools version 58.2.0 allows it to build again. The failure message was: /usr/lib/python3/dist-packages/setuptools/installer.py:27: SetuptoolsDeprecationWarning: setuptools.installer is deprecated. Requirements should be satisfied by a PEP 517 installer. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I04cb6d776c3748f9a4b0cfc4ffd4f46458560d3d Reviewed-on: https://review.coreboot.org/c/coreboot/+/71500 Reviewed-by: Felix Singer <felixsinger@posteo.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-24util/mb/google: Add support for rexSubrata Banik
Add the file templates for creating a new variant of Rex. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: I4abca1f999accc008eb2549fcc13199b8d9bdc7a Reviewed-on: https://review.coreboot.org/c/coreboot/+/71086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
2022-12-24util/amdfwtool: Write EFS and AMDFW body in separate filesKarthikeyan Ramasubramanian
Add support to write EFS and AMDFW body to separate files. This is done through passing an optional --body-location parameter to the amdfwtool. If that option is not passed, then EFS will be written in the same file as the AMDFW body. This will help to keep the minimum data to be loaded/mapped from CBFS in PSP verstage. BUG=None TEST=Build and boot to OS in Skyrim. Change-Id: I79325c81394cf8a0c663752d094adf6660896127 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70778 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-21util/testing: Disable tegra and gitconfig tests until they're fixedMartin Roth
Both the tegra builds and the gitconfig tests are causing issues. They're disabled until someone fixes them. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I1ed272e3579a2e7cdd6b58df24e719410d47082c Reviewed-on: https://review.coreboot.org/c/coreboot/+/71145 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-12-18util/crossgcc: Add option to get packages from coreboot's mirrorMartin Roth
coreboot has been keeping a mirror of all the toolchain packages used for releases for quite a while now. This adds an option to fetch the packages from the coreboot mirror directly to buildgcc. This can help with both our releases and when one of the various servers experiences interruptions or changes a path. To do this, the URL and filename needed to be split apart, which led to quite a few changes in the buildgcc script. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I7df58dca152e7bfe9fde34d290e05b52515b20d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70053 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-12-17util/chromeos/gen_test_hwid.sh: Replace usage of hexdumpMichał Żygowski
Hexdump command is not available in coreboot-sdk. Replace it with equivalent implementation using commands that are present in the container. TEST=Passed "VP46XX" as prefix variable and it produced the same crc32 result before and after the change. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Icad93933335b8c5ebd8fee74cc9aaed36bb56482 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68133 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-12-17util/cbfstool: Change %lu to %zu for size_t argumentReka Norman
With commit 34a7e66faa46 ("util/cbfstool: Add a new mechanism to provide a memory map"), builds are failing on 32-bit platforms with: ../cbfstool/cbfstool.c:397:30: error: format specifies type 'unsigned long' but the argument has type 'size_t' (aka 'unsigned int') [-Werror,-Wformat] printf("Image SIZE %lu\n", image_size); ~~~ ^~~~~~~~~~ %zu Change the format specifier from %lu to %zu. TEST=`emerge-cherry coreboot-utils` now succeeds Change-Id: I3602f57cf91c330122019bfa921faef6deb2b4ce Signed-off-by: Reka Norman <rekanorman@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70848 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-12-17util/genbuild_h: Only use version tags in expected formatReka Norman
With commit 0110e1abe0ba ("util/genbuild_h: Update printf %d to %s for sh compatability"), the ChromeOS coreboot build is failing with: In file included from src/lib/version.c:4: /build/nissa/tmp/portage/sys-boot/coreboot-0.0.1-r5473/work/build/nivviks/build.h:10:32: error: 'v1' undeclared here (not in a function) 10 | #define COREBOOT_MAJOR_VERSION v1 | ^~ src/lib/version.c:35:46: note: in expansion of macro 'COREBOOT_MAJOR_VERSION' 35 | const unsigned int coreboot_major_revision = COREBOOT_MAJOR_VERSION; | ^~~~~~~~~~~~~~~~~~~~~~ /build/nissa/tmp/portage/sys-boot/coreboot-0.0.1-r5473/work/build/nivviks/build.h:11:32: error: 'v9308' undeclared here (not in a function) 11 | #define COREBOOT_MINOR_VERSION v9308 | ^~~~~ src/lib/version.c:36:46: note: in expansion of macro 'COREBOOT_MINOR_VERSION' 36 | const unsigned int coreboot_minor_revision = COREBOOT_MINOR_VERSION; | ^~~~~~~~~~~~~~~~~~~~~~ This is because the ChromeOS coreboot repo has a tag which is not in the expected <major>.<minor> format: $ git tag v1.9308_26_0.0.22 Change genbuild_h.sh to only use the version from `git describe` if it's in the expected <major>.<minor> format. TEST=ChromeOS coreboot build now succeeds, with versions set to 0: #define COREBOOT_MAJOR_VERSION 0 #define COREBOOT_MINOR_VERSION 0 Building upstream coreboot, the versions are still set correctly: #define COREBOOT_MAJOR_VERSION 4 #define COREBOOT_MINOR_VERSION 18 Change-Id: I81b2317a83cdec4cc2aad60af2990e5e3f4ad694 Signed-off-by: Reka Norman <rekanorman@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70770 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Usha P <usha.p@intel.com>
2022-12-14util/cbfstool: Fix building with clang & -WshadowArthur Heymans
Clang -Wshadow is more rigorous than GCC and picks a shadowing of the optarg global variable in /usr/include/bits/getopt_core.h . TESTED: builds with both gcc and clang. Change-Id: Ifc362c84511abb6a000671f03498e841d7747074 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70508 Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-12-13util/release: Update gerrit_stats script to latest versionMartin Roth
This updates a number of things: - Move the cache directory under the .local directory - Reformat & clean up with perltidy. Add the perltidy command line. - Add username and email aliases to clean up duplicates and unknown email addresses. - Use full length commit IDs - Collect patch commenters - Check variables before using them as key values - Ignore patch submit time, just collect the date - Get stats about large patches - Format the output better Example output: Statistics from commit c35f2819348501579a32e870e21f5f1b062d26e8 to commit f8fbf0917c722378454b07c2e8ec1a3f87b324ae Patch, Date, Owner, Author, Submitter, Inserted lines, Deleted lines, Subject, Reviewers, Commenters "f8fbf0917c722378454b07c2e8ec1a3f87b324ae", 2022/12/10, Frank Chu, Frank Chu, Martin Roth, 22, 1, "mb/google/brya/var/marasov: Change FSP board type to Type3", "Frank Chu, Eric Lai" , "-" "5778e06771627a5541ca2b137e783f47257f05ec", 2022/12/10, Dinesh Gehlot, Dinesh Gehlot, Subrata Banik, 30, 1, "soc/intel/meteorlake: Drop casts around `soc_read_pmc_base()`", "Kapil Porwal, Elyes Haouas" , "Subrata Banik" "ed8bdefcdf6c19258febb9931d1e8eb12b958bcc", 2022/12/10, Jamie Ryu, Jamie Ryu, Felix Held, 76, 3, "mb/intel/mtlrvp: Add MTL-P RVP board ids", "Usha P, Sridhar Siricilla, Eric Lai, Subrata Banik" , "Eric Lai, Subrata Banik, Harsha B R, Angel Pons" - Total Commits: 985 - Average Commits per day: 17.85 - Total lines added: 61475 - Average lines added per commit: 62.41 - Number of patches adding more than 100 lines: 49 - Average lines added per small commit: 37.82 - Total lines removed: 758022 - Average lines removed per commit: 769.57 - Total difference between added and removed: -696547 === Authors - Number of commits === Author ,Ptchs ,Revws , Cmnts , Sbmts , Email , Prcnt, Last commit , Earliest_commit Elyes Haouas , 126 , 90 , 28 , 0 , ehaouas@noos.fr ,12.79%, 2022/12/10 , 2022/10/17 Arthur Heymans , 107 , 99 , 28 , 40 , arthur@aheymans.xyz ,10.86%, 2022/12/10 , 2022/10/17 === Authors - Lines added === Martin Roth , 10103, 16.434% Kyösti Mälkki , 6044, 9.832% Arthur Heymans , 3314, 5.391% === Authors - Lines removed === Arthur Heymans , -741944, 97.879% Felix Held , -3031, 0.400% Kyösti Mälkki , -1680, 0.222% === Reviewers - Number of patches reviewed === Angel Pons , 272, 27.614% Eric Lai , 201, 20.406% Felix Held , 106, 10.761% === Submitters - Number of patches submitted === Name , #, total%, Own, own%, Other, other% Felix Held , 482, 48.934%, 56, 11.62%, 426, 88.38% Martin Roth , 179, 18.173%, 42, 23.46%, 137, 76.54% Subrata Banik , 54, 5.482%, 31, 57.41%, 23, 42.59% Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: Ie1694116ab36ca4db25d13935adadca10e50068f Reviewed-on: https://review.coreboot.org/c/coreboot/+/70572 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-12-13util/spd_tools: Format lp5 file to golang standardsRobert Zieba
This commit formats the lp5.go file according to goland standards. TEST=Built spd_tools Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: If102c90f732efc51a90de6cc0e18c879d56699b5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68375 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2022-12-13util/genbuild_h: Update printf %d to %s for sh compatabilityMartin Roth
When printing a date, genbuild_h is printing it as two digits, using a leading zero if the value is below 10. The shells like bash, dash, etc don't fully import the numbers 08 and 09 when using the printf conversion specifier %d. They apparently interpret the numbers as octal and only import the leading 0, dropping the 8 or 9. This isn't an issue for 01 to 07, because those are valid octal numbers, so %d prints them without an issue. Because 08 and 09 are not valid octal, various shells return different errors: Example shell returns for 'printf "%d" 08': bash: printf: 08: invalid octal number dash: printf: 08: not completely converted fish: 008: value not completely converted yash: printf: `08' is not a valid integer sash: printf: 08: not completely converted To prevent this, just print all of the values as strings. zsh just seems to ignore the possibility of the value being octal and prints the value as a single digit 0-9. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I97b6aa74d74379f6bdc1f0fceecc8002cc36ca09 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70478 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-12util/ifdtool/Makefile.inc: Respect LDFLAGS from environmentReka Norman
The ChromeOS build system performs ASAN builds by appending -fsanitize=address to CFLAGS and LDFLAGS. Currently, the ASAN build of ifdtool fails with linker errors because the Makefile does not respect LDFLAGS. Modify the Makefile to respect LDFLAGS from the environment. This is consistent with the Makefiles of most other coreboot utils. BUG=b:255462682 TEST=`USE=asan emerge-nissa coreboot-utils` now succeeds with CL:4018976 Change-Id: I1a497562d4d979829edb47c4c4b3f2c64266324e Signed-off-by: Reka Norman <rekanorman@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70054 Reviewed-by: Patrick Georgi <patrick@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-09util/ifdtool/Makefile: improve cross-compilation supportMaciej Pijanowski
INSTALL and PREFIX variables will not be overwritten. Also, mkdir was replaced by a tool from the INSTALL variable to be compatible with other cross-compilation buildsystems (like Yocto). Overwriting variables generates problems when we use different buildsystem like Yocto where tool names are stored in environment variables. This change may make building the utility easier - the user of different buildsystem will not have to remember to pass correct tool names when issuing the make command. Also, this change does not affect the rest of users - if the variable was not set before, then it will be configured as before. Signed-off-by: Maciej Pijanowski <maciej.pijanowski@3mdeb.com> Change-Id: Ia8dd67d18392e1e11d9160b187ef1a874d69ff5d Reviewed-on: https://review.coreboot.org/c/coreboot/+/70105 Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-09util/inteltool/Makefile: improve cross-compilation supportMaciej Gabryelski
Use tool from INSTALL variable to create directory instead of mkdir to be compatible with other cross-compilation buildsystems (like Yocto). Signed-off-by: Maciej Gabryelski <maciej.gabryelski@3mdeb.com> Change-Id: I0b0949d07baae1ae1d7b22ac3d0b8913f81d89c1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70104 Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-09util/superiotool/Makefile: improve cross-compilation supportMaciej Gabryelski
Use tool from INSTALL variable to create directory instead of mkdir to be compatible with other cross-compilation buildsystems (like Yocto). Signed-off-by: Maciej Gabryelski <maciej.gabryelski@3mdeb.com> Change-Id: I9d455f3d1a6d86c88b8e22da825fe14f9630e971 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70103 Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-09util/ectool/Makefile: improve cross-compilation supportMaciej Gabryelski
Build variables like CC, INSTALL, and PREFIX, should not be overwritten by the Makefile. This generates problems when we use different buildsystem like Yocto where tool names are stored in environment variables. This change may make building util tool easier - the user of different buildsystem will not have to remember to pass correct tool names during running the make command. Also, this change does not affect the rest of users - if the variable was not set before, then it will be configured as before. Signed-off-by: Maciej Gabryelski <maciej.gabryelski@3mdeb.com> Change-Id: If5c88bde0ae00f0211a250906cbdedfe4f59c67b Reviewed-on: https://review.coreboot.org/c/coreboot/+/70102 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-07util/autoport: Drop lenovo mainboard_io_trap_handler()Kyösti Mälkki
See commit cfc93cbb660e ("mb/lenovo/{t60,x201,x60}/smihandler: Remove SMM reinitialization") Change-Id: I540c543be027410f387803e8194fb71012cc5063 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70362 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-06util/cbfstool: Add a new mechanism to provide a memory mapArthur Heymans
This replaces the mechanism with --ext-win-base --ext-win-size with a more generic mechanism where cbfstool can be provided with an arbitrary memory map. This will be useful for AMD platforms with flash sizes larger than 16M where only the lower 16M half gets memory mapped below 4G. Also on Intel system the IFD allows for a memory map where the "top of flash" != "below 4G". This is for instance the case by default on Intel APL. TEST: google/brya build for chromeos which used --ext-win-base remains the same after this change with BUILD_TIMELESS=1. Change-Id: I38ab4c369704497f711e14ecda3ff3a8cdc0d089 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68160 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-12-05util/genbuild: Fix style & shellcheck issuesMartin Roth
There shouldn't be any change to functionality here - this should be strictly cleanup. - STYLE: Put variables inside braces. - SHELLCHECK: Instead of 'var= ' to clear a variable, use 'var=""' - SHELLCHECK: Put commands and command variables inside quotes. - SHELLCHECK: Don't use variables inside the printf commands. - OTHER: COREBOOT_BUILD needed a date format when the variables in the our_date() function were put into quotes. This format matches the output of 'LANG="" LC_ALL=C TZ=UTC0 date' Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I3303caee5c7a53c9df579e6f48d2c3d075a8c278 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70056 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2022-12-05util/genbuild_h: Update version calculationMartin Roth
- 'git describe --match [0-9].[0-9]*' was giving me an error, so use the basic 'git describe' command instead. - If a .coreboot-version file exists, use that to determine the version. This fixes the problem for coreboot releases. - Don't run git for the versions unless it's being built from a valid git repository. Use 0.0 as the default version for timeless or unknown. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I5fae2f012cc9b9914d8803af8dd58a885358cb1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/70055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jakub Czapiga <jacz@semihalf.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-02kconfig2html: Denote that the script is python3Patrick Georgi
`python` as a command isn't universally available anymore after the python2/python3 drama. Change-Id: I9d68873d86dc3f044238d921c10fc434a83a76f5 Signed-off-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69190 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-02board-status: Implement handling of "Clone of"Patrick Georgi
Change-Id: Ifb728ebb5d0e98b0c8a59f3bd8803ce193a05e5f Signed-off-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69184 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-02board-status: Remove shell version, update docsPatrick Georgi
Change-Id: I532db49799eadf3214a70297c5fc84aa006bc3f7 Signed-off-by: Patrick Georgi <patrick@coreboot.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68960 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-02util/crossgcc/buildgcc: Disable LLVM_INCLUDE_{TESTS,EXAMPLES}Felix Singer
Building of LLVM tests and examples is enabled by default, but they are not necessary. Thus disable them. Change-Id: I58b09e276967e97856da65e5876b27f0bae3f0cc Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69942 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-12-02util/crossgcc/buildgcc: Use one line per configure optionFelix Singer
To improve the readability and visibility of the configure options, move each of them to a separate line. Change-Id: Ifc39e4d0849d220d85e1d9ce92fc008fec610694 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69941 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-12-02util/crossgcc/buildgcc: Put configure option before target dirFelix Singer
Change-Id: If1b724f9c9b4d2a8ce166946794c1c0882ad1653 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69940 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-12-01util/kconfig/README.md: Add notes about adding a new quilt patchNicholas Chin
The patches for kconfig need to be in a format compatible with the quilt tool, and usually also contain a header with some additional info like the git commit. This header is in the same format as patches produced by `git format-patch`, but the diff style git uses is incompatible with quilt and there does not seem to be a straightforward way to format the diff section to work. Add some documentation for a method I found to go from a git commit to a quilt compatible patch with git headers. Change-Id: I7a8bbe41e0864be1d28116742b6b8b3fc440cc31 Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69458 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-12-01util/autoport: Update devicetree generationArthur Heymans
CPU nodes are now declared in a common chipset.cb. TESTED: generates a proper devicetree for x220 based on logs. Change-Id: Ic1f2d3d611aa3979b846706b6f743f79a3c4e54d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69501 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-12-01crossgcc: Upgrade LLVM from 15.0.0 to 15.0.6Elyes Haouas
Tested with BUILD_TIMELESS=1: binaries stay the same for qemu-i440fx. Change-Id: I9e6c23c6552eded92e706bc21bb162a66767572e Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69700 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-12-01crossgcc: Upgrade CMake from 3.24.2 to 3.25.0Elyes Haouas
Change-Id: Iebccaf984c2c8b449c8f152484a4df1e75e74fd8 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69715 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-11-29util/cbmem: Provide a way to override coreboot pathWerner Zeh
Right now cbmem uses a fix path to reach coreboot src path (../../). This makes it impossible to compile cbmem out of the coreboot tree (e.g. copy just the cbmem directory elsewhere and compile). This patch adapts the technique from cbfstool and adds a variable called 'TOP' which points to coreboot root directory and which can be overridden at build time by providing it to make as an argument. This will enable a stand-alone build of cbmem. Change-Id: I2732f75310e10716e5aa74e094e0bf628ad22f0b Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69686 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-11-28util/crossgcc: Use GitHub for downloading IASLFelix Singer
The download links from acpica.org [1] are not stable, and for some reason they named the release tarballs with .tar_0.gz. Thus, use the tarballs from their GitHub repository generated out of the release tags [2]. Tested locally and also IASL patch applies. [1] https://www.acpica.org/downloads [2] https://github.com/acpica/acpica/tags Signed-off-by: Felix Singer <felixsinger@posteo.net> Change-Id: I7b10dd1db4299aaef96bc29023bed874b660aba0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/70021 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-28Makefile.inc: Decrease minimal pagesize from 4 kB to 1 kBPaul Menzel
GCC 12 incorrectly warns about an array out of bounds issue: ``` $ make V=1 # emulation/qemu-i440fx […] CC ramstage/arch/x86/ebda.o x86_64-linux-gnu-gcc-12 -MMD -Isrc -Isrc/include -Isrc/commonlib/include -Isrc/commonlib/bsd/include -Ibuild -I3rdparty/vboot/firmware/include -include src/include/kconfig.h -include src/include/rules.h -include src/commonlib/bsd/include/commonlib/bsd/compiler.h -I3rdparty -D__BUILD_DIR__=\"build\" -Isrc/arch/x86/include -D__ARCH_x86_32__ -pipe -g -nostdinc -std=gnu11 -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -Wwrite-strings -Wredundant-decls -Wno-trigraphs -Wimplicit-fallthrough -Wshadow -Wdate-time -Wtype-limits -Wvla -Wdangling-else -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer -fstrict-aliasing -ffunction-sections -fdata-sections -fno-pie -Wno-packed-not-aligned -fconserve-stack -Wnull-dereference -Wreturn-type -Wlogical-op -Wduplicated-cond -Wno-unused-but-set-variable -Werror -Os -Wno-address-of-packed-member -m32 -Wl,-b,elf32-i386 -Wl,-melf_i386 -m32 -fuse-ld=bfd -fno-stack-protector -Wl,--build-id=none -fno-delete-null-pointer-checks -Wlogical-op -march=i686 -mno-mmx -MT build/ramstage/arch/x86/ebda.o -D__RAMSTAGE__ -c -o build/ramstage/arch/x86/ebda.o src/arch/x86/ebda.c In file included from src/arch/x86/ebda.c:6: In function 'write_ble8', inlined from 'write_le8' at src/commonlib/include/commonlib/endian.h:155:2, inlined from 'write_le16' at src/commonlib/include/commonlib/endian.h:178:2, inlined from 'setup_ebda' at src/arch/x86/ebda.c:35:2, inlined from 'setup_default_ebda' at src/arch/x86/ebda.c:48:2: src/commonlib/include/commonlib/endian.h:27:26: error: array subscript 0 is outside array bounds of 'void[0]' [-Werror=array-bounds] 27 | *(uint8_t *)dest = val; | ~~~~~~~~~~~~~~~~~^~~~~ […] ``` [In GCC 12 the new parameter `min-pagesize` is added and defaults 4 kB.][1] It treats INTEGER_CST addresses smaller than that as assumed results of pointer arithmetics from NULL while addresses equal or larger than that as expected user constant addresses. For GCC 13 we can represent results from pointer arithmetics on NULL using &MEM[(void*)0 + offset] instead of (void*)offset INTEGER_CSTs. [1]: https://web.archive.org/web/20220711061810/https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99578 TEST=No compile error with gcc (Debian 12.2.0-3) 12.2.0 Change-Id: I6e36633f42cb4dc5af53212c10c919a86e451ee0 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62830 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-11-25util/testing: Fully clean all but the standard GCC buildMartin Roth
We don't currently use the artifacts from the Clang or CrOS GCC builds, so don't bother saving them. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I69fe803e4b4213a199d0b76089da443aa769aa92 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69954 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-11-25crossgcc: Upgrade IASL from 20220331 to 20221020Elyes Haouas
Changes: https://acpica.org/node/201 Change-Id: I386a6757a318336bc616091afe0c4ed88cd89583 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68929 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net>
2022-11-25crossgcc: Upgrade MPFR from 4.1.0 to 4.1.1Elyes Haouas
Change-Id: I7679c6751fb02ab670ade923b365c6410a6dc118 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69778 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Singer <felixsinger@posteo.net> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-11-24util/lint: Ignore fmd files when evaluating Kconfig symbolsMartin Roth
Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: I5e3ff8ee10fdd3514033e72bd0c2664a4b2f5310 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-11-24lint/checkpatch: Add XA_STATE and XA_STATE_ORDER to the macro declarationElyes Haouas
This reduce the difference with linux v6.0-rc3. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ica20264d744ea8f77b56c63d29e1fafc2e68a869 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67338 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2022-11-24src/device + util/sconfig: Introduce new device 'mdio'Mario Scheithauer
This patch extends the available device paths with a new device 'mdio'. MDIO is the 'Management Data Input/Output' called interface which is used to access an Ethernet PHY behind a MAC to change settings. The real payload data path is not handled by this interface. To address the PHY correctly on the MDIO bus, there is a 5 bit address needed, which often can be configured via pins on the mainboard. Therefore, the new introduced device has an 'addr' field to define its address. If one wants to use a MDIO device in devicetree, the syntax is straight forward (example): device mdio 0x2 on end As the MDIO interface is driven by the MAC, most likely this MDIO device will be hooked in as a child device of the (PCI attached) MAC device. With the new introduced ops_mdio a new interface is added to provide an API for read and write access over MDIO. Change-Id: I6691f92c4233bc30afc9029840b06f74bb1eb4b2 Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com> Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69382 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-23util/release/build-release: Fix style issuesMartin Roth
No real functional changes, just cleaning up shellcheck issues, putting braces around variables, add comments and the like. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I6e79afc8d725e86ddbf7f4eb4685bed190c20738 Reviewed-on: https://review.coreboot.org/c/coreboot/+/67319 Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-11-22crossgcc: Remove leftover "../cmake"Elyes Haouas
"../cmake" introduced on Change-Id: I3144a83 Remove "../cmake" when the build is done. Change-Id: I289bfaca1fd8d3f004455babd99849ca8aa2d6db Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69869 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com>
2022-11-22util/crossgcc: Limit LLVM targets to the needed onesFelix Singer
coreboot only supports a small subset of the targets that LLVM supports. It's not needed to enable all possible targets. Thus limit the targets to the following ones: * X86 * RISC-V * AArch32 * AArch64 * PowerPC Change-Id: I9938bf176b5fe2b0a631c3b1ae858f988898a196 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69841 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur.heymans@9elements.com>
2022-11-22util: Add SPDX license headers to MakefilesMartin Roth
Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I7cf35132df0bc23f7b6f78014ddd72d58ea2ab8a Reviewed-on: https://review.coreboot.org/c/coreboot/+/68983 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-11-21util/testing: Allow jenkins builders to skip testing areasMartin Roth
With the addition of the clang tests, the jenkins builds are taking a really long time to run the tests. This change allows the "what-jenkins-does" build to be split into separate builds on jenkins. Additionally, some jenkins builds like coverity don't need (or want) to build clang or even the linters. Update help with the variables. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I0f8ac68c1bc8f8ff9be62d80db850355e742ee74 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69495 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-11-21util/testing: Add scanbuild test build to what-jenkins-doesMartin Roth
This tests building a single target with scanbuild so to make sure that option hasn't been broken. Since it's a different type of build, it hasn't previously been tested with what-jenkins-does. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I8a74dac203f4d38c0cb30a0b64724e6f9095b9dd Reviewed-on: https://review.coreboot.org/c/coreboot/+/69861 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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