summaryrefslogtreecommitdiff
path: root/util
AgeCommit message (Collapse)Author
2013-02-09cbfstool: Handle alignment in UEFI payloadsPatrick Georgi
Tiano for X64 is much cleaner to start up when using higher alignments in firmware volumes. These are implemented using padding files and sections that cbfstool knew nothing about. Skip these. Change-Id: Ibc433070ae6f822d00af2f187018ed8b358e2018 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/2334 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-09cbfstool: Fix crash on image without bootblock in end of ROM.Hung-Te Lin
On platforms with CBFS data filling end of ROM image without bootblock in the end (ex, ARM), calculation of "next valid entry" may exceed ROM image buffer in memory and raise segmentation fault when we try to compare its magic value. To fix this, always check if the entry address is inside ROM image buffer. Verified to build and boot successfully on qemu/x86 and armv7/snow. Change-Id: I117d6767a5403be636eea2b23be1dcf2e1c88839 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2330 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-06crossgcc: Save the script itself when cross build is over.Zheng Bao
In case that the new toolchains don't work well, we can trace back and reproduce the old tools by checking the xgcc folder. It is useful when my team members need to get my old toolchains on their own host machines. Change-Id: I54e4bc6afcfbbf622165af6eae27bbb6efc2e8cc Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2247 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-02-06armv7: Prevent CBFS data overlapping bootblock.Hung-Te Lin
For arm/snow, current bootblock is larger than previously assigned CBFS offset and will fail to boot. To prevent this happening again in future, cbfstool now checks if CBFS will overlap bootblock. A sample error message: E: Bootblock (0x0+0x71d4) overlap CBFS data (0x5000) E: Failed to create build/coreboot.pre1.tmp. arm/snow offset is also enlarged and moved to Kconfig variable. Change-Id: I4556aef27ff716556040312ae8ccb78078abc82d Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2295 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-06cbfstool: Add support for 64bit UEFIStefan Reinauer
Right now cbfstool only accepts firmware volumes with a x86 SEC core and refuses an x86-64 SEC core because some magic values and the extended PE header are different. With this patch, both IA32/x64 images are supported. (No check is done whether the mainboard actually supports 64bit CPUs, so careful!) This needs another patch to Tiano Core that switches to long mode after jumping to the 64bit entry point. Right now that code assumes we're already in 64bit code and the machine crashes. Change-Id: I1e55f1ce1a31682f182f58a9c791ad69b2a1c536 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2283 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-02-05cbfstool: support parsing UEFI firmware volumesStefan Reinauer
This removes the hack implemented in http://review.coreboot.org/#/c/2280 (and should make using 64bit Tiano easier, but that's not yet supported) Change-Id: Ie30129c4102dfbd41584177f39057b31f5a937fd Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2281 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Use cbfs_image API for "add-*" (add-payload, add-stage, ...) commands.Hung-Te Lin
add-payload, add-stage, and add-flat-binary are now all using cbfs_image API. To test: cbfstool coreboot.rom add-stage -f FILE -n fallback/romstage -b 0xXXXX cbfstool coreboot.rom add-payload -f FILE -n fallback/pyload And compare with old cbfstool. Verified to boot on ARM(snow) and X86(qemu-i386). Change-Id: If65cb495c476ef6f9d90c778531f0c3caf178281 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2220 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Use cbfs_image api for "add" command.Hung-Te Lin
The "add" command is compatible with all legacy usage. Also, to support platforms without top-aligned address, all address-type params (-b, -H, -l) can now be ROM offset (address < 0x8000000) or x86 top-aligned address (address > 0x80000000). Example: cbfstool coreboot.rom add -f config -n config -t raw -b 0x2000 cbfstool coreboot.rom add -f stage -n newstage -b 0xffffd1c0 Verified boot-able on both ARM(snow) and x86(QEMU) system. Change-Id: I485e4e88b5e269494a4b138e0a83f793ffc5a084 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2216 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Use cbfs_image API for "create" command.Hung-Te Lin
Usage Changes: To support platforms with different memory layout, "create" takes two extra optional parameters: "-b": base address (or offset) for bootblock. When omitted, put bootblock in end of ROM (x86 style). "-H": header offset. When omitted, put header right before bootblock, and update a top-aligned virtual address reference in end of ROM. Example: (can be found in ARM MAkefile): cbfstool coreboot.rom create -m armv7 -s 4096K -B bootblock.bin \ -a 64 -b 0x0000 -H 0x2040 -o 0x5000 Verified to boot on ARM (Snow) and X86 (QEMU). Change-Id: Ida2a9e32f9a459787b577db5e6581550d9d7017b Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2214 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Use cbfs_image API for "locate" command.Hung-Te Lin
To support platforms without top-aligned address mapping like ARM, "locate" command now outputs platform independent ROM offset by default. To retrieve x86 style top-aligned virtual address, add "-T". To test: cbfstool coreboot.rom locate -f stage -n stage -a 0x100000 -T # Example output: 0xffffdc10 Change-Id: I474703c4197b36524b75407a91faab1194edc64d Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2213 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Fix incorrect CBFS free space by old cbfstool.Hung-Te Lin
Old cbfstool may produce CBFS image with calculation error in size of last empty entry, and then corrupts master header data when you really use every bit in last entry. This fix will correct free space size when you load ROM images with cbfs_image_from_file. Change-Id: I2ada319728ef69ab9296ae446c77d37e05d05fce Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2211 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Use cbfs_image API for "remove" command.Hung-Te Lin
To delete a component (file) from existing CBFS ROM image. To test: cbfstool coreboot.rom remove -n fallback/romstage # and compare with old cbfstool output result. Change-Id: If39ef9be0b34d8e3df77afb6c9f944e02f08bc4e Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2208 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Use cbfs_image API for "extract" command.Hung-Te Lin
Change the "extract" command to use cbfs_export_entry API. Nothing changed in its usage. To verify, run "cbfstool coreboot.rom extract -f blah -n blah" and check if the raw type file is correctly extracted. Change-Id: I1ed280d47a2224a9d1213709f6b459b403ce5055 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2207 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Use cbfs_image API for "print" command.Hung-Te Lin
Process CBFS ROM image by new cbfs_image API. To verify, run "cbfstool coreboot.rom print -v" and compare with old cbfstool. Change-Id: I3a5a9ef176596d825e6cdba28a8ad732f69f5600 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2206 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Add cbfs_image new CBFS image manipulation API.Hung-Te Lin
Current cbfstool implementation is relying on global variables to pass processed data, and the calculation of address is based on x86 architecture (ex, always assuming 0x0000 as invalid address), not easy to be used on platforms without top-aligned memory mapping. This CL is a first step to start a new cbfstool without global variables, and to prevent assuming memory layout in x86 mode. The first published APIs are for reading and writing existing CBFS ROM image files (and to find file entries in a ROM file). Read cbfs_image.h for detail usage of each API function. Change-Id: I28c737c8f290e51332119188248ac9e28042024c Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2194 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-05cbfstool: Add buffer management API.Hung-Te Lin
Many functions in cbfstool need to deal with a memory buffer - both location and size. Right now it's made by different ways: for ROM image using global variable (romsize, master_header); and in cbfs-* using return value for size and char** to return memory location. This may cause bugs like assuming incorrect return types, ex: uint32_t file_size = parse(); // which returns "-1" on error if (file_size <= 0) { ... And the parse error will never be caught. We can simplify this by introducing a buffer API, to change unsigned int do_something(char *input, size_t len, char **output, ...) into int do_something(struct buffer *input, struct buffer *output, ...) The buffer API will be used by further commits. Change-Id: Iaddaeb109f08be6be84c6728d72c6a043b0e7a9f Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2205 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-02-04crossgcc: add armv7a-eabi to list of working toolchainsDavid Hendricks
Change-Id: Ibf221db4ca60d802b460d56f5fcca95ff49fc542 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2273 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-02-04cbfstool: Update example file.Hung-Te Lin
The syntax of cbfstool has been changed for a while (using getopt). Updated EXAMPLE file to show the right way to test cbfstool. Change-Id: I5cb41b76712d8c2403fffc9fdad83c61fb2af98c Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2215 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-02-01cbfstool: Make endian detection functions to work without prior setup.Hung-Te Lin
The 'host_bigendian' variable (and functions relying on it like ntohl/htonl) requires host detection by calling static which_endian() first -- which may be easily forgotten by developers. It's now a public function in common.c and doesn't need initialization anymore. Change-Id: I13dabd1ad15d2d6657137d29138e0878040cb205 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2199 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-02-01cbfstool: move flat-binary parsing to cbfs-mkpayload.Hung-Te Lin
The ELF parsing and payload building in add-flat-binary command should be isolated just like mkpayload and mkstage. Since the add-flat-binary command creates a payload in the end , move payload processing to cbfs-mkpayload.c. To test: cbfstool coreboot.rom add-flat-binary -f u-boot.bin -n fallback/payload \ -l 0x100000 -e 0x100020 To verify, get output from "cbfstool coreboot.rom print -v": fallback/payload 0x73ccc0 payload 124920 INFO: code (no compression, offset: 0x38, load: 0x1110000, length:..) Change-Id: Ia7bd2e6160507c0a1e8e20bc1d08397ce9826e0d Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2197 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-02-01cbfstool: Add -v (verbose) output.Hung-Te Lin
Add -v (verbose) to every command, and allow printing debug messages. Revise logging and debugging functions (fprintf(stderr,...), dprintf...) and verbose message printing with following macros: ERROR(xxx): E: xxx WARN(xxx) W: xxx LOG(xxx) xxx INFO(...) INFO: xxx (only when runs with -v ) DEBUG(...) DEBUG: xxx (only when runs with more than one -v) Example: cbfstool coreboot.rom print -v cbfstool coreboot.rom add -f file -n file -t raw -v -v Normal output (especially for parsing) should use printf, not any of these macros (see usage() and cbfs_locate(), cbfs_print_directory() for example). Change-Id: I167617da1a6eea2b07075b0eb38e3c9d85ea75dc Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2196 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-01-30Add a clean target to the run firmware (runfw) MakefileRonald G. Minnich
It's just good hygiene. Change-Id: Ie7d4557c1d0dcf7fc015852c4c9b2eae29c4acfc Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2232 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-01-30cbfstool: Prevent file name to be corrupted by basename().Hung-Te Lin
Calling basename(3) may modify content. We should allocate another buffer to prevent corrupting input buffer (full file path names). Change-Id: Ib4827f887542596feef16e7829b00444220b9922 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2203 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-01-29cbfstool: Change "locate" output to prefix "0x".Hung-Te Lin
Currently "cbfstool locate" outputs a hex number without "0x" prefix. This makes extra step (prefix 0x, and then generate another temp file) in build process, and may be a problem when we want to allow changing its output format (ex, using decimal). Adding the "0x" in cbfstool itself should be better. Change-Id: I639bb8f192a756883c9c4b2d11af6bc166c7811d Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2201 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-01-29cbfstool: Remove unused header files.Hung-Te Lin
cbfs-mk*.c does not work with real files / command line so header files with file I/O and getopt can be removed. Change-Id: I9d93152982fd4abdc98017c983dd240b81c965f5 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2200 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-01-28cbfstool: Store global variables into struct.Hung-Te Lin
cbfstool.c uses lots of global variables for command line options and all named as "rom*". This may be confusing when other global variables also start with rom, ex: int size = rom_size + romsize; (rom_size is from command line and romsize is the size of last loaded ROM image). If we pack all rom_* into a struct it may be more clear, ex: do_something(param.cbfs_name, param.size, &romsize); Change-Id: I5a298f4d67e712f90e998bcb70f2a68b8c0db6ac Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2195 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-01-28msrtool: Decoding for most of Intel Core 2 MSRsAnton Kochkov
Added bits/bitfields descriptions and decoding values into intel_core2_later.c file, which describe MSRs for Intel processors, based on later Core 2 architecture. Change-Id: If577c8ed944afe34f86944cc03a780fba6b3dbba Signed-off-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-on: http://review.coreboot.org/1171 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-01-25inteltool: Add support for Atom N455 (0x106c0) in CPU MSRs dumpOlivier Langlois
reference for Atom MSRs are from Intel 64 and IA-32 Architectures Software Developer's Manual Volume 3C: System Programming Guide, Part 3 Order Number 326019, January 2013, Table 35-4, 35-5 Has been successfully tested on the targeted cpu. Change-Id: If94279caeab27121c63ec43c258dc962c167ad51 Signed-off-by: Olivier Langlois <olivier@olivierlanglois.net> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2192 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-01-22util/runfw/googlesnow.c: Remove trailing whitespacePaul Menzel
$ git stripspace < util/runfw/googlesnow.c > /tmp/bla $ mv /tmp/bla util/runfw/googlesnow.c Introduced with original commit. commit b867281a07addd1eb00f964ff4f8727664e13e19 Author: Ronald G. Minnich <rminnich@gmail.com> Date: Wed Jan 16 11:59:34 2013 -0600 Utility to run the snow bios in user mode Change-Id: I146c07a918ef99e8ae3c0dd72cf28fae22312e43 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2183 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-19Utility to run the snow bios in user modeRonald G. Minnich
This program lets you test run a snow coreboot image in user mode on a properly equipped arm system (usually an ARM chromebook). This is a real time saver as you don't have to flash each time. We've found and fixed some nasty bugs with this one. Anyway, the instructions on how to use this are in the binary. Change-Id: Ib555ef51fd7e930905a2ee5cbfda1cc6f068278e Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2159 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-01-19Add more information to the cbfstool printStefan Reinauer
Show what's in a stage or payload. This will let people better understand what's in a stage or payload. Change-Id: If6d9a877b4aedd5cece76774e41f0daadb20c008 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2176 Tested-by: build bot (Jenkins)
2013-01-17make crossgcc: compile all required toolchainsStefan Reinauer
The ARMv7 toolchain is now also needed for abuild (at least if you want to be able to compile ARM images) Change-Id: If1253203a2198f7dea632ba45540222ba3361932 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2147 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
2013-01-17armv7: Place reset vector + CBFS header + bootblock dynamicallyDavid Hendricks
This replaces hard-coded bootblock offsets using the new scheme. The assembler will place the initial branch instruction after BL1, skip 2 aligned chunks, and place the remaining bootblock code after. It will also leave an anchor string, currently 0xdeadbeef which cbfstool will find. Once found, cbfstool will place the master CBFS header at the next aligned offset. Here is how it looks: 0x0000 |--------------| | BL1 | 0x2000 |--------------| | branch | 0x2000 + align |--------------| | CBFS header | 0x2000 + align * 2 |--------------| | bootblock | |--------------| TODO: The option for alignment passed into cbfstool has always been 64. Can we set it to 16 instead? Change-Id: Icbe817cbd8a37f11990aaf060aab77d2dc113cb1 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2148 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-16use a relative path for #line 3David Hendricks
The current path doesn't make much sense (unless you're Sven) and may also incur a very long access penalty if /home happens to be on a network mounted filesystem. Change-Id: I8cfceb3cf237757ce9ea8f1953bce5a72691838a Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2153 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-01-12Implement GCC code coverage analysisStefan Reinauer
In order to provide some insight on what code is executed during coreboot's run time and how well our test scenarios work, this adds code coverage support to coreboot's ram stage. This should be easily adaptable for payloads, and maybe even romstage. See http://gcc.gnu.org/onlinedocs/gcc/Gcov.html for more information. To instrument coreboot, select CONFIG_COVERAGE ("Code coverage support") in Kconfig, and recompile coreboot. coreboot will then store its code coverage information into CBMEM, if possible. Then, run "cbmem -CV" as root on the target system running the instrumented coreboot binary. This will create a whole bunch of .gcda files that contain coverage information. Tar them up, copy them to your build system machine, and untar them. Then you can use your favorite coverage utility (gcov, lcov, ...) to visualize code coverage. For a sneak peak of what will expect you, please take a look at http://www.coreboot.org/~stepan/coreboot-coverage/ Change-Id: Ib287d8309878a1f5c4be770c38b1bc0bb3aa6ec7 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2052 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Martin Roth <martin@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-10armv7: dynamically calculate the branch offset in cbfstoolDavid Hendricks
This tidies up the ARMV7 case when creating cbfs: - Calculate the offset using the size of the master header and offsets rather than using a magic constant. - Re-order some assignments so things happen in a logical order. Change-Id: Id9cdbc3389c8bb504fa99436c9771936cc4c1c23 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2125 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-08cbmem utility: Find actual CBMEM areaStefan Reinauer
... without the need for a coreboot table entry for each of them. Change-Id: I2917710fb9d00c4533d81331a362bf0c40a30353 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2117 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-08cbmem utility: unify debug outputStefan Reinauer
... and indent it to make output more comprehensible. Change-Id: If321f3233b31be14b2723175b781e5dd60dd72b6 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2116 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-08cbfstool: index is replaced by strchr.zbao
From index(3): CONFORMING TO 4.3BSD; marked as LEGACY in POSIX.1-2001. POSIX.1-2008 removes the specifications of index() and rindex(), recommending strchr(3) and strrchr(3) instead. Change-Id: I3899b9ca9196dbbf2d147a38dacd7e742a3873fe Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/2112 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-01-08cbmem utility: Add option to dump cbmem consoleStefan Reinauer
This adds an option to the cbmem utility to dump the cbmem console. To keep the utility backwards compatible, specifying -c disables printing of time stamps. To print both console and time stamps, run the utility with -ct Change-Id: Idd2dbf32c3c44f857c2f41e6c817c5ab13155d6f Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2114 Tested-by: build bot (Jenkins) Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2013-01-08cbmem utility: drop obsolete python based implementationStefan Reinauer
The first version of the cbmem utility was written in python, but it had issues with 64bit systems and other little hick ups. Since the C version has much fewer dependencies (no python needed on target system), and it works in all corner cases, drop the python version. Change-Id: Ida3d6c9bb46f6d826f45538e4ceaa4fc1e771ff5 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2115 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: build bot (Jenkins)
2013-01-04cbfstool: Fix warnings on OS XStefan Reinauer
Most hton and noth functions are already available through the system headers we include on OS X, causing the compiler to warn about duplicate definitions. Change-Id: Id81852dfc028cf0c48155048c54d431436889c0e Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2106 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
2013-01-04cbmem utility: Use mmap instead of fseek/freadStefan Reinauer
The kernel on Ubuntu 12.04LTS does not allow to use fseek/fread to read the coreboot table at the end of memory but will instead abort cbmem with a "Bad Address" error. Whether that is a security feature (some variation of CONFIG_STRICT_DEVMEM) or a kernel bug is not yet clear, however using mmap works nicely. Change-Id: I796b4cd2096fcdcc65c1361ba990cd467f13877e Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2097 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-01-04Change "VERSION*" to more determined name "CBFS_HEADER_VERSION*".Hung-Te Lin
The 'VERSION' in CBFS header file is confusing and may conflict when being used in libpayload. Change-Id: I24cce0cd73540e38d96f222df0a65414b16f6260 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2098 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-01-04update CFLAGS for armv7David Hendricks
This updates $CFLAGS used for armv7. Most of them were just added to be consistent with what u-boot does. The important ones here are -march=armv7-a and -mthumb (to allow 16-bit Thumb instructions). I removed the hard float support because it got errors and coreboot should never use floats anyway. We're still having trouble with enums but I want to see how far it gets with this patch. Also, put the flags in a form that makes diffs easier to read. It's almost impossible otherwise. Finally, move some flags to the architecture Makefile, and rely on the fact that some are set for all architectures. Depends-On: I6f730d017391f9ec4401cdfd34931c869df10a9e Change-Id: Ia8a1ae22959933e06f7b996d1832cea40819f1ff Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/2075 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-01-03add user-specified offset when creating armv7 cbfs imageDavid Hendricks
The "offs" provided on the command-line was not taken into account when creating an image for armv7... Change-Id: I1781bd636f60c00581f3bd1d54506f0f50bb8ad0 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2092 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-01-03cbmem utility: support command line optionsStefan Reinauer
The tool could print much more useful information than just time stamps, for example the cbmem console on systems that don't have a kernel patched to support /sys/firmware/log. Hence, add command line option parsing to make adding such features easier in the future. Change-Id: Ib2b2584970f8a4e4187da803fcc5a95469f23a6a Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2091 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: build bot (Jenkins)
2012-12-21add a return type to test function used by xcompileDavid Hendricks
This fixes a minor bug that could cause testcc to fail unexpectedly. Change-Id: Ib75d343104b6937682c05acf5232596aac83f105 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/2068 Tested-by: build bot (Jenkins)
2012-12-14cbfstool: Align the column of build hint message.Zheng Bao
Change-Id: Ic217450411d7fa4e6c3a053be62d7c948dc7145e Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/2030 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-12-12cbfstool: Catch failing parse_elf_to_payload()Stefan Reinauer
Otherwise cbfstool will segfault if you try to add an x86 payload to an ARM image. Change-Id: Ie468005ce9325a4f17c4f206c59f48e39d9338df Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2028 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-09Revert "armv7: use __cpu_to_le32 for endianness of reset vector instruction"Stefan Reinauer
This reverts commit 67ce04ea9a9c7e30dd96b9f36a938b51655e8a44 Change-Id: I2781c9275c03bcabf0211e1b6cd1aa8f13005ae0 Reviewed-on: http://review.coreboot.org/2014 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08crossgcc: Normalize library directoriesPatrick Georgi
Various of the build scripts used upstream can't cope with multilib library paths (eg. lib64), so move things to a place where they can find them, if such paths are used. Change-Id: I0dd9bba9a9eadd92d8704157e868fb37c715ee91 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/2013 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08abuild: Select correct cross compiler for ARMV7 architectureStefan Reinauer
Change-Id: Ia0dce25a4271299757654ba46baafe6a6673c6d2 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/2000 Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
2012-12-08buildgcc: Clean up PATH handlingStefan Reinauer
This puts our installed binaries first in the search path, which is what we really want. ... and remove some dead code Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I91725af6b0fc486bd943d8e25cdce8d3e2503b3c Reviewed-on: http://review.coreboot.org/1998 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2012-12-08buildgcc: drop hack to build gcc trunk versionsStefan Reinauer
The focus of the script is to create a supported cross toolchain, and with GOLD and LTO being released features, we don't need this anymore. Change-Id: Ieb7752ce6e143d93414aba5887190f853cbd5a4b Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1997 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2012-12-07buildgcc: Remove mingw32 hacksPatrick Georgi
After patching them to be more flexible, an even better approach was found: With this change libgcc isn't built at all on mingw32 platforms, so the system headers aren't necessary anymore. Now x86_64-pc-mingw32 builds, too. Change-Id: Ic1406588669d87aee1bcf40ff67af77f2a6ac283 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1985 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Raymond Danks <ray.danks@se-eng.com>
2012-12-07abuild: produce valid junit filesStefan Reinauer
If no valid cross compiler is found, the junit file produced by abuild is invalid, missing the closing </testcase> tag. This breaks proper reporting in Jenkins of our ARM board at this moment. Change-Id: I94bfc7f334d33ceeb53451a7c5125058c1f33bd4 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1992 Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: David Hendricks <dhendrix@chromium.org> Tested-by: build bot (Jenkins)
2012-12-07armv7: use __cpu_to_le32 for endianness of reset vector instructionDavid Hendricks
Change-Id: Ic8f35d7172f6afa933c24774177ed65e6dc579a0 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/1979 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-06crossgcc: Generalize matching for the mingw casePatrick Georgi
With this change, i686-pc-mingw32 is acceptable, too. Change-Id: I924f7ece84e77dc751e5e0318bac1ebc72d39d21 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1972 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-06Fix xcompile (again)Stefan Reinauer
After cherry-picking change 1679 it became apparent that there was a small typo in my last xcompile change. With this patch applied, I can now compile the first few files in the tree before GCC dies with In file included from src/arch/armv7/lib/romstage_console.c:23:0: src/include/uart.h:31:6: error: redundant redeclaration of 'uart_init' [-Werror=redundant-decls] Now for some fun... Change-Id: Idbb07f609e4a240238964cc16714639f5ef09914 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1970 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2012-12-06Fix xcompile for ARMv7 and our cross toolchainStefan Reinauer
The naming of architectures is highly inconsistent between the different components of the toolchain. In binutils, the file architecture is elf32-littlearch. In GCC it's armv7a-eabi. This patch adds support for different BFD / GCC names Change-Id: Ib644f71e8d8b4964adec73eed23921d3838e8aa7 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1969 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-12-06crossgcc: Fix buildgcc on Mac OS XStefan Reinauer
Once again, the compiler we use on Mac OS X had trouble compiling GCC. Switch to llvm-gcc because that one works with Xcode 4.5.2 and gcc 4.7.2. Also drop the -W flags not known to Xcode from the iasl Makefile, and drop the --remove-destination option from the copy, because that does not exist on Darwin. Change-Id: I9f978f65b5ae7edee2ecdcab337772e7a692bd9b Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1967 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-05crossgcc: Add support for building armv7a toolchainStefan Reinauer
!#%$@ autotools don't support all the platforms gcc and binutils support. If you try to update to the latest autoconf, it will complain that you have to use the older one. If I had a penny for every time autotools broke portability... Change-Id: I479b6c5f64f1def8dca889884e6a2b0e2ffc1fb8 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1966 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2012-11-30Rename devices -> deviceStefan Reinauer
to match src/include/device Change-Id: I5d0e5b4361c34881a3b81347aac48738cb5b9af0 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1960 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-11-30cbfstool: Clean up messagesStefan Reinauer
The output of cbfstool is a little inconsistent in some places. This patch fixes it. Change-Id: Ieb643cb769ebfa2a307bd286ae2c46f75ac5e1c1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1955 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-30Add multi-architecture support to cbfstoolDavid Hendricks
This is an initial re-factoring of CBFS code to enable multiple architectures. To achieve a clean solution, an additional field describing the architecture has to be added to the master header. Hence we also increase the version number in the master header. Change-Id: Icda681673221f8c27efbc46f16c2c5682b16a265 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/1944 Tested-by: build bot (Jenkins)
2012-11-29crossgcc: Only build iasl in acpica.Zheng Bao
Other acpica's modules are not needed. Change-Id: I16846caa922aded8db7c1d9e64c007fb2772ff98 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1935 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2012-11-29Make mainboard_ops and mainboard.c file optionalKyösti Mälkki
This provides weak empty declaration for mainboard_ops. The struct chip_operations is not defined for __PRE_RAM__ so the declaration is also moved upwards in the output. Change-Id: I101f0b8b9f0a55fb51a7c6475d53cc588c84026d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1931 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27build system: Split linking into multiple stepsPatrick Georgi
After collecting dependencies for ramstage, add an intermediate step in which object files are linked per directory. The results are then linked into the final binary. This reduces the maximum command line length and might also help with future use of LTO linking. Also adapt the lint test for build dir handling, since printall doesn't provide individual object files for ramstage anymore. Change-Id: Ie40febd8c1eaf4609944eedeab46d870639e53df Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1911 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27Provide weak empty declarations of all chip_ops used on a boardPatrick Georgi
sconfig creates empty defaults for all chip_ops, which can be overridden by drivers simply by providing a concrete implementation. Change-Id: Ib37515f0b0747bdbf4da780d28690a1e719944b2 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/1567 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27abuild: only rebuild boards if requested or after a broken buildPatrick Georgi
That used to be the behaviour, and it's quite useful to incrementally fix bugs across the tree. Change-Id: I3e30cbdcf01631bc29f892054caa3babb0969beb Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1888 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-27xcompile: Add missing XGCCPATHZheng Bao
XGCCPATH is missing in new xcompile. Change-Id: I177f54189be445404a4a61419064d3c414b8a30c Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1921 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-27 Make xcompile support multiple architecturesRonald G. Minnich
With this change the the xcompile script now creates environment variables for more than one architecture. Signed-off-by: David Hendricks <dhendrix@chromium.org> Signed-off-by: Hung-Te Lin <hungte@chromium.org> Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Change-Id: I349a1fd1d865ef16979f1dfd6aeca12b1ee2eed6 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/1915 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2012-11-24crossgcc: update to acpica-20121114Idwer Vollering
Update acpica to release 20121114 and update patches/ to build with this version of acpica. Correct the creation of crossgcc-build.log Bump CROSSGCC_VERSION. Change-Id: I269454ebc3c78b5852e4a67e55bb5642edad191d Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/1861 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-22crossgcc: properly test for flexPatrick Georgi
This is no GNU tool, so testing for "GNU" in the version string is bound to fail. We now accept everything that returns success on "flex --version" and then hope for the best. I tested both cases Change-Id: If325f613fde1648847b998b7e8e5782d0f22b484 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1884 Tested-by: build bot (Jenkins) Reviewed-by: Zheng Bao <zheng.bao@amd.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-17Cleanup sconfigKyösti Mälkki
Fix side-effects of name translation, treat original name as const. Change-Id: Iae26be8cefe7db11eeb8e62fce6f3b8bc9c1f4ed Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/799 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-16buildgcc: Print error if flex is missingStefan Reinauer
flex is needed by acpica. This patch makes the build fail early instead of after gcc has been compiled, if flex is not there. Change-Id: Idfd71bdf704ab25de655f1a72c266c5220b15048 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1860 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-14nvramtool: fsync for mingw.Zheng Bao
Change-Id: Ifdec69ca46ba8cbd3eb154d8f4af4b3cafa8019d Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zbao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1805 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-11-12cbfstool: Rework to use getopt style parametersStefan Reinauer
- Adding more and more optional and non-optional parameters bloated cbfstool and made the code hard to read with a lot of parsing in the actual cbfs handling functions. This change switches over to use getopt style options for everything but command and cbfs file name. - This allows us to simplify the coreboot Makefiles a bit - Also, add guards to include files - Fix some 80+ character lines - Add more detailed error reporting - Free memory we're allocating Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: Ia9137942deb8d26bbb30068e6de72466afe9b0a7 Reviewed-on: http://review.coreboot.org/1800 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12cbfstool: Update LZMA encoder to LZMA SDK 9.12Stefan Reinauer
This removes almost all C++ code (except the wrapper) Change-Id: I0f84070e3b6dc57c98d49a53150a140479b3221f Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1799 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12cbmem compilation needs to use the hardened toolchainVadim Bendebury
The appropriate compiler (provided by the build system) is used to ensure proper toolchain options are used. cbmem.c is being modified to suppress pointer to integer typecast warnings. Change-Id: Ibab2faacbd7bdfcf617ce9ea4296ebe7d7b64562 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/1791 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-12ifdtool: Dump more registers from FDStefan Reinauer
Only thing not decoded now are the PCH straps ifdtool -d path/to/image.bin File path/to/image.bin is 4096 bytes Found Flash Descriptor signature at 0x00000010 FLMAP0: 0x02040003 NR: 2 FRBA: 0x40 NC: 1 FCBA: 0x30 FLMAP1: 0x12100206 ISL: 0x12 FPSBA: 0x100 NM: 2 FMBA: 0x60 FLMAP2: 0x00210120 PSL: 0x2101 FMSBA: 0x200 FLUMAP1: 0x000004df Intel ME VSCC Table Length (VTL): 4 Intel ME VSCC Table Base Address (VTBA): 0x000df0 ME VSCC table: JID0: 0x001740ef SPI Componend Device ID 1: 0x17 SPI Componend Device ID 0: 0x40 SPI Componend Vendor ID: 0xef VSCC0: 0x20052005 Lower Erase Opcode: 0x20 Lower Write Enable on Write Status: 0x50 Lower Write Status Required: No Lower Write Granularity: 64 bytes Lower Block / Sector Erase Size: 4KB Upper Erase Opcode: 0x20 Upper Write Enable on Write Status: 0x50 Upper Write Status Required: No Upper Write Granularity: 64 bytes Upper Block / Sector Erase Size: 4KB JID1: 0x001720c2 SPI Componend Device ID 1: 0x17 SPI Componend Device ID 0: 0x20 SPI Componend Vendor ID: 0xc2 VSCC1: 0x20052005 Lower Erase Opcode: 0x20 Lower Write Enable on Write Status: 0x50 Lower Write Status Required: No Lower Write Granularity: 64 bytes Lower Block / Sector Erase Size: 4KB Upper Erase Opcode: 0x20 Upper Write Enable on Write Status: 0x50 Upper Write Status Required: No Upper Write Granularity: 64 bytes Upper Block / Sector Erase Size: 4KB OEM Section: 00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 10: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff Found Region Section FLREG0: 0x00000000 Flash Region 0 (Flash Descriptor): 00000000 - 00000fff FLREG1: 0x07ff0180 Flash Region 1 (BIOS): 00180000 - 007fffff FLREG2: 0x017f0001 Flash Region 2 (Intel ME): 00001000 - 0017ffff FLREG3: 0x00001fff Flash Region 3 (GbE): 00fff000 - 00000fff (unused) FLREG4: 0x00001fff Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused) Found Component Section FLCOMP 0x64900024 Dual Output Fast Read Support: supported Read ID/Read Status Clock Frequency: 50MHz Write/Erase Clock Frequency: 50MHz Fast Read Clock Frequency: 50MHz Fast Read Support: supported Read Clock Frequency: 20MHz Component 2 Density: 8MB Component 1 Density: 8MB FLILL 0x000060c7 Invalid Instruction 3: 0x00 Invalid Instruction 2: 0x00 Invalid Instruction 1: 0x60 Invalid Instruction 0: 0xc7 FLPB 0x00000000 Flash Partition Boundary Address: 0x000000 Found PCH Strap Section PCHSTRP0: 0x0820d602 PCHSTRP1: 0x0000010f PCHSTRP2: 0x00560000 PCHSTRP3: 0x00000000 PCHSTRP4: 0x00c8e000 PCHSTRP5: 0x00000000 PCHSTRP6: 0x00000000 PCHSTRP7: 0xc0001ae0 PCHSTRP8: 0x00000000 PCHSTRP9: 0x30000580 PCHSTRP10: 0x00410044 PCHSTRP11: 0x99000097 PCHSTRP12: 0x00000000 PCHSTRP13: 0x00000000 PCHSTRP14: 0x00000000 PCHSTRP15: 0x0000033e PCHSTRP16: 0x00000000 PCHSTRP17: 0x00000002 Found Master Section FLMSTR1: 0x0a0b0000 (Host CPU/BIOS) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: disabled Host CPU/BIOS Region Write Access: enabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: disabled Host CPU/BIOS Region Read Access: enabled Flash Descriptor Read Access: enabled Requester ID: 0x0000 FLMSTR2: 0x0c0d0000 (Intel ME) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: enabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: enabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: enabled Requester ID: 0x0000 FLMSTR3: 0x08080118 (GbE) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: disabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: disabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: disabled Requester ID: 0x0118 Found Processor Strap Section ????: 0x00000000 ????: 0xffffffff ????: 0xffffffff ????: 0xffffffff Change-Id: I68a613df2fd80e097cdea46fbad104d7c73ac9ad Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1756 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-12Utility to dump boot timing tableVadim Bendebury
Coreboot and u-boot create a table of timestamps which allows to see the boot process performance. The util/cbmem/cbmem.py script allows to access the table after ChromeOS boots up and display its contents on the console. The problem is that shipping images do not include Python interpreter, so there is no way to access the table on a production machine. This change introduces a utility which is a Linux app displaying the timestamp table. Conceivably the output of this utility might be included in one of the ChromeOS :/system sections, so it was attempted to write this procedure 'fail safe', namely reporting errors and not continuing processing if something goes wrong. Including of coreboot/src .h files will allow to keep the firmware timestamp implementation and this utility in sync in the future. Test: . build the utility (run 'make' while in chroot in util/cbmem) . copy `cbmem' and 'cbmem.py' to the target . run both utilities (limiting cbmem.py output to 25 lines or so) . observe that the generated tables are identical (modulo rounding up of int division, resulting in 1 ns discrepancies in some cases) localhost var # ./cbmem 18 entries total: 1:62,080 2:64,569 (2,489) 3:82,520 (17,951) 4:82,695 (174) 8:84,384 (1,688) 9:131,731 (47,347) 10:131,821 (89) 30:131,849 (27) 40:132,618 (769) 50:134,594 (1,975) 60:134,729 (134) 70:363,440 (228,710) 75:363,453 (13) 80:368,165 (4,711) 90:370,018 (1,852) 99:488,217 (118,199) 1000:491,324 (3,107) 1100:760,475 (269,150) localhost var # ./cbmem.py | head -25 time base 4249800, total entries 18 1:62,080 2:64,569 (2,489) 3:82,520 (17,951) 4:82,695 (174) 8:84,384 (1,688) 9:131,731 (47,347) 10:131,821 (89) 30:131,849 (27) 40:132,618 (769) 50:134,594 (1,975) 60:134,729 (134) 70:363,440 (228,710) 75:363,453 (13) 80:368,165 (4,711) 90:370,018 (1,852) 99:488,217 (118,199) 1000:491,324 (3,107) 1100:760,475 (269,150) Change-Id: I013e594d4afe323106d88e7938dd40b17760621c Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/1759 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-12cbfstool: Remove unused cmd_tStefan Reinauer
Change-Id: Ib1c05828258b9dc7107920ae6cb25bc92ffa86d1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1795 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-12cbfstool: add add-flat-binary command to add raw executablesStefan Reinauer
Example: cbfstool image-link.bin add-flat-binary u-boot.bin fallback/payload \ 0x100000 0x100020 will add u-boot.bin as fallback/payload with a load address of 0x100000 and an entry-point of 0x10002. Change-Id: I6cd04a65eee9f66162f822e168b0e96dbf75a2a7 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1792 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-09ifdtool: Add locking/unlocking and dumping of access permissionsStefan Reinauer
ifdtool will now dump access permissions of system comonents to certain IFD sections: Found Master Section FLMSTR1: 0xffff0000 (Host CPU/BIOS) Platform Data Region Write Access: enabled GbE Region Write Access: enabled Intel ME Region Write Access: enabled Host CPU/BIOS Region Write Access: enabled Flash Descriptor Write Access: enabled Platform Data Region Read Access: enabled GbE Region Read Access: enabled Intel ME Region Read Access: enabled Host CPU/BIOS Region Read Access: enabled Flash Descriptor Read Access: enabled Requester ID: 0x0000 FLMSTR2: 0x0c0d0000 (Intel ME) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: enabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: enabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: enabled Requester ID: 0x0000 FLMSTR3: 0x08080118 (GbE) Platform Data Region Write Access: disabled GbE Region Write Access: enabled Intel ME Region Write Access: disabled Host CPU/BIOS Region Write Access: disabled Flash Descriptor Write Access: disabled Platform Data Region Read Access: disabled GbE Region Read Access: enabled Intel ME Region Read Access: disabled Host CPU/BIOS Region Read Access: disabled Flash Descriptor Read Access: disabled Requester ID: 0x0118 Also, ifdtool -u /path/to/image will unlock the host's access to the firmware descriptor and ME region. ifdtool -l /path/to/image will lock down the host's access to the firmware descriptor and ME region. Change-Id: I3e081b80a9bcb398772416f143b794bf307b1c36 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1755 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2012-11-09Fix abuild output in JenkinsStefan Reinauer
Ignore the harmless broken pipe messages from "yes" Building amd/pistachio; i386: ok, using i386-elf-gcc Using payload /srv/jenkins/payloads/seabios/bios.bin.elf Creating config file... (blobs, ccache) yes: standard output: Broken pipe yes: write error ok; Compiling image on 4 cpus in parallel .. ok. (took 10s) Change-Id: Ic53e246aac3ab6d7ea7a006a8dfac1c3f85797bc Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1813 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-09Fix Segmentation Fault in ifdtoolStefan Reinauer
If a section is bigger than the FD file it is injected into, and the FD lies about the size of the FD file, ifdtool would crash because reading in the section writes beyound the FD file in memory. Change-Id: Idcfac2b1e2b5907fad34799e44a8abfd89190fcc Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1754 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2012-11-08Add utility for parsing/modifying DTD arrayVadim Bendebury
Detailed timing descriptor (DTD) is an 18 byte array describing video mode (screen resolution, display properties, etc.) in Intel Option ROM. Option ROM can support multiple video modes, specific mode is picked by the BIOS through the appropriate Option ROM callback function. The new utility allows to interpret the 18 byte hex DTD dump, and/or modify certain values, and generate a new DTD. To parse the DTD contents just pass the 18 bytes to the utility in the command line. To modify the existing contents and generate a new dump precede the 18 bytes with '-m' and follow prompts. Change-Id: Ib00bdaf42c350b98b5a48d08e6bb347b5ec25a8b Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/1711 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-08Get more informative output from cbmem.pyVadim Bendebury
This is a cosmetic change which formats timestamp information retrieved by cbmem.py. Instead of printing timestamps in a single line, print them one per line and add time (in us) elapsed since the previous timestamp. time base 4149594, total entries 18 1:56,928 2:58,851 (1,923) 3:175,230 (116,378) 4:175,340 (109) 8:177,199 (1,859) 9:214,368 (37,168) 10:214,450 (81) 30:214,462 (11) 40:215,205 (743) 50:217,180 (1,974) 60:217,312 (132) 70:436,984 (219,671) 75:436,993 (8) 80:441,424 (4,431) 90:442,487 (1,062) 99:553,777 (111,289) 1000:556,513 (2,736) 1100:824,621 (268,107) Change-Id: I0d25cafe766c10377017697e6b206276e1a92992 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/1716 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-08Fix cbmem to work on 64 bit platformsVadim Bendebury
For some reason which I fail to understand, specifying endiannes using '@' (which means 'native' and should be the same as '<' on x86 platforms) causes cbmem.py to crash the machine on 64 bit systems. What happens is that the addresses read from various table headers' struct representations do not make sense, when bogus address gets passed to get_phys_mem, the crash happens while that function is executed. dlaurie@ found out that replacing "@" with "<" in fact fixes the issue. After some investigation I am just submitting this fix without much understanding of the root cause. Change-Id: Iaba9bc72a3f6b1d0407a5f1e3b459ccf5063969d Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/1715 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-08cbfstool: add offset parameter to create commandStefan Reinauer
CBFS allows coreboot rom images that are only partially covered by the filesystem itself. The intention of this feature was to allow EC / ME / IMC firmware to be inserted easily at the beginning of the image. However, this was never implemented in cbfstool. This patch implements an additional parameter for cbfstool. If you call cbfstool like this: cbfstool coreboot.rom create 8192K bootblock.bin 64 0x700000 it will now create an 8M image with CBFS covering the last 1M of that image. Test: cbfstool coreboot.rom create 8192K bootblock.bin 64 0x700000 creates an 8M image that is 7M of 0xff and 1M of CBFS. Change-Id: I5c016b4bf32433f160b43f4df2dd768276f4c70b Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1708 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-07cbfstool: respect dependencies when building locallyStefan Reinauer
cbfstool was not looking at any dependencies when building by running make in util/cbfstool. By fixing this it's not required to make clean every time you edit a file in there. Change-Id: I544fd54d4b9dd3b277996c21ade56dc086b84800 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/1707 Reviewed-by: Marc Jones <marcj303@gmail.com> Tested-by: build bot (Jenkins)
2012-11-06Drop redundant CHIP_NAME in mainboard.cKyösti Mälkki
Compose the name from Kconfig strings instead. As the field is for debug print use only, a minor change in the output should do no harm. The strings no longer include word "Mainboard". Change-Id: Ifd24f408271eb5a5d1a08a317512ef00cb537ee2 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1635 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-11-02crossgcc: build expat and python in silenceIdwer Vollering
Don't let expat and/or python show the compile process on stdout. Instead direct this output to crossgcc-build.log. Fix the logfile path for python. Change-Id: I431dabf6955d7eef3e54c96d0fb11b92d1cee96d Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/1667 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-10-27inteltool: Add output of 64bit registers in PMBASENico Huber
Output values of 64bit registers and fix settings for GPE0_EN for ICH9/10. Change-Id: I8ca6b32500331707670972b38466345f581844cd Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/1625 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-27crossgcc: update to Python 2.7.3Idwer Vollering
Change-Id: I9db10e8c7dcd693cc4ab935c587da02dd7eb2bc5 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/1621 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-27crossgcc: update to expat 2.1.0Idwer Vollering
Change-Id: Id0b736d402b33138e27b18c74e5ed8ffab0bcccb Signed-off-by: Idwer Vollering <vidwer@gmail.com> Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/1620 Tested-by: build bot (Jenkins)
2012-10-26crossgcc: update mingw w32api's download URLIdwer Vollering
Correct the download URL of mingw's w32api. Change-Id: I98fb43c121399c23f6693ade5cd3b42bc9463724 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/1619 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
2012-10-26buildgcc: redirect error output to /dev/nullZheng Bao
Change-Id: I7cd63248eb8abb711cecce41e3f8a282b34aa126 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1548 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>