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2018-01-23util/*: Fix final newlines in scriptsAlex Thiessen
Some script files under the `util` directory have no final newline or multiple final newlines. This is fixed so that an adapted `util/lint/lint-extended-015-final-newlines` does not bark at them anymore. Change-Id: Icec08f1fc7ea837906653475b7f821aa1a143169 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23324 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2018-01-22util/gitconfig: Replace subshells with bracesAlex Thiessen
The check for `user.name` and `user.email` being set is done in `gitconfig.sh` and it uses two subshells where none is actually needed. Stream redirection can be consolidated. Change-Id: Ia1d19eb3c11f9d11f030dcc179bc175956cd7116 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23250 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-22util/gitconfig: Update `sup-destroy` git aliasAlex Thiessen
The `git sup-destroy` alias uses a subshell in order to make `git submodule deinit` deinitialize all submodules. This isn't necessary as the `--all` switch does the same. Furthermore, `git submodule init && git submodule update` equals to `git submodule --init`. Change-Id: Ib690d66795da4049bb0bb350a0609cf2e6b5c4c4 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23249 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-20drivers/mrc_cache: Always generate an FMAP regionArthur Heymans
This automatically generates an FMAP region for the MRC_CACHE driver which is easier to handle than a cbfsfile. Adds some spaces and more comments to Makefile.inc to improve readability. Tested on Thinkpad x200 with some proof of concept patches. Change-Id: Iaaca36b1123b094ec1bbe5df4fb25660919173ca Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23150 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-20autoport: Don't include default_irq_route.aslArthur Heymans
This file is no longer there since ACPI pirq routing is now done in an automated fashion in SSDT. Change-Id: I8bafafbf670fe0fc2f20b46b5d8abee722931c6d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23323 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christoph Pomaska <cp_public@posteo.de> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-01-20autoport: Remove '-' from Kconfig optionsArthur Heymans
This won't compile since '-' is an operator in C. Change-Id: Icf900c959cbcbd0b07cd83a1f6866bf255fdcf01 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christoph Pomaska <cp_public@posteo.de> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-01-18util/gitconfig: Fix too long lines in gitconfig.shAlex Thiessen
Change-Id: Iaff0852259f0a91fb4c906e1a01d77b92f8a49f1 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23248 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18util/gitconfig: Make gitconfig.sh support gitfileAlex Thiessen
The `gitconfig.sh` script installs hooks to the according directories (for coreboot and its submodules). It has the `hooks` directory hard-coded to be `.git/hooks`, which makes the installation fail when coreboot itself is a submodule because then `.git` becomes a gitfile. Replace hard-coded path handling using the according `git rev-parse` calls. Change-Id: I778e20be24bb27d0081c9e1c12883117d6d50347 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18util/bincfg: Fix some whitespacesDenis 'GNUtoo' Carikli
Change-Id: I674a3f58a576948dc3c0cd32ef06b42ef13353ee Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: https://review.coreboot.org/23240 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-18util/blobtool: rename to bincfgDenis 'GNUtoo' Carikli
The name blobtool is confusing as 'blob' is also used to describe nonfree software in binary form. Since this utility deals with binary configurations it makes more sense to call it bincfg. Change-Id: I3339274f1c42df4bb4a6b30b9538d91c3c03d7d0 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: https://review.coreboot.org/23239 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-17util/release: Improve git worktree checksAlex Thiessen
The bash script `genrelnotes` checks for `.git` to be present to determine whether the current directory is the top directory of a git worktree. This check is rather weak and doesn't handle many edge cases like that of a broken gitfile. Add a proper `git rev-parse` call to check the condition. Change-Id: I32b06ca982d55fd8e88e55651b6bc53014905823 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23252 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15inteltool: Dump Sunrise Point PCH-H GPIO groupsNico Huber
Change-Id: Ib6b083c31617e19cbbb0929e2fc8ab39d54533bf Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19589 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15inteltool: Support for nasty Primary to Sideband Bridge (P2SB)Nico Huber
The Primary to Sideband Bridge (P2SB) is the interface to Private Con- figuration Registers (PCR) including GPIO configuration. Of course, access is restricted to Intel partners and criminals, so the PCI device is hidden from the OS. Probably we only need to fetch the SBREG_BAR address and can hide the PCI device again after that. Change-Id: Ic121a09f021708aab82ae4b9d76d6c3c6fb884fa Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19588 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15buildgcc: Add patch to work around Musl libc issueNico Huber
GCC includes `sched.h` after poisoning calloc(). This results in a build failure with Musl libc. We work around the issue by including `sched.h` earlier and throw around some void pointers so we only have to do it in one place. Change-Id: I1d5462eb9a448147a95dd4ec50361b3f5a28910c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22786 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-01-15buildgcc: Drop libelf/elfutilsNico Huber
Looks like we were unnecessarily dragging this around for some time now. GCC's installation manual doesn't mention libelf as a requirement and a build of crossgcc-i386 doesn't show any sign of it being used. This also fixes a lot issues on non-GNU distributions that were intro- duced by switching to the elfutils version of libelf. Change-Id: Iff308a9bed9ae3842557d251b75d1faadfafe0da Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22773 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/crossgcc: Output apt-get commands on debianAlex Thiessen
In the buildgcc script, there is a check that the tools required are installed. When a tool is missing, a message is output suggesting an installation method, e.g. `sudo apt-get install foo` on debian-based systems. When run on a true, vanilla debian system, the error message provides only a generic hint because the `please_install()` function fails to detect the OS kind. Detection is based on definition of `ID_LIKE` in `/etc/os-release` yet such systems only define `ID` to `debian`. This commit closes the detection gap. Tested on debian 9 (stretch). Change-Id: I3c867837e9157bee13010bd0a005028c369ce55f Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23231 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/superiotool: dump VT1211 registersLubomir Rintel
Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/superiotool: distinguish between VT82C686 and VT1211Lubomir Rintel
They both have a device id of 0x3c. The former is part of the PCI chip set accessible via port 0x3f0 while the latter is a standalone LPC chip accessible via 0x2e/0x4e depending on strapping. They're not register compatible: the VT82C686 only provides a FDC, LPT and part of UARTs. The VT82C686 documentation suggests it has revision 0x00 while the VT1211 datasheet indicates 0x01. Nevertheless, the VT1211 I happen to have hs a revision of 0x02. Thus the revision is probably not good enough to tell one from the another. Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/superiotool: recognize a VT1211 LPC superioLubomir Rintel
Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-14util/broadcom/secimage: Add OpenSSL 1.1 supportAlex Thiessen
The `secimage` utility uses OpenSSL to calculate HMAC, which it does in a rather unorthodox way, using deprecated `HMAC_CTX_init` API and repeated calling of `HMAC_Init_ex` without a clear reason. The former causes build errors with OpenSSL 1.1 while the rest of the `HmacSha256Hash` function is confusing and overly complex. Make `HmacSha256Hash` use a single OpenSSL API call. Test passed: resulting signed binary remains identical. Change-Id: Ib23c0ad96f9d8cc30ad357de8c0b0ba967c7d724 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23069 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-14util/superiotool: add support for chip ITE IT8623EGergely Kiss
Due to the lack of a datasheet, defaults are shown as "not available (NA)" in the register dump. Change-Id: I6baaf5dd95453fb1265425f357ea16c710c006ba Signed-off-by: Gergely Kiss <mail.gery@gmail.com> Reviewed-on: https://review.coreboot.org/23084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-01-11util/gitconfig: Refuse to commit on lint failureAlex Thiessen
After running `lint-stable` in the pre-commit hook, its result is ignored. This behavior was introduced in commit b18f522b (lint/gitconfig: Enable checkpatch.pl checking of commits) and it doesn't seem intentional. This issue was also mentioned in the revert discussion (https://review.coreboot.org/c/coreboot/+/17440). Enable `errexit` mode of the shell so that the hook fails when an error occurs in any of the tests. Also, enable `nounset` mode to catch typos easier. Change-Id: I749963167660ea6a1a04d40a14ad1113e82f0f86 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23130 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-10util/inteltool: Add Skylake Desktop NorthbridgeChristoph Pomaska
Add the 8086:191f North/Host Bridge to the list of definitions. Adding the definiton makes the Northbridge get recognized by inteltool. It is found in the Intel i5-6600K CPU: https://ark.intel.com/products/88191/Intel-Core-i5-6600K-Processor-6M-Cache-up-to-3_90-GHz Change-Id: Id746d1e8b3bb90b3b68a2f6c372890671dd61b5f Signed-off-by: Christoph Pomaska <cp_public@gmx.de> Reviewed-on: https://review.coreboot.org/23055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-10util/lint: Check license headers of git hooksAlex Thiessen
Now that all the files under util/gitconfig have their license headers, enable lint-000-license-headers to check the directory too. Change-Id: I242256f72ac70553535509f83166c6d1ddb16fdc Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23098 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-01-10util/gitconfig: Add missing license headersAlex Thiessen
License header for the `gitconfig.sh` was copied from the Makefile it was extracted from in commit 9ab8ae6a (util/gitconfig: Make gitconfig a bash script). License header for the pre-commit hook names Patrick Georgi as the copyright holder as he is the original author. Change-Id: Ie051e5e6ae7571050ece383e6be8236ed7d1ddd9 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23097 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-01-07autoport: Add Intel PCIe Root Port and BridgesJean Lucas
- 0x0151: Xeon E3-1200 PCIe Root Port - 0x1e25: 7/C216 Series Chipset Family DMI to PCI Bridge - 0x2448: 82801 Mobile PCI Bridge - 0x244e: 82801 Desktop PCI Bridge Change-Id: I4111b73adc0f08d643c940cd43ab7fd4c0af7668 Signed-off-by: Jean Lucas <jean@4ray.co> Reviewed-on: https://review.coreboot.org/22794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-01-04util/gitconfig: Do not wait for user inputAlex Thiessen
When running `make gitconfig` on a freshly cloned repository, the script will wait for user input without a prompt in a call to `sed`, caused by a spurious newline introduced in commit 9ab8ae6a (util/gitconfig: Make gitconfig a bash script). Change-Id: I2aa722c052d24dcffa9688df09bcf8dc767bd0b6 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23059 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-01-04util/gitconfig: Support dash in pre-commit hookAlex Thiessen
On debian systems, /bin/sh is `dash` which has built-in `echo` always interpreting escape sequences such as '\n'. The pre-commit hook uses the built-in for piping diff to checkpatch, interpreting the diff's escape sequences in the process and leading to false negatives and preventing commits despite conformance. Use `printf` instead of `echo` when handling diff content. The bug was introduced in commit ef869305 (util/gitconfig: update pre-commit script). Change-Id: I37edfe7b32721cb63d99299563cb11f26082c9a9 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23070 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-12-22inteltool: Add hint for compiler to avoid fall-through warningPaul Menzel
Falling through is intended here, so add a comment that GCC will notice and stop warning about this. Change-Id: I12637b6bc18844a3bc47f06208df7fee7a4feb3b Found-by: gcc-7 (Debian 7-20170316-1) 7.0.1 20170316 (experimental) [trunk revision 246203] Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/18906 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Omar Pakker Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-12-20util/inteltool: Add GPU device IDsPatrick Rudolph
Add PCI device IDs for several Intel GPUs. Change-Id: I7d6ba16b2b115187fd57a31716f23a610b520d3e Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/22431 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-12-20util/cbfstool: Check for NULL before dereferenceMartin Roth
Fixed coverity issue: 1302455 - Dereference null return value Change-Id: I59b908adc4d35f08fda8e4ad3f806714f2caeb65 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22900 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-12-19util/cbfstool: calculate cbfs file size for xip stagesAaron Durbin
The initial lookup for cbfs location for xip stages is implicitly using the ELF size assuming it's relatively equivalent. However, if the ELF that is being converted contains debug information or other metadata then the location lookup can fail because the ELF is considerably bigger than the real footprint. BUG=b:70801221 Change-Id: I47024dcd8205a09885d3a3f76e255eb5e3c55d9e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/22936 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-12-15util/gitconfig: Make gitconfig a bash scriptMarc Jones
The gitconfig target has a few bashisms and would fail silently on systems that use a POSIX standard sh (like Ubuntu dash). Remove the code from the makefile and put it in a bash script that is called by the gitconfig target. Change-Id: I3bc8cf688a3ad211b57c8ca0e6b1e86c82dc6a37 Signed-off-by: Marc Jones <marcj303@gmail.com> Reviewed-on: https://review.coreboot.org/22857 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-12-12util/cbmem: Print timestamp frequency in verbose modeMartin Roth
The code flow is changed slightly to print the timestamp frequency from either method of determining it. BUG=b:70432544 TEST=Build and test cbmem -t -V Change-Id: I02286fa67919e70a3592cdbcc1c9ca2991b7f385 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/22821 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-12-09nvramtool: Add dummy cmos-hw-unix accessor implementation for non-x86Paul Kocialkowski
The default implementation uses inb/outb, that is not available on ARM platforms and others. A dummy implementation allows building nvramtool on these platforms. Change-Id: I75e4a1a0cbd35ca40f7b108658686839ccf9784a Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/22562 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-08cbfstool: Add '-p' option for paddingDaisuke Nojiri
This patch adds '-p' to the 'add' command. It allows the add command to specify the size of the padding added with the file being added. This is useful to reserve an extra space in case the file is too big to be relocated. BUG=b:68660966 BRANCH=none TEST=emerge-fizz coreboot && cbfstool image.bin add -n ecrw -f EC_RW.bin -p 0x10 ... Verify image.bin has extra space in the file header. Change-Id: I64bc54fd10a453b4da467bc69d9590e61b0f7ead Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://review.coreboot.org/22239 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-12-07buildgcc: Hide stderr output of getopt testNico Huber
Change-Id: I03c38de3a3b88d569d629be7483eb53164cf136a Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/22738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-12-05lint-stable: Only check files tracked by git (ie source files) for +xPatrick Georgi
Change-Id: I99cbcba7a086ef950f248888a83cf24a4db4aee9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/21419 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-11-30util/intelmetool: Fix some platformsPatrick Rudolph
Bootguard: * Fix Mac support (ME_version can't be detected) * Skip MSR read on older platforms (as it would fail anyway) * Refactor MSR error handling * Print Bootguard state "Unknown" on MSR read error Change-Id: Iafe3f5c22c6caeedc556933405b9f6d83ec876a1 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/22598 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-11-30crossgcc: fix edk2 tools_def templatePatrick Georgi
Forgot the /bin/ part of the executable paths Change-Id: I87d63ec18338e376787d02bb771471e746a17b62 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/22640 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-11-28util/crossgcc: Install a template for the edk2 build systemPatrick Georgi
Add a CBSDK tool set template that can be used in edk2 simply by appending $prefix/share/edk2config/tools_def.txt to Conf/tools_def.txt. After that, build -t CBSDK uses the coreboot compilers, providing a more predictable compiler choice. Change-Id: I76b38c928b831ee6f31450aa0ad59b4f906f394d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/22570 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-11-25util/intelmetool: Add bootguard information dump supportPhilipp Deppenwiese
With this implementation it's possible to detect the state of bootguard in intel based systems. Currently it's WIP and in a testphase. Handle it with care! Changes done: * Add support for reading msr * Read ME firmware version * Print bootguard state for ME > 9.1 * Make argument -s legacy * Add argument -b for bootguard (and ME) dumping * Add argument -m for ME dumping * Opt out early if CPU is non Intel Change-Id: Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org> Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/16328 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-11-25util/intelmetool: Fix lint errors and warningsPatrick Rudolph
Clean the code to fix all errors and warnings. No functional change. Changes: * Fix lines over 80chars * Fix typos * Restructure code to reduce indent level * Move RCBA handling into own files * Introduce helper functions for RCBA access * Move GPL string into header * Fix whitespace in macros Change-Id: Ib8e3617ebb34c47959d6619dfbc7189045e6b8f7 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/22521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-11-08util/inteltool: Add Skylake definition to MCHBAR readingMaximilian Schander
Taken from * 6th Generation Intel Processor Families for S-Platform Volume 2 of 2 * Page 56 * 332688-003EN Change-Id: I46c8dd77823870b55cc040f7f6c557cb5a2562a1 Signed-off-by: Maximilian Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/22351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-08util/inteltool: Add PCIEXBAR and PXPEPBAR reading for SkylakeMaximilian Schander
Both registers behave the same as on the previous generation Taken from * 6th Generation Intel Processor Families for S-Platform Volume 2 of 2 * Page 55 and 62 * 332688-003EN Change-Id: Id02a38a7ab51003c9d0f16ebb2300a16b66a15f9 Signed-off-by: Maximilian Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/22350 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-08util/inteltool: Add Skylake DMIBAR register dumpingMaximilian Schander
Register definitions were taken from * 6th Generation Intel Processor Families for S-Platform Volume 2 of 2 * Page 117 * 332688-003EN As well as * 6th Generation Intel Processor Families for H-Platform Volume 2 of 2 * Page 117 * 332987-002EN Tested on a 6th gen skylake mobile cpu and capability registers do match up with the default values. Change-Id: I636f6c3d045e297f1439d3e88e43f41e03db4c8e Signed-off-by: Maximilian Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/22345 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-08util/autoport: Fix VGA register warningMaximilian Schander
The warning is printed using Printf syntax but actually Println is used resulting in printing the format string first and the arguments second: "%s. (%s) Default:%s WARNING: [...]" Change-Id: I411fc47832dd7a82752f233c4909b98190340ccb Signed-off-by: Maximilian Schander <coreboot@mimoja.de> Reviewed-on: https://review.coreboot.org/22352 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2017-11-07util/release: Update genrelnotes script for 4.7 releaseMartin Roth
- Fix initial tool check. - Admit that the script is coreboot specfic. Remove coreboot check. - Fix some whitespace issues. - Get rid of pushd/popd. - Add keywords for section logging. - Move code for getting SLOC into a subroutine. - Find submodules to get patch count instead of having them hardcoded. - Update specific change areas for 4.7 release Change-Id: I115659a75604c24780c09605d7643e83e481f6a1 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/22343 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-11-07autoport: Fix nil pointer deref when run without bd82x6xMaximilian Schander
When autoport is run on a system without supported southbridge it won't populate the coresponding data structure. By sanitiy checking after PCI detection autoport can exit cleanly and provide a sufficient error message. Error was: panic: runtime error: invalid memory address or nil pointer dereference [signal SIGSEGV: segmentation violation code=0x1 addr=0x30 pc=0x4be595] goroutine 1 [running]: main.FIXMEEC(0xc42014af80, 0x14, 0xc42014afe0, 0x1a, 0xc4200a914f, 0x4, 0xc4200a916f, 0xf, 0xc420149e60, 0x28, ...) /coreboot/util/autoport/ec_fixme.go:14 +0x105 Change-Id: I6b0fcda76d33b0d3a0379c279f492160ce5add84 Signed-off-by: Maximilian Schander <maxschander@googlemail.com> Reviewed-on: https://review.coreboot.org/22203 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2017-11-05util/docker: add support for crossgcc building paramsPiotr Król
In some cases users may want to build just one toolchain not all. This patch introduces COREBOOT_CROSSGCC_PARAM, which by default is set to all_without_gdb so previous behavior is not changed. Users can pass different parameter eg. COREBOOT_CROSSGCC_PARAM=build-x64 to build just x64 SDK. Change-Id: I858ba09644b5b86a4b0e828e4f342aee5083be93 Signed-off-by: Piotr Król <piotr.krol@3mdeb.com> Reviewed-on: https://review.coreboot.org/22276 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-11-03intelmetool: Print colored capabilitiesMaximilian Schander
In general more ME capabilities are considered harmfull, useless or unwanted. Therefore an easy overview can be obtained by coloring in red and green. Taken from Change with id: Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a Add bootguard information dump support https://review.coreboot.org/#/c/16328/ Change-Id: Ia911cc935d512174399aaf93bba982e071942212 Signed-off-by: Maximilian Schander <maxschander@googlemail.com> Reviewed-on: https://review.coreboot.org/22217 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2017-11-03intelmetool: Do small cosmetic changesMaximilian Schander
Refining some of the code indentations and cosmetics to build upon and import some in-review changes. Change-Id: I0038a146bd899f150518c4832258a42792abaabb Signed-off-by: Maximilian Schander <maxschander@googlemail.com> Reviewed-on: https://review.coreboot.org/22216 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2017-11-03inteltool: Add southbridge and CPU definitions for SkylakeMaximilian Schander
Change-Id: Id9501f11a79cb314bc407760b22006a3375e669d Signed-off-by: Maximilian Schander <maxschander@googlemail.com> Reviewed-on: https://review.coreboot.org/22211 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-11-01autoport: move spi_uvscc and spi_lvscc to devicetree.cbIru Cai
Change-Id: I36866cc793b3ddf9a78fed2e2840958d08327e7d Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/20486 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-10-29util/*: don't strip executablesPatrick Georgi
Users can do it if they need it, but we shouldn't force it on them. Change-Id: I08007d68a79c302d8f3ca4ed0837ee96d8d3eb1e Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/22213 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-10-28cbfstool: Print compression algorithmDaisuke Nojiri
This patch adds a column to the print command to show the compression algorithm used for the file. Name Offset Type Size Comp fallback/romstage 0x0 stage 56236 none ecrw 0xf2380 raw 62162 LZMA (131072 decompressed) BUG=b:66956286 BRANCH=none TEST=Run 'cbfstool image.bin print' Change-Id: I4bbb60ab467adac4ae5486ddafec86ad9682a40e Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://review.coreboot.org/22196 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-10-22util/ifdtool: Fix region limitation checkYouness Alaoui
Using ifdtool to change layout on a 'ifd v2' file causes an error about region type 5 not being valid. The limit to check against is dynamic depending on ifd version, not static. Change-Id: Id4cdce4eac18fb0d171d1bdfa2044340bf93056a Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Reviewed-on: https://review.coreboot.org/21962 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-22intelmetool: Add support for Sunrise Point LPYouness Alaoui
This was tested on Librem 13 v2. Change-Id: I4b56ed8a8a394da2ac5e4bfde6916aa1d39b2654 Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm> Reviewed-on: https://review.coreboot.org/21961 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-20util/genbuild_h: improve robustness against corrupt .git directoriesPatrick Georgi
The new test lets git check if $top is actually a git repo, instead of just looking for clues. BUG=chromium:776174 BRANCH=none TEST=`mv .git .foo; mkdir .git; util/genbuild_h/genbuild_h.sh` provides a valid build.h instead of failing because git is unhappy about the .git directory. Change-Id: I7fcc64d66e0b59fca1479b4c142fd0559aa984f4 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/22107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-20board_status/towiki: Fix link to last report for "clone" boardsJonathan Neuschäfer
I noticed that the "last known good" field for the ThinkPad R400 pointed nowhere. Instead of https://www.coreboot.org/Supported_Motherboards#lenovo.2Ft400 it pointed to https://www.coreboot.org/Supported_Motherboards#lenovo.2Fr400 which does not exist because if a board is marked as a "Clone of" another one in board_info.txt, towiki uses the original board's reports to derive the "last known good" date and color. Change-Id: Ie235ca8e8691f49d041de7c5770eae77cdd444a7 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/21906 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-10-17util/docker: Add bc to coreboot-sdkMartin Roth
bc is one of the standard posix utilities. I'm surprised that it's not in the debian docker image by default. Change-Id: I02f2d5296e7f87876b236af119965d1f4e6a0bc0 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/21889 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-10-16buildgcc: Update binutils to 2.29.1Iru Cai
Also change the tarball from .tar.bz2 to .tar.xz. Change-Id: I25134dbadf07a2f0cb356c8ac8f2c612a957d176 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/20806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-16crossgcc: Build libelf from elfutils 0.170Paul Menzel
> Could you make in a separate, independent change a update from the > completely outdated LIBELF (from mr511.de/software/libelf ) to recent > libelf? Those highly outdated libelf from this unmaintained mr511.de > webpage should not be used any more since years. There are also a ton > of security issues like for example: CVE-2017-7607, CVE-2017-7608, ... > CVE-2017-7613. Recent version of this software is included in the > elfutils that are available here: https://sourceware.org/elfutils/ -> > download link: > https://sourceware.org/elfutils/ftp/0.170/elfutils-0.170.tar.bz2 Remove the obsolete patch, which doesn’t apply anymore, and only affected the build system, which is different now. Increment the buildgcc version string as a tool version is changed. TEST=Running `make crossgcc-i386` succeeds. Change-Id: Iadd320a18c5d9fe2a82a347e39f01d8b7f8806c2 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/21435 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-10-16util/docker: add nasm to fix tianocore payload compilationPiotr Król
This patch address problem with Tianocore compilation in coreboot-sdk container. Without it compilation fails asking for nasm installation. Change-Id: I546f9d42b380799d1cd80a70f33be2a768745080 Signed-off-by: Piotr Król <piotr.krol@3mdeb.com> Reviewed-on: https://review.coreboot.org/21924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-14util: Make TZ environment variable POSIX compatiblePaul Menzel
`TZ='UTC'` is not a portable setting for the TZ environment variable. POSIX says you’re supposed to use something like `TZ='UTC0'` instead. Although `TZ='UTC'` works when GLIBC is used, this is not necessarily true on other POSIX platforms. [1][2] [1] http://lists.alioth.debian.org/pipermail/reproducible-builds/Week-of-Mon-20170918/009289.html [2] http://pubs.opengroup.org/onlinepubs/9699919799/basedefs/V1_chap08.html#tag_08_03 Change-Id: I1dca0b84de0ec0af3a103e2cbbf731512eb59497 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/21721 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-13util/crossgcc: Add bootstrap-only modePatrick Georgi
buildgcc -B (--bootstrap-only) builds only a bootstrap compiler. That useful if you want to package the cross compilers: first build the bootstrap compiler, then all required cross compilers in a separate directory (using the bootstrap compiler through an adjusted PATH). Change-Id: I089b51d1b898d4cf530845ba51283997fd229451 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/21683 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-10-11util/gitconfig: remove cborg2cros.pyPatrick Georgi
util/scripts/gerrit-rebase and cross-repo-cherrypick serve the same purpose and we don't need two of everything. Change-Id: I66a71033a8a29249d214db4c31a67f8a0725163c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/21926 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-10util/cbfstool: Add "truncate" commandPatrick Georgi
It does the opposite to "expand", removing a trailing empty file from CBFS. It also returns the size of the CBFS post processing on stdout. BUG=b:65853903 BRANCH=none TEST=`cbfstool test.bin truncate -r FW_MAIN_A` removes the trailing empty file in FW_MAIN_A. Without a trailing empty file, the region is left alone (tested using COREBOOT which comes with a master header pointer). Change-Id: I0c747090813898539f3428936afa9d8459adee9c Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/21608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-10-08Update URLs in buildgccDoug Gale
Change http to https on many URLs and update llvm.org URLs in buildgcc. The old URLs are deprecated and now switched to a http forwarder that can be attacked by MITM attacks. Change-Id: I68d4fe1a6236ed8540803e11cfc84e44a1d1ca35 Signed-off-by: Doug Gale <doug16k@gmail.com> Reviewed-on: https://review.coreboot.org/21729 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Martin Roth <martinroth@google.com>
2017-10-06autoport: Add GPL boilerplate header to not empty .c filesArthur Heymans
The idea behind this not to enforce a license on autogenerated code but is simply out of convenience in the case one wants to make the result public (in which case it needs to have these license headers). Change-Id: I1d6b48762b1249bb0becb178a30e1396bf6978fc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19510 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-10-06autoport/bd82x6x.go: Improve gpio.c generationArthur Heymans
This generates better gpio.c files where structs are initialised as static to be able to drop some entries since those would be initialised as 0. This makes these files less cluttered since only relevant things are shown: * GPIO direction, level, invert, blink depend on GPIO mode * GPIO level is read only on input * GPIO invert is only valid on input * only show when GPIO are inverted, blinking, reset by RSMRST# Change-Id: I83382d38a4a3b7ed11b8e7077cc5fbe154e261a7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19508 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-10-05util/amdfwtool: Add option for directory locationMartin Roth
The AMD firmware directory can go in a number of different locations. This patch allows amdfwtool to write the directory correctly for those different locations. If the --location switch is not added to the command line, the default location at ROM base address + 0x20000 is used as before. BUG=b:65484600 TEST=Set PSP firmware location, compare amdfw.rom to previously built version. Verify new location pointers. Change-Id: Ief32e5e37d56088946b623d305c6e93bfd6abeaf Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/21865 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-10-04buildgcc: Implement simple tarball hash verificationJonathan Neuschäfer
This patch implements a relatively simple hash-based verification scheme for downloaded files (tarballs): After buildgcc downloads a file or notices that it has already been downloaded, it hashes the file, and compares the hash against the known hash stored in util/crossgcc/sum/$filename.cksum. Two errors can occur: 1. The hash file is missing. In this case, crossgcc asks the user to verify the authenticity of the downloaded file. It also calculates its hash and stores it in util/crossgcc/sum/$filename.cksum.calc. If the file is authentic, the user may rename the calculated hash file to $filename.cksum, so that it can be found the next time buildgcc is started. 2. The known hash and the calculated hash differ. This is the case that this patch seeks to protect against, because it may imply that the downloaded file was unexpectedly changed, either in transit (Man-in-the-Middle attack) or on the file server that it was downloaded from. If buildgcc detects such a hash mismatch, it asks the user to delete the downloaded file and retry, because it can also be caused by a benign network error. If, however, the error persists, buildgcc can't continue without risking that the user runs malicious code, and it stops. Note: The hash algorithm may be changed in the future, but for now I left it at SHA-1, to avoid bloating this patch. Change-Id: I0d5d67b34684d02011a845d00f6f5b6769f43b4f Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/21592 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-10-02util/cbmem: fix feedback for 'be explicit about memory map sizes'Aaron Durbin
Julius made some suggestions to fix/improve commit 46300aa2. Implement those. BUG=b:66681446 Change-Id: I6becac9ffdcc65745e88734dfb80d12b581584a1 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21757 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-09-28util/cbmem: be explicit about memory map sizesAaron Durbin
The cbmem utility has inherited some workarounds that originated from the default 1 MiB mapping always working. This 1 MiB mmap won't necessarily succeed if the 1 MiB encroaches on a subsequent memory range that has different cacheability. To fix this, map in only 4 KiB when the table size is not known which is the case for any forwarding entry or any low table entries on x86. That smaller mapping is then searched for a valid header. Once a valid header is found the full table is mapped and parsed allowing a forwarding entry to take precedence. Lastly, the lbtable is kept mapped in such that other operations can just operate on mapping that was previously parsed. In order to allow multiple in-flight mappings a struct mapping was added which caused the ripple within the code. However, there shouldn't be any more reasons for putting weird heuristics for when to fail. If the tables are bad then it's very much possible that mappings will fail. Retrying when the exact sizes are already known won't fix those issues. BUG=b:66681446 Change-Id: Ica0737aada8dc07311eae867e87ef2fd24eae98d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21718 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-09-28util/cbmem: make data structure accesses constAaron Durbin
Since the mapping is const just make all the data structure accesses const. BUG=b:66681446 Change-Id: I018cf2f2bfea2e736b097ecd1242af19c878ecb5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/21719 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-09-27smbus: Fix a typo ("Set the device I'm talking too")Jonathan Neuschäfer
Change-Id: Ia14bbdfe973cec4b366879cd2ed5602b43754260 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/21653 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2017-09-20util/cbfstool: Add "expand" command to make CBFS span an fmap regionPatrick Georgi
vboot images come with multiple regions carrying CBFS file systems. To expedite hashing (from slow flash memory), the FW_MAIN_* regions are truncated since they typically have pretty large unused space at the end that is of no interest. For test purposes it can be useful to re-engage that space, so add a command that creates a new empty file entry covering that area (except for the last 4 bytes for the master header pointer, as usual). BUG=b:65853903 BRANCH=none TEST=`cbfstool test.bin expand -r FW_MAIN_A` creates a new empty file of the expected size on a Chrome OS firmware image. Change-Id: I160c8529ce4bfcc28685166b6d9035ade4f6f1d1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/21598 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-20util/docker: Update coreboot-sdk dockerfileMartin Roth
- Fix typo in comment - Aphabetize package list and put each package on a single line - Add environment variables into coreboot user's .bashrc file - Add openssl, qemu, and shellcheck to installed packages Change-Id: I37771be5d3ecaa61d76d99e689b422144a6d7dc6 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/21582 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Chris Ching <chingcodes@chromium.org>
2017-09-20util/lint: update checkpatch & spelling.txt to upstream versionsMartin Roth
- Update checkpatch.pl to version 0547fa58 (checkpatch: add 6 missing types to --list-types) - Update spelling.txt to version d9f91f8 (scripts/spelling.txt: add a bunch more spelling mistakes) - Fix an additional unescaped left brace in a regex - causes warnings in new versions of perl. Change-Id: Ic443099e90a46280f18d58799afc72d00dc83793 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/21581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Chris Ching <chingcodes@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-09-20board_status: Tell user where to find output when results are uploadedDavid Hendricks
If results are uploaded the temporary directory in which they are stored gets deleted, yet we currently point to the deleted directory in the output. This patch fixes it so that we point to the actual location in the local repository where uploaded results are found. Change-Id: I1f42c3296ec1d19fcfa4911307e07e67de289895 Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/21415 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-09-17ifdtool: Refactor some codeBill XIE
Add find_fcba(), find_frba(), find_fmba(), find_fpsba() and find_fmsba() to replace those copy-pasted addressings. This commit is one separated from the original I6d05418c. Change-Id: I98965711e4cb9792e5cc86cc4c1035559e0274f5 Signed-off-by: Bill XIE <persmule@gmail.com> Reviewed-on: https://review.coreboot.org/21511 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-09-17ifdtool: redesign some structuresBill XIE
Redesign some array-like structures as true arrays, and rewrite functions to dump them as loops. This commit is one separated from the original I6d05418c. Change-Id: I161c9a2ae83d26e658d67d0804e943fff95fe076 Signed-off-by: Bill XIE <persmule@gmail.com> Reviewed-on: https://review.coreboot.org/21510 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-09-17ifdtool: merge region_filenames with region_name(s)Bill XIE
There is no reason to keep a separate region_filenames array, so I merge it into region_name(s). This commit is one separated from the original I6d05418c. Change-Id: I38489c6d3b3c161e9b0281188e6cdd0b62e38335 Signed-off-by: Bill XIE <persmule@gmail.com> Reviewed-on: https://review.coreboot.org/21509 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-17ifdtool: Const-correct and redesign some functionsBill XIE
Const-correct some functions which do not write back, and use pointers to access existing region_t variables. The last changeset is dismantled this time. This commit is only focused on const-correctness. Change-Id: I6d05418c8b32fa31dcd038a3e56f9aefe13fa9c4 Signed-off-by: Bill XIE <persmule@gmail.com> Reviewed-on: https://review.coreboot.org/21288 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-17board_status: Add option to set cbmem pathDavid Hendricks
This allows the user to specify a custom path for cbmem on the DUT. Change-Id: I2c28737d6efaae238fd6831cd3d00b2142b39a4c Signed-off-by: David Hendricks <david.hendricks@gmail.com> Reviewed-on: https://review.coreboot.org/21565 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-09-15util/scripts/cross-repo-cherrypick: improve cros-side rewritePatrick Georgi
Sometimes the BUG/BRANCH/TEST metadata isn't separated by a newline from the later git/gerrit metadata, which messes up further processing. Add that newline to minimize the amount of human intervention required. Change-Id: I37171bf6764b64e0ab0e81297a03f4d8b7744256 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/21534 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-09-13rmodtool: Increase limit on number of symbolsDamien Zammit
An internal index `i` was previously allocated as Elf64_Half which is uint16_t. Bumping to uint64_t increases the number of allowed symbols and prevents a segfault in processing a larger ramstage.debug file. Also introduce a separate counter for the number of sections. Change-Id: I9ad2f64c452cef2e7bf957f766600891cb5ae798 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/21360 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-09-13util/lint: Exclude external payloads from coreboot lowercase checkMartin Roth
Change-Id: I70bbf37fad67fd9bda5724811f4bbdcc53779a42 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/21321 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2017-09-06util/cbmem: Pretty print STAGEx_META and _CACHEKyösti Mälkki
Also align entries without name with additional indents. Change-Id: Ia6aa303daa11e6aec249232aadf4e346bad659d5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/21383 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-09-06util/testing: Don't keep tegra lp0 build resultsPatrick Georgi
We don't actually care for them on our testers, just that the files can be built. Change-Id: Ib656a085d70e2aeb1601f1943ad8581af3133839 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/21420 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-06util/testing: Also test-build tegra's lp0 resume codePatrick Georgi
The regular build doesn't build it, so it fails every now and then due to changes in its dependencies. Make sure we notice these early. Change-Id: I0603b22887487d8871611d91e6f8ab0ec210bff1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/21390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-09-06intelmetool: Add support for Sunrise Point-HShawn Chang
Tested on P10S-M WS. Change-Id: I62f78fe5ca03bf70497939a12f0036bf247b2aa7 Signed-off-by: Shawn Chang <citypw@gmail.com> Reviewed-on: https://review.coreboot.org/21301 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-09-06abuild: Allow building with any toolchainDamien Zammit
Adds -A --any-toolchain option to abuild This is handy for those who want to test compiling all board configs with abuild using a non-coreboot toolchain Change-Id: Idd599b0d2c324ad88ba3c83cdf3b180eb6d1fc80 Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/21352 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-09-04util/board_status: do a spell checkIdwer Vollering
Change-Id: Ie39be471851586076343b8e9454a9140d4664b8d Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: https://review.coreboot.org/21322 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2017-09-02buildgcc: Fix up cross GCC buildingNico Huber
Add a missing line-break escape and, rather cosmetic, guard execution of $CXX which we allow but don't force to be set. Change-Id: Icf6d3b7de4b7999b8214489f28997964c490d1e9 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/21307 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-09-02clang: Enable integrated assembler on clang buildsDamien Zammit
Change-Id: I883bf7eb2ab52ba3d7a284c96d4aade8bc1ee4ae Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/21221 Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-09-02util/lint/checkpatch: Untaint variables from env & command lineMartin Roth
Jenkins is giving warnings due tainted variables from the environment and command line: Insecure $ENV{PATH} while running setgid at util/lint/checkpatch.pl line 907, <$conststructs> line 39. Insecure dependency in piped open while running setgid at util/lint/checkpatch.pl line 907, <$conststructs> line 39. This should fix those warnings. Change-Id: I6a09915d13547bf9a86c011d44cbcd39c46f3fec Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/21293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-09-01buildgcc: Integrate nds32 update from Andes TechnologyStefan Reinauer
This patch has been provided by Mentor Chih-Chyang Chang on behalf of Andes Technology. It fixes using the coreboot toolchain to compile the Chrome EC code base on the ITE8320 embedded controller. The new patch incorporates a fix for the issue previously fixed by patches/gcc-6.3.0_nds32.patch, so that patch can be removed. patches/gcc-6.3.0_riscv.patch needs to be slightly adjusted to still apply cleanly (configure scripts only). Change-Id: I0033888360f13ba951b692b3242aab6697ca61b3 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/20901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-08-22util/msrtool: Exit program after displaying the help messageMaciej Suminski
In case there is no mode selected, sys and cpu variables are not initialized, causing a segfault on exit (goto done). Change-Id: I4a183c267e306598627c1612f4633f1e19019f3c Signed-off-by: Maciej Suminski <maciej.suminski@cern.ch> Reviewed-on: https://review.coreboot.org/21026 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>