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2018-08-28util/romcc: Fix typosElyes HAOUAS
Change-Id: Ia9f0f1f527476900e6c54c60508600e16bea786f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28293 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2017-09-27smbus: Fix a typo ("Set the device I'm talking too")Jonathan Neuschäfer
Change-Id: Ia14bbdfe973cec4b366879cd2ed5602b43754260 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/21653 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-04-13romcc: Use UNIX line endings in linux testsJonathan Neuschäfer
This makes it easier to check the output against a reference output. Change-Id: I9c7ae538b708399a5cadd18e498618d7480d240f Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14276 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-13romcc: Increase base address in linux ld scriptJonathan Neuschäfer
Newer versions of Linux implement a sysctl variable called vm.mmap_min_addr that controls the minimum address a virtual memory mapping may have[1]. It is usually set to 64KiB. Map the start of the segment specified in util/romcc/tests/ldscript.ld to 128KiB, just to be sure. [1]: https://www.kernel.org/doc/Documentation/sysctl/vm.txt Change-Id: I72a5c65ca5e7d3a77d6ec897ae3287e3ea05cc2f Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14277 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2015-06-08Remove empty lines at end of fileElyes HAOUAS
Used command line to remove empty lines at end of file: find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \; Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/10446 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2010-04-27Since some people disapprove of white space cleanups mixed in regular commitsStefan Reinauer
while others dislike them being extra commits, let's clean them up once and for all for the existing code. If it's ugly, let it only be ugly once :-) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28- Upgrade to romcc version 0.63Eric Biederman
This includes more test cases Lots of small bug fixes A built in C preprocessor Initial support for not inlining everything __attribute__((noinline)) works Better command line options and help Constants arrays can be read at compile time Asm statements that are not volatile will now be removed when their outputs go unused Loads and stores that are not volatile will be removed when their values go unused The number of FIXMES in the code is finally starting to go down. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11- Moved hlt() to it's own header.Eric Biederman
- Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-22- Update romcc to version 0.37Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 - O2, enums, and switch statements work in romccEric Biederman
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-12- Commit more tests for romccEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-04- Moved 2 of the test cases into tests for failureEric Biederman
- Reworked the transformation into ssa form and now I catch all unitialized variable uses. - Several more test cases - Bumped the version to 0.34 - Verified that -O2 the scc_transform now works. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@934 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-01- Massive set of cleanups/fixes for romcc. Lots of corner cases now workEric Biederman
properly. And a few long standing bugs have been rooted out and removed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-28- Update romcc so that it more successfully spills registers to the xmm ↵Eric Biederman
registers - Add several more test cases. - Bump the version number to .32 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-25- Error on function prototypesEric Biederman
- Fix a last couple of structure related bugs git-svn-id: svn://svn.coreboot.org/coreboot/trunk@914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19- Update the romcc version.Eric Biederman
- Add an additional consistency check to romcc and fix the more obvious problems it has uncovered With this update there are no known silent failures in romcc. - Update the memory initialization code to setup all 3 of the memory sizing registers properly - In auto.c test our dynamic maximum amount of ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-18- A new test case for romccEric Biederman
- Minor romcc fixes - In smbus_wail_until_done a romcc glitch with || in romcc where it likes to run out of registers. Use | to be explicit that I don't need the short circuiting behavior. - Remove unused #defines from coherent_ht.c - Update the test in auto.c to 512M - Add definition of log2 to romcc_io.h - Implement SPD memory sizing in raminit.c - Reduce the number of memory devices back 2 to for the SOLO board. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17- Minor mod to reset16.inc to work with newer binutils hopefully this works ↵Eric Biederman
with older ones... - Update apic.h to include the APIC_TASK_PRI register definition - Update mptable.c to have a reasonable board OEM and productid - Additional testfiles for romcc. - Split out auto.c and early failover.c moving their generic bits elsewere - Enable cache of the rom - Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-16- Reduce the algorithmic complexity of parts of the register allocatorEric Biederman
so the worst case runtime of romcc is much more predictable git-svn-id: svn://svn.coreboot.org/coreboot/trunk@879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11- Factoring of auto.cEric Biederman
- Implementation of fallback/normal support for the amd solo board - Minor bugfix in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-10- Update romcc to version 0.27 and add more tests.Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-13- Add a test to make certain romcc is properly allocating registers.Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-09- Implement support for structures, typedefs, and __builtin_rdmsr, ↵Eric Biederman
__builtin_wrmsr in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-08- Update the test cases for romccEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22- Checking latest version of romccEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1