coreboot.git - my copy of coreboot

Age	Commit message (Collapse)	Author
2003-06-20	- Implement goto support	Eric Biederman
	- Register allocator bug fixes. * coalesce_live_ranges now also updates the interference graph of live instructions * resolve_tangle now avoids copies to phi * correct_tangles is now called in a loop so that all tangles get fixed - Bug the version of romcc to 0.30 git-svn-id: svn://svn.coreboot.org/coreboot/trunk@886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-19	- Update the romcc version.	Eric Biederman
	- Add an additional consistency check to romcc and fix the more obvious problems it has uncovered With this update there are no known silent failures in romcc. - Update the memory initialization code to setup all 3 of the memory sizing registers properly - In auto.c test our dynamic maximum amount of ram. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-18	- A new test case for romcc	Eric Biederman
	- Minor romcc fixes - In smbus_wail_until_done a romcc glitch with \|\| in romcc where it likes to run out of registers. Use \| to be explicit that I don't need the short circuiting behavior. - Remove unused #defines from coherent_ht.c - Update the test in auto.c to 512M - Add definition of log2 to romcc_io.h - Implement SPD memory sizing in raminit.c - Reduce the number of memory devices back 2 to for the SOLO board. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-17	- Minor mod to reset16.inc to work with newer binutils hopefully this works ↵	Eric Biederman
	with older ones... - Update apic.h to include the APIC_TASK_PRI register definition - Update mptable.c to have a reasonable board OEM and productid - Additional testfiles for romcc. - Split out auto.c and early failover.c moving their generic bits elsewere - Enable cache of the rom - Fixes to amd8111_lpc.c so that we successfully setup virtual wire mode on the ioapic git-svn-id: svn://svn.coreboot.org/coreboot/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-16	- Reduce the algorithmic complexity of parts of the register allocator	Eric Biederman
	so the worst case runtime of romcc is much more predictable git-svn-id: svn://svn.coreboot.org/coreboot/trunk@879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-11	- Factoring of auto.c	Eric Biederman
	- Implementation of fallback/normal support for the amd solo board - Minor bugfix in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-06-10	- Update romcc to version 0.27 and add more tests.	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-13	- Add a test to make certain romcc is properly allocating registers.	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-05-09	- Implement support for structures, typedefs, and __builtin_rdmsr, ↵	Eric Biederman
	__builtin_wrmsr in romcc git-svn-id: svn://svn.coreboot.org/coreboot/trunk@819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-04-22	- Checking latest version of romcc	Eric Biederman
	git-svn-id: svn://svn.coreboot.org/coreboot/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1