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2015-04-17ARM: Remove -mno-unaligned-accessJulius Werner
We've decided that it is generally okay for coreboot to expect unaligned accesses to work. Trying to find all instances of unaligned access opportunities and working around them in software would be an unsustainable whack-a-mole contest. Instead, architectures and boards need to make sure they conform to this, which on ARM and ARM64 requires setting up paging early in the bootblock. Other architectures (x86, ARM64, MIPS) already generate code in this manner. ARM still had an -mno-unaligned-access flag hanging around that has been copied so many times its initial origin was lost in time (probably U-Boot). Let's remove it for consistency between architectures and to improve code generation. BRANCH=veyron BUG=None TEST=Booted Jerry and Blaze. Looked at the disassembly for timestamp_sync() and confirmed that it only gives you half as much eye cancer as before (GCC still somehow insists on byte accesses when zeroing fields which is very odd, but at least that terrible AND/OR mess is gone). Measured a boot time increase of about 11ms on Jerry (mostly faster timestamp and CBFS accesses). Could not test Storm because despite our claimed abundance of test devices, every time I get one of them it magically disappears again in less than a week. Change-Id: I8fc08cc7ce4471651a51ee795269909ef69277c8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 07591fadb89bd127fe065abf0b9ba3facecf1aeb Original-Change-Id: I1d046e05bb11822b86e467eafb6aa92e8fbce774 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/241732 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9728 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
2015-03-29mips: mips, not mipselPatrick Georgi
Change-Id: I49df089d3fd5f578702dcc32be08bf6245277a45 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/9149 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2015-03-27toolchain: fix build with x86_64 gccGerd Hoffmann
Commit f69a99db (coreboot: x86: enable gc-sections) overrides CFLAGS_x86_32, which looses (among other things) -m32, which in turn breaks the build with the standard distro gcc on a x86_64 machine. Fix it by appending the new flags instead. Change-Id: Ic3409a1aaa5b26139847258a7eb5c3468efdc6a3 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-on: http://review.coreboot.org/9053 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-26build system: Test gccs that are actually usedPatrick Georgi
Test that the compilers used for the target are built by our buildgcc utility. Users can override this test with the ANY_TOOLCHAIN Kconfig variable. Change-Id: I24adf2c9b83667fd34ce8eb103327c9376765f6d Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: http://review.coreboot.org/9055 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-23console: Allow bootblock console on MIPSPaul Burton
In addition to ARM based systems, allow MIPS based systems to select bootblock console support. BUG=chrome-os-partner:31438 TEST=none yet Change-Id: I40e5d8b651102709118878a317f7e983a617f433 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1a41853273ef9ae716d5645379fcef79c5771b87 Original-Change-Id: I41f03ea8c8104ba2dd9f532b084696385d29636c Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com> Original-Reviewed-on: https://chromium-review.googlesource.com/207973 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: http://review.coreboot.org/8769 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-21arch/mips: Add base MIPS architecture supportPaul Burton
Add the build infrastructure and basic architectural support required to build for targets using the MIPS architecture. This is sufficient to run on a simulator, but will require the addition of some cache maintenance and timer setup in order to run on real hardware. BUG=chrome-os-partner:31438, chromium:409082 TEST=none yet Change-Id: I027902d8408e419b626d0aab7768bc564bd49047 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fcc0d934d7223922c878b1f87021cb5c2d7e6f21 Original-Change-Id: If4f99554463bd3760fc142477440326fd16c67cc Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com> Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/207972 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8760 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-17coreboot: x86: enable gc-sectionsAaron Durbin
Garbage collected sections allow for trimming the size of the binaries as well as allowing for not needing to config off unused functions. To that end, on a rambi build the following differences are observed: $ diff -up \ <(readelf -l coreboot-builds/google_rambi/cbfs/fallback/ramstage.elf) \ <(readelf -l coreboot-builds/google_rambi_gc_sections/cbfs/fallback/ramstage.elf) --- /dev/fd/63 2015-03-10 12:07:27.927985430 -0500 +++ /dev/fd/62 2015-03-10 12:07:27.927985430 -0500 @@ -6,9 +6,9 @@ There are 4 program headers, starting at Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x00000000 0x00000000 0x00040 0x00040 RWE 0 - LOAD 0x001040 0x00000040 0x00000040 0x34560 0x34560 RWE 0 - LOAD 0x0355a0 0x000345a0 0x000345a0 0x02578 0x02578 RWE 0 - LOAD 0x037b18 0x00036b18 0x00036b18 0x00000 0x0b560 0 + LOAD 0x001040 0x00000040 0x00000040 0x2cbf8 0x2cbf8 RWE 0 + LOAD 0x02dc38 0x0002cc38 0x0002cc38 0x02208 0x02208 RWE 0 + LOAD 0x02fe40 0x0002ee40 0x0002ee40 0x00000 0x0a888 0 Section to Segment mapping: Segment Sections... $ diff -up \ <(readelf -l coreboot-builds/google_rambi/cbfs/fallback/romstage.elf) \ <(readelf -l coreboot-builds/google_rambi_gc_sections/cbfs/fallback/romstage.elf) --- /dev/fd/63 2015-03-10 12:08:16.855985880 -0500 +++ /dev/fd/62 2015-03-10 12:08:16.851985880 -0500 @@ -5,8 +5,8 @@ There are 1 program headers, starting at Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align - LOAD 0x000060 0xfff20000 0xfff20000 0x08b81 0x08b81 R E 0x10 + LOAD 0x000060 0xfff20000 0xfff20000 0x06300 0x06300 R E 0x10 Section to Segment mapping: Segment Sections... - 00 .rom .text + 00 .rom The following warnings needed to be applied to CFLAGS_common because for some reason gcc was miraculously emitting the warnings with the unrelated *-sections options: -Wno-unused-but-set-variable Change-Id: I210784fdfc273ce4cb9927352cbd5a51be3c6929 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8635 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-02-24build: mipsel cross compiler supportPaul Burton
This patch introduces support for building a MIPS cross compiler targetting little endian machines by default. Original-Change-Id: I116f6f431cdf80f5f5f58d2743357a9f70a7347d Original-Signed-off-by: Paul Burton <paul.burton@imgtec.com> Original-Reviewed-on: https://chromium-review.googlesource.com/207970 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit d6c9603c41b3d11400cee7b5b409203af0632aa2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I543cd2276d2f63ed2036a1c1259c9a07cb8a4ba8 Reviewed-on: http://review.coreboot.org/8518 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-01-27vboot2: add verstageStefan Reinauer
This reverts the revert commit 5780d6f3876723b94fbe3653c9d87dad6330862e and fixes the build issue that cuased it to be reverted. Verstage will host vboot2 for firmware verification. It's a stage in the sense that it has its own set of toolchains, compiler flags, and includes. This allows us to easily add object files as needed. But it's directly linked to bootblock. This allows us to avoid code duplication for stage loading and jumping (e.g. cbfs driver) for the boards where bootblock has to run in a different architecture (e.g. Tegra124). To avoid name space conflict, verstage symbols are prefixed with verstage_. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac Original-Reviewed-on: https://chromium-review.googlesource.com/204376 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I2a83b87c29d98d97ae316091cf3ed7b024e21daf Reviewed-on: http://review.coreboot.org/8224 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-26toolchain.inc: Check toolchain is installed before running itMarc Jones
Toolchain.inc fails with strange shell errors if the CC_$(stage) doesn't expands correctly. The cause is that the ARCH_SUPPORTED doesn't have the required toolchain for the stage. Change-Id: Id284ce281546b2b1b166f2b13d087bc6b114440e Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/8257 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-01-14Revert "vboot2: add verstage"Paul Menzel
This reverts commit 320647abdad1ea6cdceb834933507677020ea388, because it introduced the following regression. $ LANG=C make V=1 Warning: no suitable GCC for arm. Warning: no suitable GCC for aarch64. Warning: no suitable GCC for riscv. /bin/sh: --: invalid option Usage: /bin/sh [GNU long option] [option] ... /bin/sh [GNU long option] [option] script-file ... GNU long options: --debug --debugger --dump-po-strings --dump-strings --help --init-file --login --noediting --noprofile --norc --posix --rcfile --restricted --verbose --version Shell options: -ilrsD or -c command or -O shopt_option (invocation only) -abefhkmnptuvxBCHP or -o option make: -print-libgcc-file-name: Command not found It also introduced trailing whitespace. Change-Id: I50ec00a38e24c854fa926357cd24f9286bf4f66f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/8223 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-13vboot2: add verstageDaisuke Nojiri
Verstage will host vboot2 for firmware verification. It's a stage in the sense that it has its own set of toolchains, compiler flags, and includes. This allows us to easily add object files as needed. But it's directly linked to bootblock. This allows us to avoid code duplication for stage loading and jumping (e.g. cbfs driver) for the boards where bootblock has to run in a different architecture (e.g. Tegra124). To avoid name space conflict, verstage symbols are prefixed with verstage_. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac Original-Reviewed-on: https://chromium-review.googlesource.com/204376 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I42b2b3854a24ef6cda2316eb741ca379f41516e0 Reviewed-on: http://review.coreboot.org/8159 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-01-09Set custom AR_ for each classDaisuke Nojiri
TEST=Booted Nyan Blaze BUG=none BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I7e822e16117240f732ac55bb2c3816486a3e10cc Original-Reviewed-on: https://chromium-review.googlesource.com/204870 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 967455d6fed014f82198de4987ec103bb7c33d25) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I88025887fb0134f1e75028e0a4ed0c78af281c96 Reviewed-on: http://review.coreboot.org/8143 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-01Add UCB RISCV support for architecture, soc, and emulation mainboard..Ronald G. Minnich
Works in the RISCV version of QEMU. Note that the lzmadecode is so unclean that it needs a lot of work. A cleanup is in progress. We decided in Prague to do this as one thing, because it forms a nice case study of the bare minimum you need to add to get a new architecture going in qemu. Change-Id: If5af15c3a70733d219973e0d032746f8ab027e4d Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/7584 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2014-11-25build system: unify linker use across gcc and clangPatrick Georgi
Let's just call ld directly for gcc, too. Change-Id: I305eb92ed0d21b098134a7eb5a9f9fe3b126aeea Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7553 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-25build system: use a single variable name for compiler runtimesPatrick Georgi
We build with either gcc or clang, no need to keep both around Change-Id: I9af2cc7636bdc791a68ba8ed6e7c5a81973c5dfd Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/7552 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-09build: Add ccopts back into the buildMarc Jones
The ccopts mechanism is needed for passing ARM assembler flags to GCC. There are many gotchas in adding ASFLAGS. As things have moved around, the revert doesn't remove cleanly, so this reverts and cleans up the ccopts. This reverts commit 25b56c3af514faa8a730d56fe14cae4960ac83aa. Change-Id: I44c025535258e6afb05a814123c10c24775a88e8 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/7352 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-10-29Pipe stderr to /dev/null when getting LIBCLANG_RT_FILE_NAMEMartin Roth
Fix a warning when using gcc: i386-elf-gcc: error: unrecognized command line option '-print-librt-file-name' Change-Id: I421933ede9ddbddad37544a62e428c79e9ee2c8d Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7249 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-10-28build: Allow clang build linkage to use libcompiler-rtEdward O'Callaghan
Make use of '-print-librt-file-name' over '-print-libgcc-file-name' to use Compiler-RT runtime glue over libgcc glue. NOTE: *** Requires at least clang 3.6.x Change-Id: I7f63284473d6067bf775409970c8dd98f5d5a8d5 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6144 Reviewed-by: Marc Jones <marc.jones@se-eng.com> Tested-by: build bot (Jenkins)
2014-09-23coreboot arm64: Add support for arm64 into coreboot frameworkFurquan Shaikh
Add support for enabling different coreboot stages (bootblock, romstage and ramstage) to have arm64 architecture. Most of the files have been copied over from arm/ or arm64-generic work. Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://chromium-review.googlesource.com/197397 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 033ba96516805502673ac7404bc97e6ce4e2a934) This patch is essentially a squash of aarch64 changes made by these patches: d955885 coreboot: Rename coreboot_ram stage to ramstage a492761 cbmem console: Locate the preram console with a symbol instead of a sect 96e7f0e aarch64: Enable early icache and migrate SCTLR from EL3 3f854dc aarch64: Pass coreboot table in jmp_to_elf_entry ab3ecaf aarch64/foundation-armv8: Set up RAM area and enter ramstage 25fd2e9 aarch64: Remove CAR definitions from early_variables.h 65bf77d aarch64/foundation-armv8: Enable DYNAMIC_CBMEM 9484873 aarch64: Change default exception level to EL2 7a152c3 aarch64: Fix formatting of exception registers dump 6946464 aarch64: Implement basic exception handling c732a9d aarch64/foundation-armv8: Basic bootblock implementation 3bc412c aarch64: Comment out some parts of code to allow build ab5be71 Add initial aarch64 support The ramstage support is the only portion that has been tested on actual hardware. Bootblock and romstage support may require modifications to run on hardware. Change-Id: Icd59bec55c963a471a50e30972a8092e4c9d2fb2 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6915 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2014-09-22arm: Have the linker garbage-collect unused functions and variablesJulius Werner
This patch activates -ffunction-sections and -fdata-sections for the compiler and --gc-sections for the linker. This will strip out all unused functions and static/global variables from the final binaries and reduce the amount of data we need to read over SPI. A quick test with ToT images shows a 2.5k (13%) / 10k (29%) / 12k (28%) reduction on Nyan and 3k (38%) / 23k (50%) / 13k (29%) on Pit, respectively for bootblock / romstage / ramstage. Change-Id: I052411d4ad190d0395921ac4d4677341fb91568a Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/177111 (cherry picked from commit 5635b138778dea67a5f179e13003132be07f7e59) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6904 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-09-08ARM: Generalize armv7 as arm.Gabe Black
There are ARM systems which are essentially heterogeneous multicores where some cores implement a different ARM architecture version than other cores. A specific example is the tegra124 which boots on an ARMv4 coprocessor while most code, including most of the firmware, runs on the main ARMv7 core. To support SOCs like this, the plan is to generalize the ARM architecture so that all versions are available, and an SOC/CPU can then select what architecture variant should be used for each component of the firmware; bootblock, romstage, and ramstage. Old-Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/171338 Reviewed-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 8423a41529da0ff67fb9873be1e2beb30b09ae2d) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> ARM: Split out ARMv7 code and make it possible to have other arch versions. We don't always want to use ARMv7 code when building for ARM, so we should separate out the ARMv7 code so it can be excluded, and also make it possible to include code for some other version of the architecture instead, all per build component for cases where we need more than one architecture version at a time. The tegra124 bootblock will ultimately need to be ARMv4, but until we have some ARMv4 code to switch over to we can leave it set to ARMv7. Old-Change-Id: Ia982c91057fac9c252397b7c866224f103761cc7 Reviewed-on: https://chromium-review.googlesource.com/171400 Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 799514e6060aa97acdcf081b5c48f965be134483) Squashed two related patches for splitting ARM support into general ARM support and ARMv7 specific pieces. Change-Id: Ic6511507953a2223c87c55f90252c4a4e1dd6010 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6782 Tested-by: build bot (Jenkins)
2014-08-11coreboot classes: Add dynamic classes to corebootFurquan Shaikh
Provide functionality to create dynamic classes based on program name and architecture for which the program needs to be compiled/linked. define_class takes program_name and arch as its arguments and adds the program_name to classes-y to create dynamic class. Also, compiler toolset is created for the specified arch. All the files for this program can then be added to program_name-y += .. Ensure that define_class is called before any files are added to the class. Check subdirs-y for order of directory inclusion. One such example of dynamic class is rmodules. Multiple rmodules can be used which need to be compiled for different architectures. With dynamic classes, this is possible. Change-Id: Ie143ed6f79ced5f58c200394cff89b006bc9b342 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/6426 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-30build system: remove duplicate architecture listPatrick Georgi
Let xcompile pass the list of architectures, given that it already has it. Change-Id: I565512d3bef987c9a4e48a39bfd88bacf0b65de9 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/6254 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-06-29build: remove -ccopts mechanismPatrick Georgi
We now use the slightly more familiar CFLAGS_* and CPPFLAGS_* for the same purpose. Change-Id: Ifd2bd13f67f71fa0a15611a6d11a6a4c7994271b Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5875 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-05-19build: use CFLAGS_* in more places where they're neededPatrick Georgi
After moving out -m32 from CC_*, 64bit compilers need CFLAGS_* in more places to handle everything in 32bit as appropriate. Change-Id: I692a46836fc0ba29a3a9eb47b123e3712691b45d Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5789 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: re-enable ccache supportPatrick Georgi
The ccache support was mostly disabled because it didn't hook onto most compilers anymore. Caveat: ccache and scan-build don't work together since scan-build doesn't like arguments in its compiler command line (eg. "ccache gcc"). Change-Id: I7c1c6e22cb662f2b08e774ea484ac1c412fdd2db Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5775 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: make scan-build work againPatrick Georgi
This drops the scan-build related Kconfig options since it's now possible to simply run scan-build [-o outdir] make and get coreboot built with its report. There's also no inner make process anymore, and the way things work should be clearer now. Also adapt abuild to this new reality. Change-Id: I03e03334761ec83f718b3235ebf811834cd2e3e3 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5774 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: remove call to missing functionPatrick Georgi
set_stage_libgcc never existed in our tree. Change-Id: I864fc683dd7b89a030daf05eafb9624ce828cb72 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5770 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: break compiler flags out of $(CC)Patrick Georgi
Having more than the executable in $(CC) only leads to trouble in a number of situations. Change-Id: I7642ca4068b3a3bd5798219d74de9e0eb85bb4e5 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5769 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: don't call $(CC) -print-libgcc-file-name twicePatrick Georgi
Change-Id: Iaeeb8fc58e06c98273520e79999737da9ff3f872 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5768 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: kill one indirectionPatrick Georgi
No need to first define X86_32 and then replace every single use of it with its lower cased equivalent. Just start out with the lower case versions in the first place. Change-Id: I1e771ef443db1b8d34018d19a64a9ee489cd8133 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5767 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: get rid of a special casePatrick Georgi
Don't call things in xcompile i386 and in the buildsystem x86_32 and then bridge things so they match. just call it the same everywhere. Change-Id: Ieef5f03f7aafb0b0a606fbe5a2386e310d2b0e94 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5766 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: separate CPPFLAGS from CFLAGSPatrick Georgi
There are a couple of places where CPPFLAGS are pasted into CFLAGS, eliminate them. Change-Id: Ic7f568cf87a7d9c5c52e2942032a867161036bd7 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5765 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-17build: CPPFLAGS is more common than INCLUDESPatrick Georgi
Rename INCLUDES to CPPFLAGS since the latter is more commonly used for preprocessor options. Change-Id: I522bb01c44856d0eccf221fa43d2d644bdf01d69 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/5764 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-05-09toolchain: get rid of some bashismsAaron Durbin
On Ubuntu /bin/sh is symlinked to /bin/dash. The current toolchain.inc was doing some things that dash doesn't support. Make the shell callouts more conforming to the POSIX sh standard. Change-Id: I26b6b82b8d6158c9029e8be9e7c088ca9e207f21 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/5701 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-05-06Introduce stage-specific architecture for corebootFurquan Shaikh
Make all three coreboot stages (bootblock, romstage and ramstage) aware of the architecture specific to that stage i.e. we will have CONFIG_ARCH variables for each of the three stages. This allows us to have an SOC with any combination of architectures and thus every stage can be made to run on a completely different architecture independent of others. Thus, bootblock can have an x86 arch whereas romstage and ramstage can have arm32 and arm64 arch respectively. These stage specific CONFIG_ARCH_ variables enable us to select the proper set of toolchain and compiler flags for every stage. These options can be considered as either arch or modes eg: x86 running in different modes or ARM having different arch types (v4, v7, v8). We have got rid of the original CONFIG_ARCH option completely as every stage can have any architecture of its own. Thus, almost all the components of coreboot are identified as being part of one of the three stages (bootblock, romstage or ramstage). The components which cannot be classified as such e.g. smm, rmodules can have their own compiler toolset which is for now set to *_i386. Hence, all special classes are treated in a similar way and the compiler toolset is defined using create_class_compiler defined in Makefile. In order to meet these requirements, changes have been made to CC, LD, OBJCOPY and family to add CC_bootblock, CC_romstage, CC_ramstage and similarly others. Additionally, CC_x86_32 and CC_armv7 handle all the special classes. All the toolsets are defined using create_class_compiler. Few additional macros have been introduced to identify the class to be used at various points, e.g.: CC_$(class) derives the $(class) part from the name of the stage being compiled. We have also got rid of COREBOOT_COMPILER, COREBOOT_ASSEMBLER and COREBOOT_LINKER as they do not make any sense for coreboot as a whole. All these attributes are associated with each of the stages. Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: http://review.coreboot.org/5577 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
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