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Change-Id: I2cc38926b56315d4a828311917ff58051b34b777
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82214
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Move specific enum ddr4_module_type to <device/dram/ddr4.h>.
Change-Id: Ia538d2c73affa6560fa1533a40c02b3677588f5a
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Move specific enum ddr5_module_type to <device/dram/ddr5.h>.
Change-Id: Ie38d1e99fa46c278e60ced2d3eef29ca823d4b1d
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82123
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
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<string.h> is supposed to provide <stdarg.h> and <stdio.h>
Change-Id: I021ba535ba5ec683021c4dfc41ac18d9cebbcfd2
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81853
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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<device/device.h> is supposed to provide <device/{path,resource}.h>
Change-Id: I2ef82c8fe30b1c1399a9f85c1734ce8ba16a1f88
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81830
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
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It is needed in order to move device_tree.c into commonlib in a
subsequent commit.
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I16eb7b743fb1d36301f0eda563a62364e7a9cfec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77968
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The cmocka problem of sanitizing XML strings has been fixed in CB:80382.
Therefore the helper macros UX_LOCALES_GET_TEXT_FOUND_TEST() and
UX_LOCALES_GET_TEXT_NOT_FOUND_TEST() can be merged into one.
TEST=make unit-tests JUNIT_OUTPUT=y -j
Change-Id: Ic3199e2a061550282fb08122943994c835845543
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80621
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Hsuan-ting Chen <roccochen@google.com>
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This patch moves the IP checksum algorithm into commonlib to prepare for
it being shared with libpayload. The current implementation is ancient
and pretty hard to read (and does some unnecessary questionable things
like the type-punning stuff which leads to suboptimal code generation),
so this reimplements it from scratch (that also helps with the
licensing).
This algorithm is prepared to take in a pre-calculated "wide" checksum
in a machine-register-sized data type which is then narrowed down to 16
bits (see RFC 1071 for why that's valid). This isn't used yet (and the
code will get optimized out), but will be used later in this patch
series for architecture-specific optimization.
Change-Id: Ic04c714c00439a17fc04a8a6e730cc2aa19b8e68
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80251
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <czapiga@google.com>
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It's what this function family is defined to do, we currently don't
usually run into the case (see: not too many die() instances going
around), it's more useful to try to recover, and the JPEG parser can run
into it if the work buffer size exceeds the remaining heap, whereas its
sole user (the bootsplash code) knows what to do when seeing a NULL.
Use xmalloc() if you want an allocation that either works or dies.
tl;dr: That code path isn't usually taken. Right now it crashes. With
this patch it _might_ survive. There is a use-case for doing it like
that now.
Change-Id: I262fbad7daae0ca3aab583fda00665a2592deaa8
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80226
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Eric Lai <ericllai@google.com>
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The .inc suffix is confusing to various tools as it's not specific to
Makefiles. This means that editors don't recognize the files, and don't
open them with highlighting and any other specific editor functionality.
This issue is also seen in the release notes generation script where
Makefiles get renamed before running cloc.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Id09eafd293a54198aab87281f529749325df8b07
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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The ux_locales-test relies on the ability to determine supported
locales for the platform. However, this information is unavailable
without VBOOT config being enabled. Therefore, enforce this test for
platforms with VBOOT config alone to avoid unnecessary failures.
Change-Id: I2828eb062e2b601e073e7dab9aef7316fc6ba2cd
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79056
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hsuan-ting Chen <roccochen@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Having a separate romstage is only desirable:
- with advanced setups like vboot or normal/fallback
- boot medium is slow at startup (some ARM SOCs)
- bootblock is limited in size (Intel APL 32K)
When this is not the case there is no need for the extra complexity
that romstage brings. Including the romstage sources inside the
bootblock substantially reduces the total code footprint. Often the
resulting code is 10-20k smaller.
This is controlled via a Kconfig option.
TESTED: works on qemu x86, arm and aarch64 with and without VBOOT.
Change-Id: Id68390edc1ba228b121cca89b80c64a92553e284
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55068
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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Add unit tests for ux_locales_get_text() in lib/ux_locales.c.
BUG=b:264666392, b:289995591
BRANCH=brya
TEST=make tests/lib/ux_locales-test
TEST=Make sure ux_locales.c has 100% test coverage
Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Change-Id: I4d73419c02478870942828d324c258ef0eaa983c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76253
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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Found-by: linter
Change-Id: I7c6d0887a45fdb4b6de294770a7fdd5545a9479b
Signed-off-by: Alexander Goncharov <chat@joursoir.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72795
Reviewed-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Move specific enum ddr3_module_type to <device/dram/ddr3.h>.
Change-Id: I8fd7892dda26158a5bdd6cd4972c7859a252153e
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71547
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Move specific enum ddr2_module_type to <device/dram/ddr2.h>.
Change-Id: I748658f9b349bff9b1ebe2c0a6acf71bf2a221ce
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71546
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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There seem to be some recurring vague concerns about the alignment of
coreboot table entries. While the existing implementation has been
producing tables with a well-defined alignment (4 bytes) for a long
time, the code doesn't always make it very clear. This patch adds an
explicit constant to codify that alignment, assertions to check it after
each entry, and adds explicit padding to the few entry structures that
were relying on compiler padding to return a correct sizeof() value.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Iaeef29ef255047a855066469e03b5481812e5975
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70158
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
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Get rid of a lot of casts.
Change-Id: I93645ef5dd270905ce421e68e342aff4c331eae6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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Instead of having callbacks into serial console code to set up the
coreboot table have the coreboot table code call IP specific code to get
serial information. This makes it easier to reuse the information as the
return value can be used in a different context (e.g. when filling in a
FDT).
This also removes boilerplate code to set up lb_console entries by
setting entry based on the type in struct lb_uart.
Change-Id: I6c08a88fb5fc035eb28d0becf19471c709c8043d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68768
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
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Add non-existent DIMMs test case in spd_cache-test.
BUG=b:213964936
TEST=make unit-tests PASSED
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I3c8aa92ee0cfd5908399f4bbd305f8f306571d40
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63643
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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Only edk2 used this to fill in a different struct but even there the
entries go unused, so removing this struct element from coreboot has
no side effects.
Change-Id: Iadd2678c4e01d30471eac43017392d256adda341
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Bill XIE <persmule@hardenedlinux.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
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Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: Ie0d4788c0a4ffee2f16bcf05e3454dbaeaa1606b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67518
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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Add option to resource allocator v4 that restores the top-down
allocation approach at the domain level.
This makes it easier to handle 64-bit resources natively. With
the top-down approach, resources that can be placed either above
or below 4G would be placed above, to save precious space below
the 4G boundary.
Change-Id: Iaf463d3e6b37d52e46761d8e210034fded58a8a4
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41957
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
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CL:3825558 changes all vb2_digest and vb2_hash functions to take a new
hwcrypto_allowed argument, to potentially let them try to call the
vb2ex_hwcrypto API for hash calculation. This change will open hardware
crypto acceleration up to all hash calculations in coreboot (most
notably CBFS verification). As part of this change, the
vb2_digest_buffer() function has been removed, so replace existing
instances in coreboot with the newer vb2_hash_calculate() API.
Due to the circular dependency of these changes with vboot, this patch
also needs to update the vboot submodule:
Updating from commit id 18cb85b5:
2load_kernel.c: Expose load kernel as vb2_api
to commit id b827ddb9:
tests: Ensure auxfw sync runs after EC sync
This brings in 15 new commits.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I287d8dac3c49ad7ea3e18a015874ce8d610ec67e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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If an inserted region's base wasn't aligned, the resulting range should
still cover the original end (original region's base + size) and not the
aligned-down base + size.
Change-Id: I8f1c9456d6dbab4fa868de5c93fa3656397e54c1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66607
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Currently, memranges_steal() steals at the lowest possible address.
This is actually reflected by the test code that checks if the *base*
of the READONLY_TAG range changes. Furthermore, the test ends with the
memranges restored, so revise the comment on the final state.
Change-Id: Idef71ce464280c6805145f229de9e8913ba850bc
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66606
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Jan Dabros <jsd@semihalf.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Unassigned tag is defined to emulate an unmapped PCI BAR resource.
This resource is not mapped into host physical address and hence
should not be picked up by memranges_add_resources().
Change-Id: If7a5c437d486b80d798496b985efd80526f13c63
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Dabros <jsd@semihalf.com>
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IORESOURCE_ASSIGNED is used to indicate the resource is actually mapped
host physical address space. E.g. PCI BAR resources not mapped are
not regarded as assigned.
In src/include/device/device.h, standard macros, e.g. ram_resource,
mmio_resource, io_resource, et al, are all following the usage above.
This patch updates the bootmem-test and memrange-test to follow the
usage as well.
Change-Id: Ifc19302482038267cef01321a46a72d90ca76d35
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66450
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Jan Dabros <jsd@semihalf.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Treat dimm addr_map 0 non-existent. addr_map default is 0, we don't set
it if Hw is not present. Also change the test case default to avoid 0.
SODIMM SMbus address 0x50 to 0x53 is commonly used.
BUG=b:213964936
BRANCH=firmware-brya-14505.B
TEST=emerge-brya coreboot chromeos-bootimage
The MRC training does not be performed again after rebooting.
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: I2ada0109eb0805174cb85d4ce373e2a3ab7dbcac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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CMocka stable-1.1 has some convenience bugfixes like vprint buffer
increase or leftover values log fix (funtion names display correctly
now.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I20ebd15324a21c17cccd2976ae9c3f86b040426d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63636
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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Replace 'struct lb_uint64' with 'typedef __aligned(4) uint64_t
lb_uint64_t', and remove unpack_lb64/pack_lb64 functions since it's no
longer needed.
Also replace 'struct cbuint64' with 'cb_uint64_t' and remove
'cb_unpack64' in libpayload for compatible with lb_uint64_t.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: If6b037e4403a8000625f4a5fb8d20311fe76200a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Change-Id: I9321391cc06afddff94fbba79f93851b553c74b1
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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The ACPI RSDP can only be found in:
- legacy BIOS region
- via UEFI service
On some systems like ARM that legacy BIOS region is not an option, so
to avoid needing UEFI it makes sense to expose the RSDP via a coreboot
table entry.
This also adds the respective unit test.
Change-Id: I591312a2c48f0cbbb03b2787e4b365e9c932afff
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62573
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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cb_err_t was meant to be used in place of `enum cb_err` in all
situations, but the choice to use a typedef here seems to be
controversial. We should not be arbitrarily using two different
identifiers for the same thing across the codebase, so since there are
no use cases for serializing enum cb_err at the moment (which would be
the primary reason to typedef a fixed-width integer instead), remove
cb_err_t again for now.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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This patch aims to make timestamps more consistent in naming,
to follow one pattern. Until now there were many naming patterns:
- TS_START_*/TS_END_*
- TS_BEFORE_*/TS_AFTER_*
- TS_*_START/TS_*_END
This change also aims to indicate, that these timestamps can be used
to create time-ranges, e.g. from TS_BOOTBLOCK_START to TS_BOOTBLOCK_END.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I533e32392224d9b67c37e6a67987b09bf1cf51c6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62019
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
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This patch applies clang-format settings to most of tests files. Some
files were fixed "by-hand" to exclude some lines, which whould be less
readable after automatic style fixing.
Moreover, some comments (mostly in tests/lib/edid-test.c) were adjusted
to match coreboot coding style guidelines.
Change-Id: I69f25a7b6d8265800c731754e2fbb2255f482134
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Move header to path with all other test headers to make include paths
unambigous.
Change-Id: Ie2dbb055df658272424df95f58d84caaeba3fc8f
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Change-Id: I5b10eef3dd82068f97d4d875f3da813a5aca07a7
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reported-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60112
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Implement __fls() as an alias for log2(), and remove the duplicate
definitions in commonlib/storage/sdhci.c.
Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: Ib458abfec7e03b2979569a8440a6e69b0285ac32
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59738
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
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Current log2_ceil(x) is defined as log2(x * 2 - 1). When x is larger
than (1 << 31), (x * 2 - 1) won't fit in u32, leading to incorrect
result. Therefore, correct it as (log2(x - 1) + 1). Also add unit tests
for inline functions in lib.h.
BUG=none
TEST=make tests/lib/lib-test
BRANCH=none
Change-Id: If868f793b909a6ad7fc48a7affac15e2c714fa2e
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59834
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
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This patch removes all remaining pieces of the old CBFS API, now that
the last straggling use cases of it have been ported to the new one
(meaning cbfs_map()/cbfs_load()/etc... see CB:39304 and CB:38421).
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I1cec0ca2d9d311626a087318d1d78163243bfc3c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59682
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
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Libpayload requires cbmem_id.h file to support extracting values from
CBMEM IMD entries of coreboot tables. Libpayload use BSD-3-Clause
license, and all of its files used to compile a static library have to
use it too.
Change-Id: I97c080e34ebdbcdf14fe3a3c9515b1dea8ede179
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59696
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
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List of changes:
1. Create Module Type macros as per Memory Type
(i.e. DDR2/DDR3/DDR4/DDR5/LPDDR4/LPDDR5) and fix compilation
issue due to renaming of existing macros due to scoping the Memory
Type.
2. Use dedicated Memory Type and Module type for `Form Factor`
and `TypeDetail` conversion using `get_spd_info()` function.
3. Create a new API (convert_form_factor_to_module_type()) for
`Form Factor` to 'Module type' conversion as per `Memory Type`.
4. Add new argument as `Memory Type` to
smbios_form_factor_to_spd_mod_type() so that it can internally
call convert_form_factor_to_module_type() for `Module Type`
conversion.
5. Update `test_smbios_form_factor_to_spd_mod_type()` to
accommodate different memory types.
6. Skip fixed module type to form factor conversion using DDR2 SPD4
specification (inside dimm_info_fill()).
Refer to datasheet SPD4.1.2.M-1 for LPDDRx and SPD4.1.2.L-3 for DDRx.
BUG=b:194659789
TEST=Refer to dmidecode -t 17 output as below:
Without this code change:
Handle 0x0012, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x000A
Error Information Handle: Not Provided
Total Width: 16 bits
Data Width: 16 bits
Size: 2048 MB
Form Factor: Unknown
....
With this code change:
Handle 0x0012, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x000A
Error Information Handle: Not Provided
Total Width: 16 bits
Data Width: 16 bits
Size: 2048 MB
Form Factor: Row Of Chips
....
Change-Id: Ia337ac8f50b61ae78d86a07c7a86aa9c248bad50
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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This method will add a node to the end of the list.
BUG=b:179699789
TEST=Boot guybrush to the OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I1792e40f789e3ef16ceca65ce4cae946e08583d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58805
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Add DDR5 and LPDDR5 memory type checks while calculating bus width
extension (in bits).
Additionally, update all caller functions of
smbios_bus_width_to_spd_width() to pass `MemoryType` as argument.
Update `test_smbios_bus_width_to_spd_width()` to accommodate
different memory types.
Create new macro to fix incorrect bus width reporting
on platform with DDR5 and LPDDR5 memory.
With this code changes, on DDR5 system with 2 Ch per DIMM, 32 bit
primary bus width per Ch showed the Total width as:
Handle 0x000F, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x0009
Error Information Handle: Not Provided
Total Width: 80 bits
Data Width: 64 bits
Size: 16 GB
...
BUG=b:194659789
Tested=On Alder Lake DDR5 RVP, SMBIOS type 17 shows expected `Total Width`.
Change-Id: I79ec64c9d522a34cb44b3f575725571823048380
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58601
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Rob Barnes <robbarnes@google.com>
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Files used by this test are in: tests/data/lib/lzma-test/
file.bin - files with uncompressed data
file.lzma.bin - files with LZMA-compressed data from file.bin
How to prepare compressed file:
util/cbfs-compression-tool compress file.bin /tmp/file.lzma.bin lzma
dd if=/tmp/file.lzma.bin of=file.lzma.bin skip=8 ibs=1
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Id75e0b41991382d4c391b031862106de58eacdf7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57555
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I2ebebba1468c19661741de8a8456605b1c5f56b6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56813
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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This commit adds test case for lib/cbfs verification mechanisms.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I1d8cbb1c2d0a9db3236de065428b70a9c2a66330
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56601
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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When running multiple tests, e.g. by using unit-tests target, it is hard
to differentiate, which output comes from which file and/or
configuration. This patch makes the output easier to analyze and
understand by using new wrapper macro cb_run_group_tests(). This macro
uses __TEST_NAME__ value (containing test path and Makefile test name)
as a group name when calling cmocka group runner.
Example:
Test path: tests/lib/
Makefile test name: cbmem_stage_cache-test
Test group array name: tests
Result: tests/lib/cbmem_stage_cache-test(tests)
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I4fd936d00d77cbe2637b857ba03b4a208428ea0d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57144
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Add missing paths to common tests cflags and remove these paths from
individual tests configuration.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I13cb336195bfb06b861d7f403822f06bec8a40aa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56933
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Add tests for src/lib/libgcc.c __clzsi2() implementation. Unlike GCC
implementation, coreboot one can handle zero input.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I3f46071d0921e8c5edc5df3c296d11c77de01c88
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56257
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Using the linker's --wrap feature has the downside that it only covers
references across object files: If foo.c defines a() and b(), with b
calling a, --wrap=a does nothing to that call.
Instead, use objcopy to mark a weak and global so it can be overridden
by another implementation, but only for files originating in src/.
That way mocks - implemented in tests/ - become the source of truth.
TEST=Had such an issue with get_log_level() in a follow-up commit, and
the mock now takes over. Also, all existing unit tests still pass.
Change-Id: I99c6d6e44ecfc73366bf464d9c51c7da3f8db388
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ie6851b9473b225beb5ba51e26f44e21ea5919a64
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54916
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Coverity found resource leak in test setup function in error block.
Add malloc result check and free in error handling to silence Coverity.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Found-by: Coverity CID 1446760
Change-Id: Icf746df27167047fa3cf8f5df09fced20863f76d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54874
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Coverity reported unitialized array spd_block.addr_map which values are
not used. Add initialization to silence Coverity and avoid errors in
the future.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Found-by: Coverity CID 1453145 1453146 1453147 1453148 1453149
Change-Id: If301f9e5d9e06ad26769bd0717f1f906e620d82d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54355
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ic9a1420e49e1e80d180117c931e630e54c90cd75
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Some crc16_byte() and crc32_byte() tests had uint8_t instead of uint16_t
or uint32_t. That caused CRC values to be truncated and made tests
incorrect.
Also fix incorrect pre-calculated CRC values and change test buffer name
to more the accurate.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I61ee029a6950a8dfeb54520b634eaf4ed6bac576
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52708
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I2062e0d9dc2018bd6d8a210c8d26f2091e8c03fe
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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We had the addrspace_32bit rdev in prog_loaders.c for a while to help
represent memory ranges as an rdev, and we've found it useful for a
couple of things that have nothing to do with program loading. This
patch moves the concept straight into commonlib/region.c so it is no
longer anchored in such a weird place, and easier to use in unit tests.
Also expand the concept to the whole address space (there's no real need
to restrict it to 32 bits in 64-bit environments) and introduce an
rdev_chain_mem() helper function to make it a bit easier to use. Replace
some direct uses of struct mem_region_device with this new API where it
seems to make sense.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ie4c763b77f77d227768556a9528681d771a08dca
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I4d7d9ca43316bf514bb5ebd8909f441bcfa20eba
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52159
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I536566ba883bbeb558587a8d71e3d86152fb5e14
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Add missing initialization of tag and size fields. Include initial size
value in assertion in test_bootmem_write_mem_table().
Found-by: Coverity CID 1452250
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I27678a4eb01a0e6bedd0ba8c4b22a1b01afeaf12
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52263
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Coverity reported false-positive possible memory overrun
in setup_calloc_test(). Change memset address to use actual
buffer instead of pointer stored in symbol value in order
to silence Coverity.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I19f0718c657d565e515157e66367573e08f51254
Found-by: Coverity CID 1452005
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52136
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Jan Dabros <jsd@semihalf.com>
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ic1e539061ee5051d4158712a8a981a475ea7458a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43510
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Some tests have to be able to catch assertion errors.
Adding CMocka mock_assert() enables that.
Additionally fix test_imd_create_tiered_empty(),
test_full_stack() and test_incorrectly_initialized_stack()
by adding missing expect_assert_failure().
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I5e8dd1b198ee6fab61e2be3f92baf1178f79bf18
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I7f8498ad3d9d0d68b34aa0b48daca60545ec3f4e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51976
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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The calloc() function is useful in addition to malloc and friends, so
add the obvious definition.
Change-Id: I57a568e323344a97b35014b7b8bec16adc2fd720
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51949
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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When running coreboot unit tests on a recent clang version, it helpfully
throws an error on memset(..., 0xAA, 0) because it thinks you probably
made a typo and meant to write memset(..., 0, 0xAA) instead. I mean, who
would ever memset() a buffer of zero bytes, right? Unfortunately, unit
tests for memset() want to do exactly that. Wrapping the argument in
parenthesis silences the warning.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I21aeb5ec4d6ce74d5df2d21e2f9084b17b3ac6e3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51617
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jan Dabros <jsd@semihalf.com>
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: If30a238d32326ffd1d6719470deedc77f176ac72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I61c578ec93837cb2581a1ab9e2f3db2a0dd69f3d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51089
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I9016cd7825cb681fd200b23dd362ca24acf69192
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ic9b68eb0fa85bbc3f66d57cdcb329073b26bea57
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Three calls to memchr() had incorrect length values which could lead to
memory overrun.
Add non-null checks to ensure correct return values from memchr()
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ief7b7e2ecb9b5d2e05e6983d92d02fa00935b392
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51054
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ic6b10ec382cc807772689e852bad300c75da1fe2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50715
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I00464ec2db23867712cd2efd7f6cad92e3ee361a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50799
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Idcc824bfd9ca950f377c8f6a5916ffaba450fe73
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50721
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ib63123a36179127af4e3720ed01ca2611daa607e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50785
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I6750caa8ccdc442f78b782407ebfb3af78f476ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50716
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Icf0cceac290618a50ecc4e65f1f9551dbf31bd32
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50305
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ic48e52a97b18d55fd983315f25dc972f472cc473
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49669
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ie893b5e8fc91c230ff96a14146085de16d78b1c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I885ea05d509d3b1330de7a18531f310d290c6965
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48557
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Change-Id: If74f241b2bb788b3e2fd1b9062fc74819f7be31e
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47507
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Add test case executed twice, once for ROMSTAGE and once RAMSTAGE.
Each test is named and visible in cmocka output with stage in its name.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I464eee61f538188427bec730d2e004c7b76cca67
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47642
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I796e660eebc4d2c3c32207bd3a6ee44aaffeb325
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46817
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I39abfc644fef085cef2175086a0e45a040b244de
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46968
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Implement unit tests for src/lib/imd.c module.
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Signed-off-by: Anna Karas <aka@semihalf.com>
Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: I3902f8638669440144064ce0e3756918338f4068
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46457
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Confirm that the pointer is updated to point behind the parsed number.
Signed-off-by: Anna Karas <aka@semihalf.com>
Change-Id: If75a51056229904612c6a9ea20db4182d1935009
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43288
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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Move the console functions definitions out from lib/b64_decode code to
a dedicated directory.
Signed-off-by: Anna Karas <aka@semihalf.com>
Change-Id: I22a6a592f0d4d509f19920f4ad2b18e8ed83a03e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43285
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Implement unit tests for lib/hexstrtobin module.
Signed-off-by: Anna Karas <aka@semihalf.com>
Change-Id: Id929b07936ea180a798309e5acb1dacf1b396e32
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Implement unit tests for lib/b64_decode module.
Signed-off-by: Anna Karas <aka@semihalf.com>
Change-Id: Id5fe9272e30eaff3d086a95241b3819101089c2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42313
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Implement unit tests for remaining string library functions. Fix memory leak
in test_strdup().
Signed-off-by: Anna Karas <aka@semihalf.com>
Change-Id: I8ac6a6b2413d9077dc9ea81f638a2b0acd5c8862
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42311
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Remove a comment since is not useful anymore.
Signed-off-by: Anna Karas <aka@semihalf.com>
Change-Id: I236b040a83700bcd34d99db61e5dad0ff7abb28c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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<cmocka.h> requires a few standard headers to be explicitly included
before itself or it will throw compilation errors. Having to always
include these headers in the right order in every test is cumbersome.
Instead, this patch encapsulates the problem in a new <tests/test.h>
header that all tests should include (instead of <cmocka.h> directly).
Also fix --gc-sections in the test framework which needs to be passed
for linking, not for compiling.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I4284d74c8673708e21a5266eb42f7b9ae19a1b12
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41045
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Dabros
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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Stefan thinks they don't add value.
Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)
The exceptions are for:
- crossgcc (patch file)
- gcov (imported from gcc)
- elf.h (imported from GNU's libc)
- nvramtool (more complicated header)
The removed lines are:
- fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-# This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */
Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: Id8ca7c53122632c674e6bf952046ea22c0408e55
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Show a basic example of how unit testing can be applied for the coreboot
project. Add a test harness for lib/string.c module.
TEST=Install cmocka via appropriate command:
sudo apt-get install -y libcmocka-dev
sudo emerge dev-util/cmocka
yum install libcmocka-devel
* Build and run unit tests via `make unit-tests`
* Check the output to see that tests passed.
Signed-off-by: Jan Dabros <jsd@semihalf.com>
Change-Id: Ibf5554d1e99a393721a66bdd35af0122c2e412c4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40538
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
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