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AgeCommit message (Expand)Author
2012-07-27Intel 82810 and 82830: always room for PCI memoryKyösti Mälkki
2012-07-27Intel i945 and sch: no memory over 4GBKyösti Mälkki
2012-07-27Allocators for different memory regions typesKyösti Mälkki
2012-07-27x86emu: Use NULL instead of 0 when assigning pointerStefan Reinauer
2012-07-26Drop mainboard chip.hStefan Reinauer
2012-07-26Refactor driver structsPatrick Georgi
2012-07-26bd82x6x: Use CMOS variable if available for power-on on power failureStefan Reinauer
2012-07-26amd/lx: Move configuration from source to KconfigPatrick Georgi
2012-07-26CTDP: Only do TDP down/nominal change from TNP0Duncan Laurie
2012-07-26ELOG: Fix reporting of developer/recovery modesDuncan Laurie
2012-07-26Log event for abnormal management engine statusDuncan Laurie
2012-07-26ACPI: Add support for runtime config TDP downDuncan Laurie
2012-07-26CPU: Add option to set TCC activation offsetDuncan Laurie
2012-07-26ACPI: Add a method to notify OS to re-read _PPCDuncan Laurie
2012-07-26ACPI: Add function to write _PPC using NVSDuncan Laurie
2012-07-26NVS: Add a temp sensor ID and an ACPI Method to set itDuncan Laurie
2012-07-26ME: Move ME v8 lockdown to finalize stepDuncan Laurie
2012-07-26Reserve bd82x6x LPC decode ranges in the resource allocatorMarc Jones
2012-07-26ELOG: Log run-time SMI southbridge eventsDuncan Laurie
2012-07-26SATA: Add option to configure gen3 transmitterDuncan Laurie
2012-07-26ELOG: Support GSMI in CPT/PPT southbridge SMI handlerDuncan Laurie
2012-07-26Add correct bios callout into read event routinezbao
2012-07-26ibase/mb899: Rename NIC BIOS disable driver and hook upPatrick Georgi
2012-07-26Remove copies of rtl8168.cPatrick Georgi
2012-07-26USBDEBUG: buffer up to 8 bytesSven Schnelle
2012-07-26Drop CONFIG_CPU_MODEL_NAME and fix CPU name displayed in logsStefan Reinauer
2012-07-26Enable Microcode in CBFS for all SandyBridge/IvyBridge systemsStefan Reinauer
2012-07-26ELOG: Add support for SMM and kernel GSMI driverDuncan Laurie
2012-07-25SMM: Fix state table for Intel Core2 CPUsStefan Reinauer
2012-07-25SMM: Skip locking SPI registers in finalize stepDuncan Laurie
2012-07-25ELOG: Log boot-time events found in southbridgeDuncan Laurie
2012-07-25ELOG: Log events for Chrome OS developer/recovery modeDuncan Laurie
2012-07-25Fix comment to reference IvyBridge, tooStefan Reinauer
2012-07-25Include SandyBridge Microcode when IvyBridge is enabledStefan Reinauer
2012-07-25AMD parmer: Set correct azalia code verb tablezbao
2012-07-25AMD family15tn: Add BIOS callback hook for getting VBIOS Imagezbao
2012-07-25AMD Family 15tn: Set the default return value as AGESA_SUCCESS instead of TRUEzbao
2012-07-25AMD Family15tn: Set the mask of MTRR to 0000FFFXX0000800zbao
2012-07-25Change multiply ONE_MB to bit shifting.zbao
2012-07-25SMM: rename tseg_fixup to tseg_relocate and exportDuncan Laurie
2012-07-25Fix date output in Microcode updateStefan Reinauer
2012-07-25CougarPoint/PantherPoint: Add HM77 device ID to tableKimarie Hoot
2012-07-25Extend smbios api to allow runtime change of mainboard serial and versionChristian Gmeiner
2012-07-25Remove useless semicolonPatrick Georgi
2012-07-25chromeos: Pass pointer to ChromeOS ACPI structure instead of VB Shared DataStefan Reinauer
2012-07-25sync the northbridge.c with other family.zbao
2012-07-25Fix LAPIC timer on Ivy Bridge systemsStefan Reinauer
2012-07-25ELOG: Add support for a monotonic boot counter in CMOSDuncan Laurie
2012-07-25ELOG: Add support for generating SMBIOS type15 tableDuncan Laurie
2012-07-25More descriptive error messages in Sandybridge raminit codeStefan Reinauer
2012-07-25bd82x6x: Drop unneeded pci_dev_tStefan Reinauer
2012-07-24ELOG: Fix boot count increment for non-wake caseDuncan Laurie
2012-07-24Ivybridge: fix workaround and enable PAIRDuncan Laurie
2012-07-24CPU: Set flex ratio to nominal TDP ratio in bootblockDuncan Laurie
2012-07-24SMM: Fix state save map for sandybridge and TSEGDuncan Laurie
2012-07-24SMM: Add option for SPI driver to be available in SMMDuncan Laurie
2012-07-24SMM: Add support for malloc in SMM if using TSEGDuncan Laurie
2012-07-24ELOG: Add support for flash based event logDuncan Laurie
2012-07-24SMM: Add heap region and move C handler higher in regionDuncan Laurie
2012-07-24CPU: Update ivybridge PP1 current limit valueDuncan Laurie
2012-07-24CPU: Add basic support for Nominal Configurable TDPDuncan Laurie
2012-07-24Rename cache_lbmem() to cache_ramstage()Stefan Reinauer
2012-07-24Implement stack overflow checking for the BSPRonald G. Minnich
2012-07-24Fix automatic ME detection in finalizeStefan Reinauer
2012-07-24ChromeOS: Remove board specific acpi_get_vdat_info()Stefan Reinauer
2012-07-24Cougar/Panther Point: Compile in ME7 and ME8 code at the same timeStefan Reinauer
2012-07-24Fix ME hash functions on Panther Point/Cougar PointStefan Reinauer
2012-07-24Config changes to support microcode in CBFSVadim Bendebury
2012-07-24Add BAR address debug information to Oxford PCIe serial driverMarc Jones
2012-07-24Add microcode blob processingVadim Bendebury
2012-07-24Add code to read Intel microcode from CBFSVadim Bendebury
2012-07-24Add PCIe port disable debug messageMarc Jones
2012-07-24Make MAX_PHYSICAL_CPUS invisible on non-AMD boardsStefan Reinauer
2012-07-24bd82x6x: Support power-on-after-power-fail betterStefan Reinauer
2012-07-24Rename microcode include file to be model agnosticVadim Bendebury
2012-07-24Fix function generating GPIO state based vectorVadim Bendebury
2012-07-24Make ACPI code detect Sandy/Ivy Bridge dynamicallyStefan Reinauer
2012-07-24Shrink the stack sizes we need in corebootRonald G. Minnich
2012-07-24Add specific power management init code for PantherPointDuncan Laurie
2012-07-24Drop (empty) sandybridge_late_initialization()Stefan Reinauer
2012-07-24Remove CMOS Extended range enable from romstageDuncan Laurie
2012-07-24RTC: Enable extended CMOS in the bootblockDuncan Laurie
2012-07-24bd82x6x: Convert all PCI ID lists to new schemeStefan Reinauer
2012-07-24Add support for HM70 and NM70 LPC bridgeStefan Reinauer
2012-07-24cs5536: add smbus support in ramstageChristian Gmeiner
2012-07-24Add uartmem_init prototype.Marc Jones
2012-07-24RTC: Add defines for standard clock offsetsDuncan Laurie
2012-07-24Print PCI ID of PCH during boot upStefan Reinauer
2012-07-24Drop leading spaces from CPU name stringStefan Reinauer
2012-07-24Properly identify ACPI C3 states in _CST table.Duncan Laurie
2012-07-24Remove unused free() functionStefan Reinauer
2012-07-24Add standard header to prevent multiple inclusionVadim Bendebury
2012-07-24Move GGL0001 ACPI code to generic ChromeOS codeStefan Reinauer
2012-07-24Fix MRC cache update delaysStefan Reinauer
2012-07-24Remove code that enables/disables VMX in coreboot on chromebooks.Ronald G. Minnich
2012-07-24malloc/memalign: Remove unneeded linker checkStefan Reinauer
2012-07-24SPI flash layer: remove unused function spi_flash_free()Stefan Reinauer
2012-07-24MTRR: drop repetetive debug messageStefan Reinauer
2012-07-24Make memalign print useful messages on failureRonald G. Minnich
2012-07-24SandyBridge: Add another PCI device ID for northbridgeWalter Murphy
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