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2014-07-28AGESA boards: Use devicetree for PCI bus enumerationKyösti Mälkki
Previously MP table contained PCI_INT entries for PCI bus behind bridge 0:14.4 even if said PCI bridge function was disabled. Remove these as invalid, indeterminate bus number could cause conflicts. PCI_INT entries with bus_sb800[2], bus_hudson[2] and bus_yangtze[2] were invalid as there is no PCI bridge hardware on device 0:14.0. Remove these as invalid, indeterminate bus number could cause conflicts. Change-Id: Ie6a3807f64c8651cf9f732612e1aa7f376a3134f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6358 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28AGESA: Have IRQ routing in mptablesKyösti Mälkki
MP table should be complete with IRQ routing information even when we have ACPI tables. Change-Id: Ieeaed442aea6217f4477b7ac7e06a1926eec8996 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6361 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28AGESA fam16kb: Move NB config fam16kb out of get_bus_conf()Kyösti Mälkki
Change-Id: Iedb5e1c72afe70f63f39c2dbce4896863d1d275f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6357 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-28AGESA: Drop some excessive agesawrapper.h includesKyösti Mälkki
Change-Id: I3807912b1dc68fae8248a66e37bbe642fb92d3ae Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6262 Tested-by: build bot (Jenkins)
2014-07-28IOAPIC: Fix missing stdint includeKyösti Mälkki
Change-Id: Ib26f48d3ac66788246834cdc25d97910cd79fe98 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6264 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-25AGESA f15tn f16kb: Fix HUDSON_XHCI_ENABLEKyösti Mälkki
Control for XHCI was split to handle AMD_INIT_RESET in agesawrapper while AMD_INIT_ENV was already handled as part of BiosCallouts. OEM configuration is supposed to be implemented as part of BiosCallouts, leaving agesawrapper agnostic of platform details. TODO: S3 resume for XHCI1. Change-Id: Id5e9c25a227db4d821f1be4b176470547ca4ea84 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6241 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-07-24AGESA hudson yangtze: Move IMC firmware init out of get_bus_conf()Kyösti Mälkki
Change-Id: I5b3cbc4d25f06a5f916760d4474621abbf826ee4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6355 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24AGESA: Drop offset on PCI device enumerationKyösti Mälkki
Integrated PCI devices in southbridge silicon have static BDFs, no need to have variables to store the parent bus or an offset with constant zero. Change-Id: I37d3794d36b5e5775da9215574ddc199696646d0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6333 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24AGESA: Drop unused extern declarationsKyösti Mälkki
Change-Id: I7f681b40251f49ff717589ed5e7d7e00ee36c7c1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6332 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24AGESA fam15: Drop code that was commented outKyösti Mälkki
Only references to bus_rd890, bus_sp5100 and bus_sr5650 were in code sections that had been commented out. Change-Id: If5552c409ce948c494345f49dbaad790b398bff8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6331 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24AGESA boards: Drop global bus_isaKyösti Mälkki
Only ever used as lvalue (except when incrementing) so this global is unused. Change-Id: I616721f937eb0bfdb28f356284efd70f99ccd2dd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6330 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24AGESA fam15: Use local bus_isa storageKyösti Mälkki
Do not use a global as the value gets discarded anyway. Change-Id: I86aac304e073f0d74b011548d079e139891ec140 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6329 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24intel/i945/raminit.c: Remove trailing whitespace from `printk()`Paul Menzel
Remove a trailing whitespace after the ellipse in the debug messages in `sdram_program_row_boundaries()`. Setting RAM size... C0DRB = 0x20202010 C1DRB = 0x60606040 TOLUD = 0x00c0 Change-Id: I3ee2886da6b048f509b50864bfcc21fbcb093e74 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/6300 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24southbridge/via: Remove trailing whitespaceElyes HAOUAS
Change-Id: I28deda21a7070ea6f14f973b66fd5dd119bc6225 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6345 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24amd/dinar & torpedo: Remove trailing whitespaceElyes HAOUAS
Change-Id: I4ac14c4f511eb6d56480e5167ce98b861cbed775 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6322 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24northbridge/amd: Remove trailing whitespaceElyes HAOUAS
Change-Id: Iccad59ebac1c47ee3fd16c0c1244b62184cfd1bf Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6316 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24southbridge/amd: Remove trailing whitespaceElyes HAOUAS
Change-Id: I25cdfe6b3c8067793620677c62251e78704f7851 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6334 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24src/mainboard: Remove trailing whitespaceElyes HAOUAS
Change-Id: I14a9dc99acb5d5365a3d7e99a3964120bb611b05 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6308 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24mainboard/msi/ms7135/devicetree.cb: Remove trailing whitespaceElyes HAOUAS
Change-Id: I4151e8ac8903d0daa1e7b12ecadbab8ff7adaaeb Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6349 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24mainboard/msi/ms9185/devicetree.cb: Remove trailing whitespaceElyes HAOUAS
Change-Id: Ifea7c078b5246d4f48da2da1d58d4a5b2b05e6f5 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6350 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24msi/ms6156/devicetree.cb: Remove trailing whitespaceElyes HAOUAS
Change-Id: Ib2c08b58ab98d681f34a435c5ddcb4a9cbab65c1 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6348 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24lippert/spacerunner-lx/devicetree.cb: Remove trailing whitespaceElyes HAOUAS
Change-Id: I1a5b5d19ff72b028bbf5bb1c1414eebbf9827a2b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6351 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24lippert/literunner-lx/devicetree.cb: Remove trailing whitespaceElyes HAOUAS
Change-Id: Ib71e25a33e7fe6d43f2ebac0494c263318fa243e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6352 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24thomson/ip1000/devicetree.cb: Remove trailing whitespaceElyes HAOUAS
Change-Id: I79c1d1187b1fb44337c1a82bfd9b5871cd43e3e3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6354 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24mainboard/lippert's devicetree.cb: Remove trailing whitespaceElyes HAOUAS
Change-Id: I995b7946b56ed759dc2abac34797fa4747ea9f34 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6353 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24mainboard/msi/ms9282: Remove trailing whitespaceElyes HAOUAS
Change-Id: I93808f7798a18ab0993401af556fbb65dbcee32a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6347 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24northbridge/intelsch/raminit.h: Remove a trailing whitespaceElyes HAOUAS
Change-Id: Ic8d6007898a08ade9d6e5947cd368b7a0545928a Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6314 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24siemens/sitemp_g1p1: Remove a trailing whitespaceElyes HAOUAS
Change-Id: I88366c7cb80d65d84c9f4ea5d287639a9de95a2f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6323 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24supermicro/h8qgi & h8scm: Remove a trailing whitespaceElyes HAOUAS
Change-Id: I9d44679f32b917dae42b9a6920c3d3c54626dcda Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6324 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24tyan/s8226: Remove a trailing whitespaceElyes HAOUAS
Change-Id: Ic47cf1b55fc0d8b22d30d822b1744847e84d5a43 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6326 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24broadcom/blast/devicetree.cb: Remove a trailing whitespaceElyes HAOUAS
Change-Id: I76e54669a0e129adf6c7873585c62f692a5d509f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6346 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-24northbridge/via: Remove a trailing whitespaceElyes HAOUAS
Change-Id: I959f2d42bb3b6cd37a7876ad4dae712bdb5a69da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6315 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-23cpu/intel/fsp_model_206ax/model_206ax_init.c: Use macro `IS_ENABLED()`Paul Menzel
Change-Id: I91cd84d155a2cb1200cb82c31256cfa743e8ea9b Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/6227 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-23src/device/Kconfig: make help for VGA_BIOS_ID and PXE_ROM_ID more similarDaniele Forsi
Add to VGA_BIOS_ID the hint about lspci -nn and add to PXE_ROM_ID an empty line at the end for better readability in menuconfig. Change-Id: I56751c047c1ff08142e2af58ef3ba5fe1169eba5 Signed-off-by: Daniele Forsi <dforsi@gmail.com> Reviewed-on: http://review.coreboot.org/6301 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-23src/.../Kconfig: various small fixes to textsDaniele Forsi
Fixed spelling and added empty lines to separate the help from the text automatically added during make menuconfig. Change-Id: I6eee2c86e30573deb8cf0d42fda8b8329e1156c7 Signed-off-by: Daniele Forsi <dforsi@gmail.com> Reviewed-on: http://review.coreboot.org/6313 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-21src/drivers: Remove a trailing whitespaceElyes HAOUAS
Change-Id: If357da5d84a255e0bdf8784d559ee0941045bbd6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/6309 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-19src/device/Kconfig: fix typo in label "1024x768 256-color"Daniele Forsi
It had an extraneous digit after 768. Change-Id: Ie415e365f3eac0ed326786cea4c4628c002c4762 Signed-off-by: Daniele Forsi <dforsi@gmail.com> Reviewed-on: http://review.coreboot.org/6306 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-19nehalem: Move cbmem_recovery call to raminit.Vladimir Serbinenko
Currently cbmem_recovery is done in raminit only on non-S3-resume path do it on both paths to reduce confusion. Change-Id: I16161ad449b9802a855fcf834aa721f4f65c0bb4 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5954 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
2014-07-19intel/model_2065x: Remove dead code.Vladimir Serbinenko
nehalem uses gm45-like approach to resume backup so this code is never used. Change-Id: Ic32aa73f8d5b164b1c57815f6f44b2732fdbdcdb Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5975 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-07-19lenovo/x60: Support digitizer on X60t and X201t.Vladimir Serbinenko
Change-Id: I5b0399a8edca3b73aa7d515d2c446c31b3239fa5 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/5239 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-07-19device/pci_early.c: Mixes up variants of a typedefs to 'u32'Edward O'Callaghan
Unfortunately coreboot has to deal with ROMCC's short comings which has lead to a little bit of confusion due to typedefs. Essentially, coreboot defines four typedefs: * 'typedef struct device * device_t' in ramstage not in SIMPLE_DEVICE mode * 'typedef u32 device_t' in romstage or when SIMPLE_DEVICE is defined * 'typedef u32 pnp_devfn_t' * 'typedef u32 pci_devfn_t' Some early functions make use of 'device_t' over 'pci_devfn_t' and since the C type-checker does not enforce typedefs to the same type 'u32' these are never noticed. Fix these so that 'device_t' does not conflict in romstage for later work. We later plan to have 'pnp_devfn_t' and 'pci_devfn_t' as the only variants of 'u32' and 'device_t' to be a struct pointer type exclusively. Change-Id: I948801f5be968a934798f1bad7722649758cd4d3 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6225 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-18superio/f71869ad: fix documentation of io_info mask valuesFelix Held
Change-Id: I5d0a945de45f8f4a77193135e63f480af14a0136 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/6279 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-18mainboard: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: If29a70be4fb56ebb0dbf6d510412cbe2f34480ef Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6291 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-07-18src/superio/smsc/lpc47m15x: Avoid #include early_serial.cEdward O'Callaghan
Provide proper header and function type-signatures for Super I/O romstage component. Fix mainboard's bogous romstage component to match. Change-Id: Icd02199690d0c428b2daadf702d50714dc367692 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5924 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2014-07-18superio/smsc: Add some missing header guardsEdward O'Callaghan
Change-Id: Id3f85929024208b150c378d7636607a0c9b8617c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6302 Reviewed-by: Idwer Vollering <vidwer@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-18google/panther: general cleanup, file organization (non-functional)Matt DeVillier
acpi_tables.c: consolidate/organize headers chromeos.c: consolidate/organize headers; move header, #defines outside of #ifdef fadt.c: organize headers gpio.h: rename include guard; add comment to trailing #endif had_verb.h: add include guard; replace manual array size calculation with std header macro lan.c: remove conditional header inclusion; organize headers; remove pre-processor directive indentations mainboard.c: remove conditional header inclusion; organize headers; replace spaced indentations with tab(s); add comment to trailing #endif onboard.h: move fn prototype after #defines; add comment to trailing #endif romstage.c: consolidate/organize headers smihandler.c: organize headers; remove commented-out/dead code; add comment to trailing #endif thermal.h: add comment to trailing #endif Change-Id: Iadafdd1092108c3f52435831fa0103f2457066f1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: http://review.coreboot.org/6270 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-18src/superio/ite/it8772f: Separate mainboard from SIO at obj levelEdward O'Callaghan
Remove #include early_serial.c and rename to early_init.c as no actual UART configuration is done here. Note that this SIO component still hard codes its base address to 0x2e. Change-Id: Ieef32ac7285246717f0519ffed4314ba28cd47dc Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6271 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-18mainboard: Make use of ARRAY_SIZE in buildOpts.c on AGESA platformsEdward O'Callaghan
Found using coccinelle. Change-Id: I406de6cfe25d3b471dbb6f98d9c62addae008de3 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6195 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-18vendorcode/amd/agesa: Use macros already defined in stdlib.hEdward O'Callaghan
We already have these macros define in 'stdlib.h'. Make good use of them here to avoid redefinition conflicts of the pre-processor depending on header inclusion ordering. This has the nice side-effect of syncing up AGESA families in this particular regard. Change-Id: Icf911629a4a1a82b01062fe16af4c8f812b05717 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6199 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-07-17AMD get_bus_conf(): Drop bus_type arrayKyösti Mälkki
Only ever used as lvalue, so no point creating the array. Change-Id: I6699dfae9377a895e9bc4a52579d00ddcfa60a9f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6277 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-07-17drivers/spi: Sanitize headers from preprocessor abuseEdward O'Callaghan
Continuing on from the rational given in: a173a62 Remove guarding #includes by CONFIG_FOO combinations Change-Id: I35c636ee7c0b106323b3e4b90629f7262750f8bd Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6114 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-17intel/lynxpoint/Kconfig: Remove duplicate option `IFD_BIN_PATH`Paul Menzel
Currently `IFD_BIN_PATH` is shown twice. Commit 5218e616 (intel/lynxpoint: Allow building without IFD (descripter.bin)) [1] accidentally added the option another time. So fix up the commit and remove one of the two options `IFD_BIN_PATH`. Keep the one which depends on `!HAVE_IFD_BIN` and is around the IFD options. [1] http://review.coreboot.org/6046 Change-Id: Id46f01ab8ee2e752e337e687a2ef0dfa374f44a5 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/6269 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-07-17mainboard,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I6a95debbe86fddcaf94270dd380bc73ce3172e58 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6283 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17northbridge,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: Id1fcd3d1cd8a156a76e1a9a3ca4c7b4004c2c015 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6289 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17southbridge,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: Ied03e8814ea13f0e677a1d34da19efe6dfebf72f Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6288 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17cpu,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I7e8866d76d7f286e10160d7dc4f21f01a913bfee Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6286 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17device,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I73fe6f37c363f4bff332ca90178a236590067170 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6287 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17drivers,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I2d1f6a571166924c929452fd0f70192670904220 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6285 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17soc,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I6db4eada5be5f9a4340d9edb942924e2fd18b5ca Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6284 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17superio,Makefile.inc: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: Ia452e22af9491c1681c859691eb4ac1868eeb938 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6282 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17mainboard,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: Ib531a54db7df6b49a6218f689dcaab712e9dfb01 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6292 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17misc,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I5060052e268c6a6303d77fdf4380a55ac2ad5ae2 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6296 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17soc,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: If70f5ad26d639d7366772f4468a25bca83ac0857 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6295 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17northbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I8d4bf17fe9fd82499b1515a8e85dff9cba498350 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6294 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-17southbridge,ASL: Trivial - drop trailing blank lines at EOFEdward O'Callaghan
Change-Id: I8ef5f1571ad14ead2d4cc0d61b6b7133d7fc8550 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6293 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-16intel/i945/raminit.c: Remove trailing whitespace from `printk()`Paul Menzel
Remove a trailing space after the ellipse in the debug messages. Setting Graphics Frequency... FSB: 667 MHz Voltage: 1.05V Render: 250Mhz Display: 200MHz Change-Id: Iac8a5e89179104685dc54975ae7f833c1f3de69d Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/6280 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-15superio/fintek/f71869ad: config struct should be const qualifiedEdward O'Callaghan
The 'superio_fintek_f71869ad_config' struct packed by devicetree.cb should have its type declared with the 'const' qualifier. Change-Id: Ieb86861ee821e77680cc4d0de202dbd7535b844d Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6224 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-15southbridge/intel/bd82x6x/me_8.x.c: Trivial - space to tab fixEdward O'Callaghan
Change-Id: I5b6d0a1f5f96a8d6cfc5a14baaa0f9267339b072 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6268 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-15drivers/intel/fsp/fsp_util: 'long unsigned int' is 'unsigned long'Edward O'Callaghan
This is a bit of strange way to write 'unsigned long', fix that. Change-Id: I17caf971dac840e0f35f883dacfbd5c94d8c03d6 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/6196 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-07-15AGESA hudson: Fix SPI writesKyösti Mälkki
Only yangtze has longer FIFO in SPI controller. This was overlooked in commit 9f0a2be AMD SPI: Optimise for longer writes which broke SPI writes and caused CBFS errors with fam15tn. Change-Id: I821e3f1fa186d2383b30eab9c5d52797c2ef22c5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6273 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-07-14AGESA Hudson: Fix typecasts in Fch_Oem_config()Kyösti Mälkki
Like many other (but not all) BiosCallouts, StdHeader is also passed as ConfigPtr argument. Use that instead to make no assumptions of the real type of FchData as it changes depending of the StdHeader. Change-Id: Ibdf01d08e63b9e1b8e99ac16abb7f807d37a056e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6240 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14AGESA boards: Use IS_ENABLED() for HUDSON_LEGACY_FREEKyösti Mälkki
Change-Id: Ib2a015dac82cec8538f8b1a1c2d45b20b05747bc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6239 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Martin Roth <gaumless@gmail.com>
2014-07-14AGESA fam15: Fix entry to cimx/sb900Kyösti Mälkki
Move SB900 call to match comments and changes already made for family14 et al. Change-Id: I22aa0bbeeabf9cff929c49c23014005bc3d53ccb Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6238 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14AGESA CIMx: Move late init out of get_bus_conf()Kyösti Mälkki
Followup deals further with Fam15 case. For unknown reasons calls were commented out for amd/dinar and they remain that way. Change-Id: Ie0a25fbb6f5378019fbf0f19a02acf024d79817e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6237 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14AGESA fam12: Fix entry to cimx/sb700Kyösti Mälkki
Move SB700 calls to match comments and changes already made for family14 et al. Change-Id: I20a84e487ba346f63dd4454447077e0d2fd12c89 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6222 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14AGESA: Trace execution with AGESAWRAPPER()Kyösti Mälkki
Implement logging just once to have uniform output. Change-Id: I8db694a3bf6b1af459bdf98f7acb99edf4dd07f7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6180 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14AGESA: Fix error status code return type to enum from UINT32Edward O'Callaghan
AGESA correctly uses the enum AGESA_STATUS type whereas boards use a mess of UINT32 typecasts. Also no need to shout VOID. We are not that careful on changing all cases of VOID->void or whitespace issues as these files will get merged with follow-ups. Change-Id: I16ccfcc73cda6b917c7ff5fd42ee2cd04e7dc0dd Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6182 Tested-by: build bot (Jenkins)
2014-07-14AMD SPI: Optimise for longer writesKyösti Mälkki
Leave it to the implementation of flash->write() to split the writes to match SPI controller and SPI flash part restrictions. This allows for some optimisation for auto-address-increment (AAI) commands. Kconfig AMD_SB_SPI_TX_LEN can be kept as local. Change-Id: I4a8bc55ab7eb0eeda8f25003a8f5ff2a643ab7a7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6164 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14SPI: Split writes using spi_crop_chunk()Kyösti Mälkki
SPI controllers in Intel and AMD bridges have a slightly different restriction on how long transactions they can handle. Change-Id: I3d149d4b7e7e9633482a153d5e380a86c553d871 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6163 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-14SPI flash: Fix alignment checks in Page Program commandsKyösti Mälkki
There are two separate restrictions to take into account: Page Program command must not cross address boundaries defined by the flash part's page size. Total number of bytes for any command sent to flash part is restricted by the SPI controller capabilities. Consider CONTROLLER_PAGE_LIMIT=64, page_size=256, offset=62, len=4. This write would be split at offset 64 for no reason. Consider CONTROLLER_PAGE_LIMIT=40, page_size=256, offset=254, len=4. This write would not be split at page boundary as required. We do not really hit the second case. Nevertheless, CONTROLLER_PAGE_LIMIT is a misnomer for the maximum payload length supported by the SPI controller and is removed in a followup. Change-Id: I727f2e7de86a91b6a509460ff1f374acd006a0bc Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6162 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-07-12libpayload: find source of input charactersLuigi Semenzato
This change makes it possible for vboot to avoid an exploit that could cause involuntary switch to dev mode. It gives depthcharge/vboot some information on the type of input device that generated a key. BUG=chrome-os-partner:21729 TEST=manually tested for panther BRANCH=none CQ-DEPEND=CL:182420,CL:182241,CL:182946 Change-Id: I87bdac34bfc50f3adb0b35a2c57a8f95f4fbc35b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/182357 Reviewed-by: Luigi Semenzato <semenzato@chromium.org> Tested-by: Luigi Semenzato <semenzato@chromium.org> Commit-Queue: Luigi Semenzato <semenzato@chromium.org> Reviewed-on: http://review.coreboot.org/6003 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: adjust critical tempMatt DeVillier
Set critical temp to match newer devices Change-Id: I11f32297a9b8c9a3554821b5d1cd723d8d9e2b69 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: http://review.coreboot.org/6023 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Force enable ASPM on PCIe Root Port 4Stefan Reinauer
BUG=chrome-os-partner:21535 BUG=chrome-os-partner:25990 BRANCH=panther TEST=manual: Boot on Panther and look in /sys/firmware/log for the string "PCIe Root Port 4 ASPM is enabled" Change-Id: I294571c113a8909adb2e97afca92aef9a1af917c Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/187153 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/6007 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: acpi: Fix unstable fan behavior on boot + resumeStefan Reinauer
FLVL is used to keep track of which thermal zones are active, but it is not initialized upon boot / resume. An initial value of zero corresponds to all zones being active, which causes the fan to spin at max speed until the OS changes zones. Fix this annoyance by initializing FLVL to the lowest temperature zone. Also, fix a related bug where FLVL may jump to an undesired value. For example, if FLVL=3 (zones 3 + 4 active), and zone 0 is set to off (it's already off!), FLVL would previously become 1 (zones 1 + 2 + 3 + 4 active!). Fix this by not taking zone ON / OFF actions if our zone is already ON / OFF. BUG=chrome-os-partner:25766, chrome-os-partner:24775 TEST=Suspend / resume on Panther 20 times, verify that thermal zone after resume matches expectation based upon temperature. Also, stress system and verify thermal zones become active according to temperature increase. Change-Id: Ic60686aa5a67bf40c17497832b086ba09d56111a Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186455 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn@chromium.org> Tested-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186669 Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/6006 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Fix RW ramstage indexStefan Reinauer
Without this patch coreboot will always use the read-only version of ramstage, even if there is a read-write version available. BRANCH=panther BUG=chrome-os-partner:25870 TEST=Install different RO and RW version, check in cbmem log that coreboot's romstage and ramstage have different timestamps in their banners. Change-Id: I723a3d4479d59534660728d891a9f40a077b4ef0 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186664 Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/6005 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Add new thermal valuesMohammed Habibulla
Based on latest thermal report BUG=chrome-os-partner:24532 TEST=boot tested on panther BRANCH=panther Change-Id: I4b8639f926fc3cf57eb5329818b9b912bfbe222d Signed-off-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186113 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/6004 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Avoid shutdown when thermal sensor is unavailableStefan Reinauer
When the thermal sensor on Panther is unavailable (early on resume) it will return 0x80 which causes our AML thermal code to overflow, which causes the system to shut down. Instead, return a reasonable value in those cases so that the system will continue running until the sensor gets back on its feet. BUG=chrome-os-partner:24918 BRANCH=panther TEST=suspend_resume_test survived more than 100 iterations on Panther Change-Id: Ib2d714c39d353ce2415361bc6590784a3f6837d2 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182369 Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/6002 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Re-read temperature if current reading would cause power-offStefan Reinauer
Sometimes the SuperIO seems to provide wrong readings, especially early on after a resume from suspend. This will cause the system to power off. If that happens, wait for 1s and read again, to make sure the high temperature value was not just a flaky read. BUG=chrome-os-partner:24918 BRANCH=panther TEST=Boot tested on Panther. Change-Id: Ib3768528d90e34448e96ad587b2503d8d8b1a775 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182188 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/6001 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Disconnect speaker and mic in verb tableStefan Reinauer
There is no speaker and no builtin microphone in this system, hence disable them in the verb table. BRANCH=panther BUG=chrome-os-partner:24230 TEST=Boot Panther, see Microphone and Speaker disappear in Audio Settings Change-Id: I32bacec38ba3ba0c2359a8fc94e12af64f576012 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/182006 Reviewed-by: Dylan Reid <dgreid@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/6000 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Disable DEVSLP for SATAStefan Reinauer
Some SSD modules don't support DEVSLP correctly due to their firmware. Since the power savings are minimal, don't use DEVSLP to prevent potential problems. Some of the symptoms are that sometimes this causes USB devices to not work properly. BUG=chrome-os-partner:23186, BRANCH=panther TEST=Boot tested on Panther Change-Id: Iba3f721c73e0e760b6a9861ca23480ddb923df40 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181957 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/5999 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Add ACPI code to support wake-on-lanStefan Reinauer
There needs to be an ACPI linkage to provide the power resource needed to wake this device so the kernel will enable the SCI before going to suspend. A link is added for both NIC and WLAN, but it is only tested on the NIC. This is a forward port from Duncan's beltino patch. BUG=chrome-os-partner:24657 BRANCH=panther TEST=build and boot on panther, suspend and wake with etherwake Change-Id: I2804d2e904e26d6e34f5a177f0dabc1aaa3f0288 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181752 Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/5998 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Update Fan PolicyStefan Reinauer
Update fan policy according to Panther thermal report. CPU Temp. Readings | PWM -------------------+------ 40C | 42% 50C | 42% 83C | 80% 90C | 90% 96C | 100% BUG=chrome-os-partner:24532 BRANCH=panther TEST=boot tested on Panther Change-Id: I60f04d8b038c561b87dad505bbf058100119cc23 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181666 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/5997 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Disable power-failure gating for the PSON# signalStefan Reinauer
When the system loses AC power, the system will power back on automatically as soon as the AC power is reapplied. BUG=chrome-os-partner:24066 BRANCH=firmware-panther-4920.24.B TEST=boot tested on panther Change-Id: I37ddc5a162afcce01c2df5f509bfd7f2d0c15ba1 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179537 Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/5996 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Configure USB_ILIM_SEL to lowMohammed Habibulla
(panther port of Ib980100c648ae7472eac6f97e47f8ef3cbe72c7e) BUG=none BRANCH=none TEST=boot tested on Panther Change-Id: Iedcc107a43be170762d42d515c7e2a16ec395452 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/177474 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Commit-Queue: Mohammed Habibulla <moch@google.com> Tested-by: Mohammed Habibulla <moch@google.com> Reviewed-on: http://review.coreboot.org/5995 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Set default interrupt value for Environmental ControllerMohammed Habibulla
This writes the default value to the register, but it gets rid of the error that disturbs some of our tests: ERROR: PNP: 002e.4 70 irq size: 0x0000000001 not assigned (panther port of Ieab1c776b553c996a7d06e4059110943aaf41338) BRANCH=none BUG=chrome-os-partner:23945 TEST=boot test on Panther Change-Id: Id45c3bdc0d2feaf6f75d984c41d1f6ffef592d4d Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/177468 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Commit-Queue: Mohammed Habibulla <moch@google.com> Tested-by: Mohammed Habibulla <moch@google.com> Reviewed-on: http://review.coreboot.org/5994 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Make sure the S5 power status is on trackMohammed Habibulla
(panther port of I933c475f693b0271f86b5166eb2c9b3873f1c2c6) BUG=none BRANCH=none TEST=boot test on panther Change-Id: I5958a8d701901706eaa38df4323120c8352fea5c Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/176563 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: http://review.coreboot.org/5993 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Disable LPSS I2C controllersMohammed Habibulla
There is nothing attached to these devices so we can disable them as well as the function 0 DMA controller. Also remove the EC SMI/SCI mappings since there is no EC. (panther port of Iedfe711058676f7ee118b0b66ab0f8a1e792ea87) BUG=chrome-os-partner:23563 TEST=none BRANCH=panther Change-Id: Ie66f9b66744db98f8638495c05f3a075b6fa6db9 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/174944 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: http://review.coreboot.org/5992 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Fix thermal zone to use SIO PWM/TACH port 2Mohammed Habibulla
Fan is attached to port 2 instead of 3. (panther port of I9878063a24b0b908c74522580f776a4ce7d03d75) BUG=chrome-os-partner:23563 TEST=none BRANCH=panther Change-Id: I028e0e5a748fa0a20d34e27e870e14ed8c75e4d1 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/174984 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: http://review.coreboot.org/5991 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12google/panther: Use ISO C99 syntax for designated initializersMatt DeVillier
In C99 we defined a syntax for this. GCC’s old syntax is deprecated. Modelled after commit 8089f178 (mainboard/lenovo/x230 Fix usage of GNU field designator extension) [1]. [1] http://review.coreboot.org/5392 Change-Id: I51c72252800be64b9420d845e330fc0481c66470 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: http://review.coreboot.org/6024 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-07-12mainboard: Add new board Google PantherMohammed Habibulla
(Panther clone of Ia41af8425ab6c24746253abd025acd3365dd5a18 by reinauer) BUG=chrome-os-partner:23563 TEST=emerge-panther chromeos-coreboot-panther [pg: Drop configs/, which is chromeos stuff, adapted libpayload's config.panther to work with upstream] [pm: Add HAVE_IFD_BIN and HAVE_ME_BIN Kconfig options] [pm: rebase to master branch of coreboot upstream] [md: don't use FMAP to get MAC address if CONFIG_CHROMEOS not set] Change-Id: I50fd5c02da154e424dfefbe2020f4ce7ef9a4f8f Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://chromium-review.googlesource.com/174555 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Mohammed Habibulla <moch@chromium.org> Tested-by: Mohammed Habibulla <moch@chromium.org> Reviewed-on: http://review.coreboot.org/5990 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 11:43:06 +0000