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AgeCommit message (Expand)Author
2020-06-17soc/intel/cannonlake/vr_config: Add CFL defaults to TDC powerlimitPatrick Rudolph
2020-06-17soc/intel/cannonlake: Use table instead of switch-casePatrick Rudolph
2020-06-17mb/google/puff: add MST and LSPCON details to variants devicetreeShiyu Sun
2020-06-16Revert "x86/lapic: Set EXTINT on BSP only"Angel Pons
2020-06-16superio/winbond/w83977tf: Add suspend related fieldsKeith Hui
2020-06-16x86/lapic: Set EXTINT on BSP onlyZheng Bao
2020-06-16mb/pcengines/apu2/mainboard.c: unify hexadecimal notation using capital lettersPiotr Kleinschmidt
2020-06-16sb/intel/common/pmutil: Add dump_all_status()Kyösti Mälkki
2020-06-16lib/malloc: Drop <cpu/x86/smm.h> includeKyösti Mälkki
2020-06-16soc/amd/picasso/include/soc/memmap.c: Add missing <stdint.h>Elyes HAOUAS
2020-06-16cpu/x86: Define MTRR_CAP_PRMRRKyösti Mälkki
2020-06-16sb/intel/i82801dx: Drop smm_setup_structures()Kyösti Mälkki
2020-06-16soc/amd: Replace enable_smi_generation()Kyösti Mälkki
2020-06-16sb/amd/x/hudson: Replace hudson_enable_smi_generation()Kyösti Mälkki
2020-06-16sb,soc/intel: Replace smm_southbridge_enable_smi()Kyösti Mälkki
2020-06-16soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)Kyösti Mälkki
2020-06-16arch/x86: Declare global_smi_enable()Kyösti Mälkki
2020-06-16sb/intel: Remove spurious HAVE_SMI_HANDLER testKyösti Mälkki
2020-06-16arch/x86: Create helper for APM_CNT SMI triggersKyösti Mälkki
2020-06-16sb/intel: Clean up some SMI enablesKyösti Mälkki
2020-06-15i945 boards: Factor out MAX_CPUSAngel Pons
2020-06-15gm45 boards: Factor out MAX_CPUSAngel Pons
2020-06-15pineview boards: Factor out MAX_CPUSAngel Pons
2020-06-15haswell boards: Factor out MAX_CPUSAngel Pons
2020-06-15x4x boards: Factor out MAX_CPUSAngel Pons
2020-06-15arrandale boards: Factor out MAX_CPUSAngel Pons
2020-06-15sandybridge boards: Factor out MAX_CPUSAngel Pons
2020-06-15include: update cbmem_possibly_online for vboot_before_bootblockMartin Roth
2020-06-15Makefile.inc: Remove all-y with CONFIG_ARCH_xx guardsMartin Roth
2020-06-15vc/amd/fsp/picasso: Add AMD code to support psp_verstageMartin Roth
2020-06-15soc/amd/common/block/acpimmio: Update acpimmio for psp_verstageMartin Roth
2020-06-15console: Update for vboot before bootblockMartin Roth
2020-06-15include/rules.h: Add vboot_before_bootblock to ENV_ROMSTAGE_OR_BEFOREMartin Roth
2020-06-15security/vboot: Add option to run verstage before bootblockMartin Roth
2020-06-15cpu/intel: Remove obsolete comment in CAR setupKyösti Mälkki
2020-06-15arch/x86: Remove NO_FIXED_XIP_ROM_SIZEKyösti Mälkki
2020-06-15arch/x86: Remove XIP_ROM_SIZEKyösti Mälkki
2020-06-14soc/amd/picasso/graphics: implement map_oprom_vendev_revMartin Roth
2020-06-14drivers/intel/fsp2_0: Add FSP 2.2 specific supportSubrata Banik
2020-06-14mb/google/volteer: Disable HDA PCI device when AUDIO=NONEDuncan Laurie
2020-06-14mb/google/zork: Drop OEM_BIN configsFurquan Shaikh
2020-06-14mb/google/zork: Enable ELOG optionsFurquan Shaikh
2020-06-14southbridge/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-14soc/amd/picasso/aoac: Add wait_for_aoac_enabledRaul E Rangel
2020-06-14soc/amd/picasso/aoac: Set the Target Device State when powering onRaul E Rangel
2020-06-14soc/amd/picasso: Move aoac functions to new fileRaul E Rangel
2020-06-14soc/amd/picasso: Explicitly disable legacy UARTRaul E Rangel
2020-06-14console, PCI: Remove EARLY_PCI_BRIDGE support in verstageKyösti Mälkki
2020-06-14mb/google/volteer/var/terrador: Update dq/dqs mappingsDavid Wu
2020-06-14soc/intel/xeon_sp/cpx: select CACHE_MRC_SETTINGSJonathan Zhang
2020-06-14soc/amd/picasso: correct MCFG ACPI tableAaron Durbin
2020-06-14mb/google/volteer: Enable thermal sensor 4 in DPTF for volteerDeepika Punyamurtula
2020-06-14dptf: Introduce new paradigm for configuring DPTF parametersTim Wawrzynczak
2020-06-14soc/intel/tigerlake: enable CPU_INTEL_COMMONAlex Levin
2020-06-14soc/amd/picasso: Increase SMM_RESERVED_SIZEMarshall Dawson
2020-06-14mb/google/puff: add MST and LSPCON details to devicetreeShiyu Sun
2020-06-14soc/intel/cannonlake/acpi: Capitalize hex number to unify with SkylakePaul Menzel
2020-06-14soc/intel/xeon_sp/cpx: configure FSP-M UPD parametersJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add cpu entries in ssdtJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: fix MADT ACPI tableJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add IIO stack resources to DSDTJonathan Zhang
2020-06-14soc/intel/xeon_sp/cpx: add NUMA ACPI tablesJonathan Zhang
2020-06-14mb/google/hatch/vr/puff: Set up PL2 and PsysPL2Tim Chen
2020-06-14mb/google/fizz: add variant chipset display initJeff Chase
2020-06-14mb/google/dedede: Enable early EC software syncMeera Ravindranath
2020-06-14mb/google/dedede: Select Recovery Cache Kconfig optionMeera Ravindranath
2020-06-14sb/intel/i82801ix: Fix SPDX license headerKyösti Mälkki
2020-06-14mb/google/hatch: Switch USB2 port1 and port3 on NoibatEdward O'Callaghan
2020-06-14soc/amd/picasso/acpi: Add a wrapper method WAL1 for calling ALIB function 1Furquan Shaikh
2020-06-14ec/google/chromeec: Call \PNOT () on initializing AC power stateFurquan Shaikh
2020-06-13cpu/intel/car: Use symbols for CAR MTRR setupKyösti Mälkki
2020-06-13arch/x86: Add symbols for CAR MTRRs in linker scriptKyösti Mälkki
2020-06-13soc/intel/common: Introduce ASL2.0 syntaxAlexey Buyanov
2020-06-13arch/x86: Include id.ld unconditionally in memlayout.ldFurquan Shaikh
2020-06-13arch/x86: Drop early_ram.ldFurquan Shaikh
2020-06-13soc/amd/picasso: Place early stages and data buffers at the bottom of DRAMFurquan Shaikh
2020-06-13cbmem_id: Add CBMEM ID for early DRAM usageFurquan Shaikh
2020-06-13soc/amd/picasso: Add custom memlayout.ld fileFurquan Shaikh
2020-06-13treewide: Add Kconfig variable MEMLAYOUT_LD_FILEFurquan Shaikh
2020-06-13mb/google/zork: update DRAM SPD table for vilbozPaul Ma
2020-06-12mb/google/volteer/var/voxel: Add memory parts and generate DRAM IDsFurquan Shaikh
2020-06-12vendorcode/intel/fsp: Update Tiger Lake FSP Headers for v3197Srinidhi N Kaushik
2020-06-12mb/google/volteer: Customize PCH VR settings for better Sx power savingsVenkata Krishna Nimmagadda
2020-06-12soc/intel/tigerlake: Add devicetree support to change PCH VR settingsVenkata Krishna Nimmagadda
2020-06-12mb/google/dedede: Add new variant botenPeichao Wang
2020-06-12nb/intel/i945/rcven.c: Correct commentAngel Pons
2020-06-12nb/intel/i945: Clean up raminit coding styleAngel Pons
2020-06-12mb/google/hatch: Remove unused USB2 port from NoibatEdward O'Callaghan
2020-06-12soc/amd/picasso: Reconfigure SPI speeds after FSP-S has runFurquan Shaikh
2020-06-12sb/intel/i82801ix: Use PCI bitwise opsAngel Pons
2020-06-12mb/google/puff: Update i2c[2] and i2c[3] rise and fall timesSam McNally
2020-06-12sb/intel/i82801jx: Use PCI bitwise opsAngel Pons
2020-06-11soc/amd/picasso/uart: fix possible out of bounds accessFelix Held
2020-06-11vc/amd/fsp/platform_descriptors: drop prefix from PCIe/DDI structsFelix Held
2020-06-11mb/google/dedede: Add new variant drawciaWisley Chen
2020-06-11mb/google/volteer: Update DPTF TSR2 sensor ID for volteerDeepika Punyamurtula
2020-06-10amd/picasso: Load x86 microcode from CBFS modulesZheng Bao
2020-06-10device/xhci: Add xHCI utility to enumerate capabilitiesRaul E Rangel
2020-06-10mb/google/hatch: drop VBOOT_LID_SWITCH from hatch baseboardMatt DeVillier
2020-06-10soc/intel/common: Replace cse_bp and ME with cse_lite in all console logsSridhar Siricilla