| Age | Commit message (Expand) | Author |
|---|
| 2016-08-03 | google/gru: Add support for Gru rev1 | Julius Werner |
| 2016-08-03 | soc/intel/quark: Support access to CPU CR registers | Lee Leahy |
| 2016-08-03 | mainboard/intel/galileo: Add FSP 2.0 Kconfig support | Lee Leahy |
| 2016-08-03 | soc/intel/quark: Add header files for FSP 2.0 | Lee Leahy |
| 2016-08-03 | soc/intel/quark: Prepare for FSP2.0 support | Lee Leahy |
| 2016-08-03 | soc/intel/quark: Initialize MTRRs in bootblock | Lee Leahy |
| 2016-08-03 | soc/intel/quark: Remove use of EDK-II macros and data types | Lee Leahy |
| 2016-08-03 | fsp_broadwell_de: Add DMAR table to ACPI | Werner Zeh |
| 2016-08-03 | ACPI: Add code to create root port entry in DMAR table | Werner Zeh |
| 2016-08-03 | ACPI: Add code to include ATSR structure in DMAR table | Werner Zeh |
| 2016-08-03 | mainboard/intel/galileo: Remove use of EDK-II macros & data types | Lee Leahy |
| 2016-08-03 | soc/intel/quark: Make ramstage relocatable | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Update the debug levels | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Remove fsp_print_upd_info declaration | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Disable display of FSP header | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Handle FspNotify calls | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: FSP driver handles all FSP errors | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Verify HOBs returned by FspMemoryInit | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Add display HOB support | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Add UPD display support | Lee Leahy |
| 2016-08-03 | drivers/intel/fsp2_0: Monitor FSP setting of MTRRs | Lee Leahy |
| 2016-08-02 | arch/riscv: Add include/arch/barrier.h | Jonathan Neuschäfer |
| 2016-08-02 | google/lars & intel/kunimitsu: Disable EC build | Martin Roth |
| 2016-08-02 | superio/fintek/f81866d: Add support for UART 3/4 | Fabian Kunkel |
| 2016-08-02 | google/reef: Add pull up 20K for LPC SERIRQ | Kane Chen |
| 2016-08-02 | intel/amenia: Add GPIO changes to assert SLP_S0/Reset signal | Shankar, Vaibhav |
| 2016-08-02 | soc/intel/apollolake: Add iosstate macros for GPIO | Shankar, Vaibhav |
| 2016-08-02 | drivers/fsp2_0: Increment boot count for non-S3 boot | Furquan Shaikh |
| 2016-08-02 | intel/apollolake: Enable upper CMOS bank in bootblock | Furquan Shaikh |
| 2016-08-02 | elog: Include declarations for boot count functions unconditionally | Furquan Shaikh |
| 2016-08-02 | drivers/intel/fsp2_0: Display FSP calls and status | Lee Leahy |
| 2016-08-02 | i2c/w83795: Fix chip type message | Patrick Georgi |
| 2016-08-02 | amd/amdfam10: eliminate dead code | Patrick Georgi |
| 2016-08-02 | console: Drop leftover struct console_driver | Kyösti Mälkki |
| 2016-08-02 | intel/skylake: Fix UART build options | Furquan Shaikh |
| 2016-08-02 | intel/lynxpoint,broadwell: Fix eDP display in Windows, SeaBios & Tiano | Prabal Saha |
| 2016-08-01 | soc/intel/quark: Enable use of hard reset | Lee Leahy |
| 2016-08-01 | soc/intel/common: Fix build error in reset.c | Lee Leahy |
| 2016-08-01 | Remove non-ascii & unprintable characters | Martin Roth |
| 2016-08-01 | Add newlines at the end of all coreboot files | Martin Roth |
| 2016-08-01 | arch/x86: Enable postcar console | Lee Leahy |
| 2016-08-01 | arch/x86: Display MTRRs after MTRR update in postcar | Lee Leahy |
| 2016-08-01 | siemens/sitemp_g1p1: Fix typo | Patrick Georgi |
| 2016-08-01 | soc/intel/common: Enable MTRR display during bootblock & postcar | Lee Leahy |
| 2016-08-01 | soc/intel/quark: Fix car_stage_entry routine name. | Lee Leahy |
| 2016-07-31 | mainboard/bap/ode_e20XX: Enable UART 3/4 in devicetree | Fabian Kunkel |
| 2016-07-31 | mainboard/bap/ode_e20XX: Add different DDR3 clk settings | Fabian Kunkel |
| 2016-07-31 | mainboard/bap/ode_e20XX: Change PCIe lines | Fabian Kunkel |
| 2016-07-31 | superio/nuvoton: Add Nuvoton NCT6791D | Omar Pakker |
| 2016-07-31 | src/vboot: Capitalize RAM and CPU | Elyes HAOUAS |
| 2016-07-31 | src/lib: Capitalize ROM, RAM, NVRAM and CPU | Elyes HAOUAS |
| 2016-07-31 | src/drivers: Capitalize CPU, RAM and ACPI | Elyes HAOUAS |
| 2016-07-31 | src/soc: Capitalize CPU, ACPI, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/acpi: Capitalize ACPI and SATA | Elyes HAOUAS |
| 2016-07-31 | sunw/ultra40m2: Fix handling non-existence of a device | Patrick Georgi |
| 2016-07-31 | sis/sis966: fix typo | Patrick Georgi |
| 2016-07-31 | sis/sis966: don't store a 32bit value in a 16bit variable | Patrick Georgi |
| 2016-07-31 | intel/broadwell: fix typo | Patrick Georgi |
| 2016-07-31 | intel/skylake: Enable signalling of error condition | Patrick Georgi |
| 2016-07-31 | google/reef: Update chromeos.fmd RO_SECTION | Furquan Shaikh |
| 2016-07-31 | intel/amenia: Enable DPTF in mainboard | Shaunak Saha |
| 2016-07-31 | google/reef: Enable DPTF in mainboard | Shaunak Saha |
| 2016-07-31 | gigabyte/ga_2761gxdk: Remove comment *endif* | Paul Menzel |
| 2016-07-31 | mainboard: Format irq_tables.c | Paul Menzel |
| 2016-07-31 | build system: really disable building CrEC when not needed | Patrick Georgi |
| 2016-07-31 | src/arch: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/Kconfig: Capitalize ROM | Elyes HAOUAS |
| 2016-07-31 | src/device: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize CPU | Elyes HAOUAS |
| 2016-07-31 | src/include: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/southbridge: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/northbridge: Capitalize CPU, RAM and ROM | Elyes HAOUAS |
| 2016-07-31 | src/cpu: Capitalize ROM and RAM | Elyes HAOUAS |
| 2016-07-31 | nvidia/tegra124: Adjust memlayout to Chrome OS toolchain | Stefan Reinauer |
| 2016-07-31 | google/gale: Change board ID definition. | Kan Yan |
| 2016-07-31 | Update degree symbol to utf-8 encoding in comments | Martin Roth |
| 2016-07-31 | Remove extra newlines from the end of all coreboot files. | Martin Roth |
| 2016-07-31 | intel/wifi: Include conditionally in the build | Kyösti Mälkki |
| 2016-07-30 | mainboard/bap/ode_e21XX: Add board support | Fabian Kunkel |
| 2016-07-30 | mainboard/bap/ode_e21XX: Add copy of amd/olivehillplus | Fabian Kunkel |
| 2016-07-30 | chromeos mainboards: remove chromeos.asl | Aaron Durbin |
| 2016-07-30 | google/reef: Use GPE0_DW1_15 as wake signal for touchpad | Furquan Shaikh |
| 2016-07-30 | soc/intel/apollolake: Include gpe.h in chip.h | Furquan Shaikh |
| 2016-07-29 | skylake: fix VSDIO is at 0.8V when SDCard is not inserted | Zhuo-hao.Lee |
| 2016-07-29 | soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resume | Abhay Kumar |
| 2016-07-28 | google/gru & kevin: Update DRAM configuration | Lin Huang |
| 2016-07-28 | rockchip/rk3399: sdram: correct controller vref setting | Lin Huang |
| 2016-07-28 | drivers/intel/fsp2_0: Update the copyrights | Lee Leahy |
| 2016-07-28 | google/reef: Write protect GPIO relative to bank offset | Susendra Selvaraj |
| 2016-07-28 | soc/intel/apollolake: Update FSP Header files for version 146_30 | Brandon Breitenstein |
| 2016-07-28 | intel/apollolake: Update gnvs for dptf | Shaunak Saha |
| 2016-07-28 | intel/apollolake: Add soc specific DPTF values | Shaunak Saha |
| 2016-07-28 | intel/common: Add ASL code for DPTF | Shaunak Saha |
| 2016-07-28 | intel/common/opregion.c: only write 16 bytes to 16 byte field | Martin Roth |
| 2016-07-28 | arch/riscv: Refactor bootblock.S | Jonathan Neuschäfer |
| 2016-07-28 | arch/riscv: Only initialize virtual memory if it's available | Jonathan Neuschäfer |
| 2016-07-28 | arch/riscv: Remove spinlock code from atomic.h | Jonathan Neuschäfer |
| 2016-07-28 | intel/fsp1_1: Add C entry support to locate FSP Temp RAM Init | Subrata Banik |
| 2016-07-28 | skylake/devicetree: Add LPC EC decode range | Subrata Banik |
| 2016-07-28 | skylake/mainboard: Define mainboard hook in bootblock | Subrata Banik |
