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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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of the special resource maps spread over the opteron ports and make the code
more generic
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embedded boards that have fixed memory configuration.
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- Support for compiling romcc on non x86 platforms
- new romc options -msse and -mmmx for specifying extra registers to use
- Bug fixes to device the device disable/enable framework and an amd8111 implementation
- Move the link specification to the chip specification instead of the path
- Allow specifying devices with internal bridges.
- Initial via epia support
- Opteron errata fixes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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add 8mbit example config for amd solo.
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