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2009-06-30This patch unifies the use of config options in v2 to all start with CONFIG_Stefan Reinauer
It's basically done with the following script and some manual fixup: VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC` for VAR in $VARS; do find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \; done Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-24Add support for the Soyo SY-6BA+ III board.Uwe Hermann
Tested on hardware by Andrew Morgan <ziltro@ziltro.com>, boots Linux fine. Detailed status at: http://www.coreboot.org/Soyo_SY-6BA_Plus_III Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Andrew Morgan <ziltro@ziltro.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4369 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-21This patch adds a proper namestring generation to our ACPIgen generator.Rudolf Marek
Its used for Name and Scope and Processor now. As bonus, it allows to create a multi name paths too. Like Scope(\ALL.YOUR.BASE). Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4368 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19Undo my ugly commit that added uses clauses in lots of places instead of one.Myles Watson
Fix configuration of all boards. (Abuild tested) Hopefully fix compilation of PPC boards (they've never compiled for me.) Apologize profusely. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19work around initobject breakage in pc80/Config.lbStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4366 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19Convert the MSI MS-6178 board to CBFS.Uwe Hermann
Also, enable HIGH_TABLES support for this board. The HIGH_TABLES failed with: No matching ram area found for range: [0x00000000000f0000, 0x0000000000100000) Ram areas [0x0000000000000000, 0x0000000000001000) Reserved [0x0000000000001000, 0x00000000000a0000) RAM [0x0000000000100000, 0x000000000fff0000) RAM [0x000000000fff0000, 0x0000000010000000) Reserved SELFBOOT RETURNED! Boot failed. The fix was to change northbridge.c as follows: - ram_resource(dev, idx++, 1024, tolmk - 1024); + ram_resource(dev, idx++, 768, tolmk - 768); This is build-tested and tested on hardware by me. It boots fine, for instace with SeaBIOS and the standard GRUB1 from my disk. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4365 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-19ChangeLog:Harald Gutmann
Add initial ACPI support for M57SLI. Activates/Enables: * native Coreboot ACPI for M57SLI * Soft-Power-Off * PowerNow! * High Precision Event Timer * Windows booting with ACPI support Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4364 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-18Change Log:Harald Gutmann
Fix interrupt handling in mptable.c on M57SLI. Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Luc Verhaegen <libv@skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4362 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-18Change Log:Harald Gutmann
Activate HIGH_TABES on M57SLI Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-17Fix configuration of boards that didn't have uses CONFIG_USE_INIT. Trivial.Myles Watson
Abuild tested with -C. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-17Patch AMD Fam10 C2 for errata 327, 344, 346, 354, 351.Marc Jones
Removed c2 HT Phy 520a/530a reserved bit. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-16Maximilian Thuermer found a bug where the HT link capability code was alwaysMarc Jones
updating the passed value to the next link offset even when it was on the requested link (cap_count). Maximilian also found a bug where the linktype was still getting attributes even when it wasn't initialized. This should fix the HT problems for Fam10 C2. There are still issues with the microcode which need to be resolved. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4358 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-16These changes implement car in qemu. The implementation is in several Ronald G. minnich
ways superior to v3, while lacking its completeness. But, one nice thing: no more included .S or .c files. It's all separate compilation. That should allow our Makefiles to work much better. Note that the current non-CAR implementation is the default and continues to work (tested FILO boot to Linux on both CAR and non-CAR). Index: src/mainboard/emulation/qemu-x86/Config.lb Change this to be sensitive to USE_DCACHE_RAM. All settings etc. that depend on this variable are grouped in one if, and the other parts (romcc etc.) are in the else. This change is a model of how we should be able to do other motherboards. Index: src/mainboard/emulation/qemu-x86/Options.lb add needed options. Index: src/mainboard/emulation/qemu-x86/failover.c remove code inclusion from this not-yet-used file. Index: src/mainboard/emulation/qemu-x86/rom.c This is the entry point for the rom-based code. Called stage1.c in v3. Index: src/lib/Config.lb change initobject to a .o from a .c; this fixed a build problem. Index: src/pc80/serial.c make uart_init non-static. Index: src/pc80/Config.lb add initobject Index: src/arch/i386/init/entry.S Entry point. Unify a bunch of files that were fiddly lttle includes. From v3. Index: src/arch/i386/init/ldscript.ld new file. The goal is to hang all init changes for CAR here, to minimize other changes to any other ldscript. Besides, putting this in init makes sense; entry and car are manage init. Index: src/arch/i386/init/car.S generic i386 car code from v3. Index: src/arch/i386/init/ldscript_fallback_cbfs.lb Fix what looks like a bug: this was not including the init.text section. Index: targets/emulation/qemu-x86/Config.lb push up the console loglevel. qemu is for debugging so we might as well get all the debugging we can. Index: targets/emulation/qemu-x86/Config-car.lb For CAR bullds. Signed-off-by: Ronald G. minnich <rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4357 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-11Fix s2895 failover booting.Myles Watson
Abuild tested and boot tested on s2895 and serengeti_cheetah. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4355 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-09this port is horribly broken and should not have been checked in. This patchStefan Reinauer
gets us through config, but it fails during build because the original patch duplicated some files for VIA systems. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4354 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-09Fix a little white space issue. Also, don't copy the rom imageRonald G. Minnich
if it is already in its correct location. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4353 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-07A bunch of additional EPIA-M700 cleanups and also some non-cosmetic changes:Uwe Hermann
- Make get_dsdt script executable. - Rename DrivingClkPhaseData.c to driving_clk_phase_data.c. - Set proper IRQ_SLOT_COUNT value in the hope that the '14' from irq_table.c is correct. - Fix broken or incorrect #include names to increase likelyhood of a successful compile. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-07First bunch of coding style and consistency cleanups for theUwe Hermann
EPIA-M700 target. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4349 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06When I started refactoring mainboard Config.lb, I added two differentCarl-Daniel Hailfinger
files for targets without failover: src/config/nofailovercalculation.lb (64 kB XIP) src/config/nofailovercalculation128.lb (128 kB XIP) Targets with other XIP sizes were ignored. This patch moves XIP size back into mainboard code. Benefits from this patch: - src/config/nofailovercalculation128.lb is no longer needed - Targets with XIP sizes besides 64k and 128k benefit from refactoring - Conceptually, this makes the include files pure calculation files without settings. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06Make failover larger and decrease fallback's size so the total stays thePatrick Georgi
same. The errata need some extra room in failover. Trivial and abuild tested Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4347 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06Fix for Erratum 350 for AMD Fam10h CPUs.Marco Schmidt
Compared to posted patch, there are whitespace fixes (request by Uwe), and a guard to run the erratum only on AMD_RB_C2 (request by Marc). Signed-off-by: Marco Schmidt <mashpb@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4346 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06Fix for Erratum 343 for AMD Fam10h CPUs.Marco Schmidt
Signed-off-by: Marco Schmidt <mashpb@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06Change the CBFS build process to use coreboot.romPatrick Georgi
instead of coreboot.strip. That fixes the normal image because the calculations for its offset in the ROM match reality again. This requires changes in CBFS configurations to minimize the bootblock size. These are also done for CBFS boards. Other than this a couple of minor fixes are in this patch: - make asus/m2v-mx_se build with abuild with a crosscompiler - move CONFIG_CBFS for hp/dl145_g3 to Options.lb as it's done everywhere else - change the default config of abuild to not provide ROM_IMAGE_SIZE values for the images in a CBFS configuration - change abuild's crosscompile autodetection to not try to use "i386-elf-i386-elf-gcc" (which is bogus) Except for the latter two abuild changes (both in util/abuild/abuild), they're available as patch set on the mailing list in a mail from 2009-06-05 titled [PATCH]es to get normal image to work again with CBFS The changes in util/abuild/abuild are trivial and abuild tested. As discussed on the list, targets/hp/dl145_g3/Config-abuild.lb is deleted, now that Config.lb works again. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-05Fix non-revF K8 ram init compilation which was broken in r4341.Carl-Daniel Hailfinger
Change all printk_raminit to printk_spew. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4343 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-05Initial untested board code for the VIA EPIA-M700 Mini-ITX board.Uwe Hermann
The patch has been submitted by bari <bari@onelabs.com> and written by OLPC. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4342 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-05K8 RAM init debug messages are pretty short and sometimes cryptic. MakeCarl-Daniel Hailfinger
them a bit more verbose and hopefully more understandable. Old messages for my machine with 5 GB: RAM: 0x00400000 kB Ram3 [...] Initializing memory: done RAM: 0x00500000 kB New messages: RAM end at 0x00400000 kB Adjusting lower RAM end Lower RAM end at 0x003f0000 kB Ram3 [...] Initializing memory: done Handling memory hole at 0x00300000 (default) RAM end at 0x00500000 kB Handling memory mapped above 4 GB Upper RAM end at 0x00500000 kB Correcting memory amount mapped below 4 GB Adjusting lower RAM end Lower RAM end at 0x00300000 kB Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4341 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-05die() does never return. Annotate it as such.Carl-Daniel Hailfinger
Any endless loop after die() can be eliminated. Dereferencing a NULL pointer is bad. die() instead. Replace endless loops with die(). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-05After I modify the pci_ext_read_config32 and pci_ext_read_config32, the step 6aZheng Bao
starts to play its role. Then the system hangs at HDA init. I dont know what the VC1 is. The RPR says "Optional Features (only needed if CMOS option is enabled)" in 5.10.2. Before I know what it is, I think it is better to skip it. Tested on dbm690t. Add comment from Rudolf, " VC is virtual channel. Its used for isochronous transfer of data to sound card. The virtual channel guarantee "on time" delivery. In other words it sets up a channel for data to sound card, which means that that arrivs in time and there will be no interuptions in audio stream. http://www.microsoft.com/whdc/connect/pci/wlp_interrupt.mspx " Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-05Add a hopefully more correct and flexible set_dram_buffer_strength()Elia Yehuda
function based on test results with many different DIMMs. Tested by Uwe Hermann <uwe@hermann-uwe.de> on hardware. Might need a small increase of ROM_IMAGE_SIZE for some boards, we'll see. Signed-off-by: Elia Yehuda <z4ziggy@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-04The point of the patch is to make it easier to understand the raminitMyles Watson
code, specifically the difference between pre_f and f code. The only functional changes are in printk statements. The rest is white space. 1. Remove some #if 0 and #if 1 blocks 2. Remove #if USE_DCACHE_RAM blocks. All K8 boards use CAR. 2. Correct typos (canidate -> candidate) 3. Try to minimize the differences between amdk8_f.h and amdk8_pre_f.h 4. Try to minimize the differences between raminit.c and raminit_f.c 5. Make boards that have rev_f processors include the correct raminit code There is much more that could be done, but it's a start. Abuild tested and boot tested on s2892 and serengeti_cheetah. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4337 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-04This patch is about some noticable bugs which was made by no reason.Zheng Bao
1. In rs690_cmn.c, mask the lower 4 bits of the BAR3. No doubt, right? 2. In rs690_pcie.c, (1) Obviously, the mask should be 0xF, and bit 19 should be set to 1 (in comment). In rpr 5.10.2, step 2, step 2.1 & step 2.6 (2) The dynamic buffer allocation is enabled by setting bit 11 of PCIEIND: 0x20, instead of PCIEIND_P: 0x20. In rpr 5.10.2, step 5. Dynamic Slave CPL Buffer Allocation Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4336 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03Revert "CMOS: Add set_option and rework get_option."Luc Verhaegen
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660. Stepan pointed out that "s" means string, which makes the following statement in this commit message invalid: "Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go." Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03Revert "kontron 986lcd_m: cmos.layout: mark boot_devices as reserved."Luc Verhaegen
This reverts commit c03527377db5951f0d3228e2a93b4c57dd81b8ec. Stepan pointed out that 's' means string, and that therefor strings do exist. Marking this as reserved breaks some payloads. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4334 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03kontron 986lcd_m: cmos.layout: mark boot_devices as reserved.Luc Verhaegen
The kontron 986lcd_m cmos.layout had a 512bit area claimed for "boot_devices". The changes to the cmos code no longer allow usage of values larger than 32bits. Since this option was completely unused, mark it as reserved. Fixes build after the get_option change (r4332).. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4333 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03CMOS: Add set_option and rework get_option.Luc Verhaegen
To ease some of my debugging pain on the unichrome, i decided i needed to move FB size selection into cmos, so i could test a size and then reset it to the default after loading this value so that the next reboot uses the (working) default again. This meant implementing set_option in parallel to get_option. get_option was then found to have inversed argument ordering (like outb) and passing char * and then depending on the cmos layout length, which made me feel quite uncomfortable. Since we either have reserved space (which we shouldn't do anything with in these two functions), an enum or a hexadecimal value, unsigned int seemed like the way to go. So all users of get_option now have their arguments inversed and switched from using ints to unsigned ints now. The way get_cmos_value was implemented forced us to not overlap byte and to have multibyte values be byte aligned. This logic is now adapted to do a full uint32_t read (when needed) at any offset and any length up to 32, and the shifting all happens inside an uint32_t as well. set_cmos_value was implemented similarly. Both routines have been extensively tested in a quick separate little program as it is not easy to get this stuff right. build_opt_tbl.c was altered to function correctly within these new parameters. The enum value retrieval has been changed strol(..., NULL, 10) to stroul(..., NULL, 0), so that we not only are able to use unsigned ints now but so that we also interprete hex values correctly. The 32bit limit gets imposed on all entries not marked reserved, an unused "user_data" field that appeared in a lot of cmos.layouts has been changed to reserved as well. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03Modify it based on the RPR 5.7.7. Switching GGSP Configuration By Register ↵Zheng Bao
Programming. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-01Cosmetics and consistency fixes in src/superio/serverengines/pilot/ (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4328 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-31Following patch moves all vt8237 fadt.c from mainboard/* file to chipsetRudolf Marek
directory just with one common file. Changes to FADT: move to rev4, fix the generic register descriptors, detect additional VT8237S features. Change the compiler to CORE , its revision to 42. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4327 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-30Many Kudos go to Segher Boessenkool and Patrick Georgi for figuring this oneStefan Reinauer
out. Fix the libgcc dependency on abort() due to nested functions. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4326 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29rename the option CONFIG_PCI_OPTION_ROM_RUN_VM86 to ↵Joseph Smith
CONFIG_PCI_OPTION_ROM_RUN_REALMODE. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4325 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29enable/disable IDE 0/1 (Primary/Secondary) interfaces on the i82801xx ↵Joseph Smith
southbridge. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4324 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29drop most of the crappy vm86 code and replace it with a rewrittenStefan Reinauer
version that has all assembler in a .S file and all C code in a .c file. Also, remove requirement to move around between GDTs. This version includes the suggestions from Peter to clean up CR0 manipulation and to guard critical code paths by cli/sti. Tested and working on my hardware. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4323 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29Fix build with CONFIG_*_ROM_RUN.Luc Verhaegen
Last commit broke it due to leftover "void" from prototype. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-29Implement native VGA Support.Luc Verhaegen
This code brings a rather complete set of VGA IO routines for whoever wants it. These consist of the by now familiar read/write/mask sets. Due to the crazy nature of VGA, an ancient standard with bits all over the place, it makes no sense to define individual registers. You need a vga register spec at hand if you want to do anything anyway. These IO routines are always exposed. It also provides code to natively set up a 640x400 VGA textmode with an 8x16 font. The native VGA mode code is behind the OPTION_VGA option, as the font really adds to the size of the compiled/compressed rom. The font is the one also present in the linux kernel, but this file is unlicensed. Another copy of this is also present in coreboot in the deprecated console/btext code. The vga console code has been cleaned up, but it still has some TODO's left open, but that's for when i finally have found the remaining issue with the epia-m. Right now, it is important to get parts of my work out already and to make the remainder managable again. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4321 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-28Add lzma.o for CBFS, regardless if CONFIG_COMPRESSED_PAYLOAD_LZMA isPatrick Georgi
enabled or not. CONFIG_COMPRESSED_PAYLOAD_LZMA is set only if the lzma utility is found on the system - at least when using abuild. CBFS doesn't use this tool for compression. The result was a failed build if lzma (the tool) wasn't found, or failed runtime (if src/lib/cbfs.c disables lzma decompression based on CONFIG_COMPRESSED_PAYLOAD_LZMA) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-28Make memmove copy (dev->resources -i) resource structs instead ofMyles Watson
(dev->resources-i) bytes in compact_resources. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4319 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27First batch of indent-aided code cleanups, more will follow.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4318 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27Make directory hierarchy flat to match the same layout we useUwe Hermann
for other chipsets, as suggested on IRC. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27Trivial, but brown paper bag worthy:Patrick Georgi
#ifdef CONFIG_foo is a bad idea with our build system Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4316 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27Move coreboot_ram and coreboot_apc to CBFS. This allows to Patrick Georgi
reduce the size of the bootblock (done for kontron/986lcd-m) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27Change all vx800 file names from CamelCase to camel_case to matchUwe Hermann
our coding guidelines (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4314 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27Here's the VIA vx800 patch from OLPC.Bari Ari
It's untested, but a good starting point for everyone. Signed-off-by: Bari Ari <bari@onelabs.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Clean up acpi table writing code, and don't relyPatrick Georgi
on a given alignment for the RSDP and RSDT - look it up instead. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4311 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Make printk_* behaviour more consistent. Without it, side Patrick Georgi
effects in the arguments (eg. a pci config read, or variable increment) "vanish" with the message, and the behaviour changes. Some of these effects might be unwanted, but at least they are consistent now. To reduce the memory footprint slightly, the formatted strings are discarded. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4309 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26encapsule mbi initialization in write_multiboot_table, where it belongs. (veryStefan Reinauer
simple and trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4308 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Make vsprintf reentrant. More importantly, eliminate global variable.Patrick Georgi
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Major cleanup of i386 tables.c:Stefan Reinauer
* fix copyright messages * remove all HAVE_HIGH_TABLES and HAVE_LOW_TABLES preprocessor hackery and instead use high_tables_base to find out if high tables should be used. The code path with high tables disabled and high tables not available for another reason should be the same. * put MP-table into Fseg instead of 0x10. This allows us to drop an huge and ugly portion of code. And it will make some ugly Linux warnings go away. * use ALIGN macro instead of hand crafted aligning. * renumber post codes in this piece of code (don't jump ahead and back anymore) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Various fixes to the tree to get coreboot-v2 to build on SolarisPatrick Georgi
- Replace $(PWD) with $(CURDIR) in Makefiles. I don't know why the Solaris version behaves differently, but CURDIR is a safe choice on gnu make (and we require gnu make already) - Use tail -1 instead of tail -n1 in a file that already relies on tail -1 support in another place - Use tail -1 as alternative to tail -n1 in another place - Use #define for ulong_t in romcc, as that name is used on Solaris - Avoid fprinting a null pointer. The standard doesn't mandate that this is a special case, and Solaris doesn't implement it that way. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26Attached patch moves the CBFS payload loader to selfboot.c as it'sPatrick Georgi
the only selfboot user in CBFS. This way, CBFS can be used without importing selfboot.c, as long as no payloads are loaded. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4304 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26the i82801xx driver does not know ide{0,1}_enable in its chip.h, so comment itStefan Reinauer
out in the mainboard config file. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26ops can not be const because of the pci conf1/conf2 hackery we do. trivialStefan Reinauer
patch, just removes the warnings like coreboot-v2/src/southbridge/intel/i82801xx/i82801xx_ac97.c:73: warning: initialization discards qualifiers from pointer target type Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4302 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26acpi.c: add a cast to remove warning (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4301 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26remove some dead code from cpu.c (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4300 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-23keyboard driver: function definitions should not omit void if they don't takeStefan Reinauer
parameters. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4298 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-23fix comment in keyboard driver (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4297 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-22Fix MAINBOARD_PART_NUMBER to be h8dme, I forgot to change it from the h8dmrWard Vandewege
tree it was copied from. This is a trivial patch. Signed-off-by: Ward Vandewege <ward@gnu.org> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4295 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-15There were a few updates lately that generates ROM size > 512K. I am ↵Vincent Lim
changing the default ROM size to 1M to accommodate this and future changes. I tested on SimNow family10h_1p.bsd and it POSTs OK. Signed-off-by: Vincent Lim <vincent.lim@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4289 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14Update equivalent processor revision ID to load latest microcode patches andMarc Jones
register setting for all FAM10 processors. This does not include new errata for FAM10 C2. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Vincent Lim (vincent.lim@amd.com) git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14Trivia: remove commentVincent Lim
Signed-off-by: Vincent Lim <vincent.lim@amd.com> Acked-by: Vincent Lim <vincent.lim@amd.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4287 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14From AMD family 10h Processor BKDG (rev. D): a platform is capable of having ↵Vincent Lim
up to 8 nodes, and each nodes supports 1,2,3,4,5, or 6 cores. Signed-off-by: Vincent Lim <vincent.lim@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4286 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14#136: failed to boot under KVM\QEMURonald G. Minnich
> -------------------------------------+-------------------------------------- > Reporter: silicium@… | Owner: somebody > Type: defect | Status: new > Priority: major | Milestone: > Component: coreboot | Version: v2 > Keywords: | Dependencies: > Patchstatus: patch needs review | > -------------------------------------+-------------------------------------- Fix use of uninitialized pointers. To help in future, move the declaration to the same scope as the use. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4285 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-13Allow dynamic size for the {s,}elfboot bounce buffer.Patrick Georgi
Use that to fix selfboot with compressed payloads. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4281 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-13Make ACPI with low and high tables work again. The RSDP contained aPatrick Georgi
bogus RSDT pointer due to a wrong order of commands. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4280 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-13Oops forgot small part. Set up PIRQs in mainboard Config.lb for IP1000 and ↵Joseph Smith
RM4100 instead of using the ones in i82801xx_lpc.c. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-12This is the final patch that got everything working for me with the HP dl145g3.Samuel Verstraete
I would like to remind you that this firmware enables the hardware virtualization on the AMD cpu's on the machine. That feature was explicitly disabled by the factory BIOS. Due to an error in the VGAROM no other rom loader (YABEL or X*^BIOS) than SeaBIOS manages to load the VGA rom. The VGA ROM tries to read config space of a device that is actually not present. Because SeaBIOS does not support AHCI SATA it can not start the bootable drive of the machine so i had to add filo to seabios to manage booting: ./cbfstool coreboot.rom add-payload filo.elf img/FILO Signed-off-by: Samuel Verstraete <samuel.verstraete@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4277 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-12Use the debugging functions to print out the tree and resources.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4271 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-11Bring v3-style debug output to v2. Fix a minor typo.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4270 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-11This patch adds high table support to qemu. It was already added toMyles Watson
src/northbridge/intel/i440bx/ but not to src/cpu/emulation/qemu-x86/northbridge.c It also adds a driver for the ISA device that is found when using 0.9.1 If you look in a log without this patch you won't find the RTC init lines. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4269 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-11Trivial white space fixes so that the next patches are easier to read.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-11We should separate the it8718f_24mhz_clkin like the way IT8712 does.Zheng Bao
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by; Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4267 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-10Following patch fixes the XIP computation issue. I removed the normal imageRudolf Marek
because it was not working anyway (it was hardcoded) and because it allows me to fix the XIP base to something sane (and use generic computation and approach) This board is bit tricky because until now it required the VGA BIOS on the flash start. XIP will work with 64KB aligned base, therefore the VGA ROM image must be aligned too to 64KB. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4265 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-08Trivial fixup IRQS on IP1000 and RM4100.Joseph Smith
Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-08Set up PIRQs in mainboard Config.lb for IP1000 and RM4100 instead of using ↵Joseph Smith
the ones in i82801xx_lpc.c. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-08Disable the AC97 modem via the ICH4 LPC disable function register early in ↵Joseph Smith
the boot process. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-07Trivial checksum fixup for irq tables on IP1000 and RM4100.Joseph Smith
Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-05Fix a bug introduced in the copy_and_run refactoring.Patrick Georgi
The new code always decompressed to dst (as it should) and then jumped to _iseg, when it should jump to dst. With dst != _iseg this breaks (coreboot_apc) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4254 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-04The rev 4099 broke ECC boards, they need to have tidy the ECC tags. Myles ↵Rudolf Marek
reverted this change. I think we can return the 4099 back under HAVE_ACPI_RESUME define to make everyone happy (and booting ;). Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Rudolf Marek <r.marek@assembler.cz> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4252 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Assign PIRQs in mainboard Config.lb or use the default ones listed in ↵Joseph Smith
i82801xx_lpc.c. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4251 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Run dos2unix on all files:Stefan Reinauer
find . -type f| grep -v svn | xargs dos2unix Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Trivial, update email address. Joseph Smith
Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02Trivial fix up to the GPIO's connected to the IP1000 and RM4100, only set ↵Joseph Smith
ones that are actually connected to something. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4248 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01Trivial removal of svn:executable property from vga.c.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4247 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01This is a patch to use another IRQ besides IRQ12 to fix conflicts with i8042 ↵Joseph Smith
- PS/2 Mouse. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01This patch changes the default rom emulator to VM86. Joseph Smith
Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01This patch allows a custom vga driver that will give the flexibility to run ↵Joseph Smith
code after vga is initialized for tv-out. Signed-off-by: Joseph Smith <joe@settoplinux.org> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01Trivial patch to make #defines generated from cmos.layout have unique names. ↵Myles Watson
Kills a few more compiler warnings. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01Trivial cosmetic fixes to IP1000 and RM4100 irq_tables.c Signed-off-by: ↵Joseph Smith
Joseph Smith <joe@settoplinux.org> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4242 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-01The semantics of the changed code are pretty simple and looking atMyles Watson
other parts of the same file shows that it is a common construct. Remove the shadowed variable. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30Remove warnings from compilation of the s2892 with and without CBFS.Myles Watson
I didn't try to remove "defined but not used" warnings because there are too many ifdefs to be sure I wouldn't break something. For shadowed variable declarations I renamed the inner-most variable. The one in src/pc80/keyboard.c might need help. I didn't change the functionality but it looks like a bug. I boot tested it on s2892 and abuild tested it. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30Add high tables support to all northbridges.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1