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AgeCommit message (Expand)Author
2016-08-01soc/intel/quark: Fix car_stage_entry routine name.Lee Leahy
2016-07-31mainboard/bap/ode_e20XX: Enable UART 3/4 in devicetreeFabian Kunkel
2016-07-31mainboard/bap/ode_e20XX: Add different DDR3 clk settingsFabian Kunkel
2016-07-31mainboard/bap/ode_e20XX: Change PCIe linesFabian Kunkel
2016-07-31superio/nuvoton: Add Nuvoton NCT6791DOmar Pakker
2016-07-31src/vboot: Capitalize RAM and CPUElyes HAOUAS
2016-07-31src/lib: Capitalize ROM, RAM, NVRAM and CPUElyes HAOUAS
2016-07-31src/drivers: Capitalize CPU, RAM and ACPIElyes HAOUAS
2016-07-31src/soc: Capitalize CPU, ACPI, RAM and ROMElyes HAOUAS
2016-07-31src/acpi: Capitalize ACPI and SATAElyes HAOUAS
2016-07-31sunw/ultra40m2: Fix handling non-existence of a devicePatrick Georgi
2016-07-31sis/sis966: fix typoPatrick Georgi
2016-07-31sis/sis966: don't store a 32bit value in a 16bit variablePatrick Georgi
2016-07-31intel/broadwell: fix typoPatrick Georgi
2016-07-31intel/skylake: Enable signalling of error conditionPatrick Georgi
2016-07-31google/reef: Update chromeos.fmd RO_SECTIONFurquan Shaikh
2016-07-31intel/amenia: Enable DPTF in mainboardShaunak Saha
2016-07-31google/reef: Enable DPTF in mainboardShaunak Saha
2016-07-31gigabyte/ga_2761gxdk: Remove comment *endif*Paul Menzel
2016-07-31mainboard: Format irq_tables.cPaul Menzel
2016-07-31build system: really disable building CrEC when not neededPatrick Georgi
2016-07-31src/arch: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-31src/Kconfig: Capitalize ROMElyes HAOUAS
2016-07-31src/device: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-31src/cpu: Capitalize CPUElyes HAOUAS
2016-07-31src/include: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-31src/southbridge: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-31src/northbridge: Capitalize CPU, RAM and ROMElyes HAOUAS
2016-07-31src/cpu: Capitalize ROM and RAMElyes HAOUAS
2016-07-31nvidia/tegra124: Adjust memlayout to Chrome OS toolchainStefan Reinauer
2016-07-31google/gale: Change board ID definition.Kan Yan
2016-07-31Update degree symbol to utf-8 encoding in commentsMartin Roth
2016-07-31Remove extra newlines from the end of all coreboot files.Martin Roth
2016-07-31intel/wifi: Include conditionally in the buildKyösti Mälkki
2016-07-30mainboard/bap/ode_e21XX: Add board supportFabian Kunkel
2016-07-30mainboard/bap/ode_e21XX: Add copy of amd/olivehillplusFabian Kunkel
2016-07-30chromeos mainboards: remove chromeos.aslAaron Durbin
2016-07-30google/reef: Use GPE0_DW1_15 as wake signal for touchpadFurquan Shaikh
2016-07-30soc/intel/apollolake: Include gpe.h in chip.hFurquan Shaikh
2016-07-29skylake: fix VSDIO is at 0.8V when SDCard is not insertedZhuo-hao.Lee
2016-07-29soc/intel/apollolake: Remove PEIM GFX from normal mode and S3 resumeAbhay Kumar
2016-07-28google/gru & kevin: Update DRAM configurationLin Huang
2016-07-28rockchip/rk3399: sdram: correct controller vref settingLin Huang
2016-07-28drivers/intel/fsp2_0: Update the copyrightsLee Leahy
2016-07-28google/reef: Write protect GPIO relative to bank offsetSusendra Selvaraj
2016-07-28soc/intel/apollolake: Update FSP Header files for version 146_30Brandon Breitenstein
2016-07-28intel/apollolake: Update gnvs for dptfShaunak Saha
2016-07-28intel/apollolake: Add soc specific DPTF valuesShaunak Saha
2016-07-28intel/common: Add ASL code for DPTFShaunak Saha
2016-07-28intel/common/opregion.c: only write 16 bytes to 16 byte fieldMartin Roth
2016-07-28arch/riscv: Refactor bootblock.SJonathan Neuschäfer
2016-07-28arch/riscv: Only initialize virtual memory if it's availableJonathan Neuschäfer
2016-07-28arch/riscv: Remove spinlock code from atomic.hJonathan Neuschäfer
2016-07-28intel/fsp1_1: Add C entry support to locate FSP Temp RAM InitSubrata Banik
2016-07-28skylake/devicetree: Add LPC EC decode rangeSubrata Banik
2016-07-28skylake/mainboard: Define mainboard hook in bootblockSubrata Banik
2016-07-28soc/intel/skylake: Add C entry bootblock supportSubrata Banik
2016-07-28soc/intel/skylake: Do cache as ram and prepare for C entrySubrata Banik
2016-07-28soc/intel/skylake: Use init_vbnv_cmos from vboot vbnvFurquan Shaikh
2016-07-28soc/intel/broadwell: Use init_vbnv_cmos from vboot vbnvFurquan Shaikh
2016-07-28chromeos/gnvs: Clean up use of vboot handoffFurquan Shaikh
2016-07-28chromeos: Clean up elog handlingFurquan Shaikh
2016-07-28google/urara: Provide dummy implementations of rec/dev functionsFurquan Shaikh
2016-07-28qualcomm/gale: Add required files to enable elog in ramstageFurquan Shaikh
2016-07-28qualcomm/storm: Add required files to enable elog in ramstageFurquan Shaikh
2016-07-28i2c/ww_ring: Add ww_ring files to ramstageFurquan Shaikh
2016-07-28google/chromeos: Use vboot bootmode functions for elog add boot reasonFurquan Shaikh
2016-07-28bootmode: Get rid of CONFIG_BOOTMODE_STRAPSFurquan Shaikh
2016-07-28vboot: Separate vboot from chromeosFurquan Shaikh
2016-07-27drivers/intel/fsp2_0: Update MRC cache with dead version in recoveryFurquan Shaikh
2016-07-27soc/intel/common: Store MRC data in next available slot in the cacheFurquan Shaikh
2016-07-27mainboard/google/slippy: remove unobtainable mainboardAaron Durbin
2016-07-27mainboard/google/bolt: remove unobtainable mainboardAaron Durbin
2016-07-27soc/intel/apollolake: Disable monitor mwaitBora Guvendik
2016-07-27Rename VB_SOURCE to VBOOT_SOURCE for increased clarityPaul Kocialkowski
2016-07-27chromeec: Use CHROMEEC_SOURCE with fallback instead of hardcoding pathPaul Kocialkowski
2016-07-27arch/x86: Add bootblock and postcar support for SOC MTRR accessLee Leahy
2016-07-27cpu/x86: Support CPUs without rdmsr/wrmsr instructionsLee Leahy
2016-07-27nb/intel/x4x: Fix CAS latency detection and max memory detectionDamien Zammit
2016-07-27device: include devicetree in bootblock stageAaron Durbin
2016-07-27soc/nvidia/tegra124: remove cache_policiy optionAaron Durbin
2016-07-26drivers/intel/fsp2_0/header_util: Convert UPD headersLee Leahy
2016-07-26google/oak: dsi: set mipi pin driving control onMartin Roth
2016-07-26meditek/mt8173: dsi: set mipi pin driving control onJitao Shi
2016-07-26arch/x86: Generate a map file for the postcar stageLee Leahy
2016-07-26arch/x86: Organize ramstage to match other stagesLee Leahy
2016-07-26arch/x86: Move romstage files into romstage sectionLee Leahy
2016-07-26arch/x86: Move postcar stage commands into placeLee Leahy
2016-07-26drivers/elog: put back 4KiB limitAaron Durbin
2016-07-26intel car: Use MTRR WRPROT type for XIP cacheKyösti Mälkki
2016-07-26intel sandy/ivy: Redefine DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZEKyösti Mälkki
2016-07-26lib: Don't require ULZMA compression for postcarLee Leahy
2016-07-26drivers/intel/fsp2_0: Enable XIP romstage with loaded FSP-MLee Leahy
2016-07-26src/lib: Enable display of cbmem during romstage and postcarLee Leahy
2016-07-25drivers/uart: Enable debug serial output during postcarLee Leahy
2016-07-25intel/skylake: Select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOTFurquan Shaikh
2016-07-25intel/apollolake: Select VBOOT_SAVE_RECOVERY_REASON_ON_REBOOTFurquan Shaikh
2016-07-25rockchip/rk3399: set CA drive strength to 48ohmsLin Huang
2016-07-25google/gru: Change UART _Static_assert() condition to #ifJulius Werner
2016-07-25google/chromeos: Add support for saving recovery reason across rebootFurquan Shaikh