| Age | Commit message (Expand) | Author |
|---|
| 2015-10-19 | vendorcode/google: Deal with MULTIPLE_CBFS_INSTANCES | Patrick Georgi |
| 2015-10-17 | armv7: Word-sized/half-word-sized memory operations for 32/16 bit read/write | Paul Kocialkowski |
| 2015-10-17 | kontron/ktqm77: Tag all four USB3 ports switchable and SS capable | Nico Huber |
| 2015-10-16 | auron: Remove duplicate pei_data assignment | Shawn Nematbakhsh |
| 2015-10-16 | intel/southbridge/bd82x6x: Add option to set SPI VSCC registers | Nico Huber |
| 2015-10-16 | auron: fix can not recognize 4G memory | Tim Chen |
| 2015-10-16 | southbridge/amd/sr5650: Remove unnecessary register configuration | Timothy Pearson |
| 2015-10-16 | arch/x86/smbios: Add Crucial DIMM manufacturer ID | Timothy Pearson |
| 2015-10-16 | arch/x86/boot/smbios: Add SPD IDs for Kingston and Corsair | Timothy Pearson |
| 2015-10-16 | bootblock: Link timestamp.c only with EARLY_CBMEM_INIT | Paul Menzel |
| 2015-10-16 | cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS | Timothy Pearson |
| 2015-10-15 | cpu/x86/mtrr: Add MTRR index and total MTRRs to error message | Paul Menzel |
| 2015-10-15 | soc/intel/broadwell: fix USBDEBUG copy-pasta | Georg Wicherski |
| 2015-10-15 | pcengines/apu1: Fill serial number in SMBIOS | Kyösti Mälkki |
| 2015-10-15 | pcengines/apu1: Fix CRCs in SPD file | Kyösti Mälkki |
| 2015-10-15 | pcengines/apu1: Fix SPD for 4GB model | Kyösti Mälkki |
| 2015-10-15 | ec/google: Move label to BOL to satisfy lint-tests | Patrick Georgi |
| 2015-10-15 | nvidia/tegra210: Drop FSF address | Patrick Georgi |
| 2015-10-15 | cpu/mtrr.h: Fix macro names for MTRR registers | Alexandru Gagniuc |
| 2015-10-14 | Revert "Remove FSP Rangeley SOC and mohonpeak board support" | Martin Roth |
| 2015-10-14 | cpu/amd/microcode: Update parser to use stock microcode blobs | Audrey Pearson |
| 2015-10-14 | skylake: ACPI: Fix compiler warnings with iasl-20150717 | Duncan Laurie |
| 2015-10-14 | fsp1_1: add verstage support | Aaron Durbin |
| 2015-10-14 | x86: add standalone verstage support | Aaron Durbin |
| 2015-10-14 | vboot: allow more flexibility when adding verstage | Aaron Durbin |
| 2015-10-14 | sandy/ivy: Fix PIRQs on Chromebooks | Kyösti Mälkki |
| 2015-10-13 | t132: Add TIMESTAMP region to memlayout.ld | Furquan Shaikh |
| 2015-10-12 | gma ACPI: Do not overwrite backlight configuration | Nico Huber |
| 2015-10-12 | gma ACPI: Consolidate non-PCH and PCH brightness levels | Nico Huber |
| 2015-10-12 | gma: Consolidate Intel IGD ACPI code some more | Nico Huber |
| 2015-10-11 | skylake: add support for verstage | Aaron Durbin |
| 2015-10-11 | glados: add chromeos.c to verstage | Aaron Durbin |
| 2015-10-11 | soc/intel/common: use prog_locate() for finding fsp.bin | Aaron Durbin |
| 2015-10-11 | skylake: Leave SPI controller enabled | Lee Leahy |
| 2015-10-11 | skylake: SPI code cleanup | Lee Leahy |
| 2015-10-11 | vboot: prepare for x86 verstage | Aaron Durbin |
| 2015-10-11 | cbfs: don't load x86 programs over the top of read-only media | Aaron Durbin |
| 2015-10-11 | tegra132: increase romstage size for vboot | Aaron Durbin |
| 2015-10-11 | cbmem console: make verstage first class citizen | Aaron Durbin |
| 2015-10-11 | vboot: restructure vboot work buffer handling | Aaron Durbin |
| 2015-10-11 | vboot: remove remnants of VBOOT_STUB | Aaron Durbin |
| 2015-10-11 | intel fsp1_1: prepare for romstage vboot verification split | Aaron Durbin |
| 2015-10-11 | soc/intel/common: remove chipset specific calls | Aaron Durbin |
| 2015-10-11 | intel SOC common: Remove unused parameters | Lee Leahy |
| 2015-10-11 | Braswell: Modify CB to accomodate new FSPv83 | Subrata Banik |
| 2015-10-11 | Skylake: remove the out-dated VR config and un-needed 24mhz calibration | robbie zhang |
| 2015-10-11 | skylake: ajdust cache-as-ram region to 64KiB | Aaron Durbin |
| 2015-10-11 | intel: update common and FSP cache-as-ram parameters | Aaron Durbin |
| 2015-10-11 | Kconfig: Hide RAM_CODE_SUPPORT. | Vladimir Serbinenko |
| 2015-10-11 | Kconfig: Hide BOARD_ID_MANUAL. | Vladimir Serbinenko |
| 2015-10-11 | realmode/x86: Export vbe_mode_info_valid also in text mode. | Vladimir Serbinenko |
| 2015-10-11 | mba4,2: Remove USBDEBUG_HCD_INDEX. | Vladimir Serbinenko |
| 2015-10-11 | lenovo/t60: Enable native intel gfx init. | Vladimir Serbinenko |
| 2015-10-11 | Kill lvds_num_lanes | Vladimir Serbinenko |
| 2015-10-11 | Derive lvds_dual_channel from EDID timings. | Vladimir Serbinenko |
| 2015-10-11 | macbookair4_2: fix FIXME's left by autoport. | Vladimir Serbinenko |
| 2015-10-11 | mba4,2: Fix requested vgabios output. | Vladimir Serbinenko |
| 2015-10-11 | macbookair: Disable native VGA init | Vladimir Serbinenko |
| 2015-10-11 | Change macbook air to use a pre-dumped SPD. | Vladimir Serbinenko |
| 2015-10-11 | Autogenerate MacBookAir4,2 | Vladimir Serbinenko |
| 2015-10-11 | Do not show HAVE_MTC on non-tegra210 | Vladimir Serbinenko |
| 2015-10-09 | nb/intel/sandybridge/raminit: Add edge write discovery check | Patrick Rudolph |
| 2015-10-09 | northbridge/intel/sandybridge: Do not disable PEG by default | Patrick Rudolph |
| 2015-10-09 | northbridge/intel/sandybridge: Enable PEG clock-gating on demand | Patrick Rudolph |
| 2015-10-08 | arch/x86/bootblock: Do not include non-code files in bootblock.S | Alexandru Gagniuc |
| 2015-10-08 | arch/x86: Link walkcbfs.S instead on including it in bootblock.S | Alexandru Gagniuc |
| 2015-10-08 | arch/x86/bootblock: Link in object files selected with bootblock-y | Alexandru Gagniuc |
| 2015-10-08 | arch/x86/Makefile.inc: Simplify rule for bootblock.debug | Alexandru Gagniuc |
| 2015-10-08 | lib/gcov-glue.c: Define macro `COVERAGE_MAGIC` and use it | Paul Menzel |
| 2015-10-08 | fsp1_0: Fix broken logic when searching for FSP | Werner Zeh |
| 2015-10-07 | cbfs: add struct cbfsf | Aaron Durbin |
| 2015-10-07 | x86/bootblock: Use LDFLAGS_bootblock to enable garbage collection | Alexandru Gagniuc |
| 2015-10-06 | vboot2: Look up actual CBFS in MULTIPLE_CBFS configuration | Patrick Georgi |
| 2015-10-06 | fsp/cache_as_ram.inc and boards: Fix incorrect usage of POST_IO | Alexandru Gagniuc |
| 2015-10-05 | cpu/Makefile.inc: Only inculde x86 subdir if ARCH_x86 is selected | Alexandru Gagniuc |
| 2015-10-05 | Add EM100 'hyper term' spi console support in ramstage & smm | Martin Roth |
| 2015-10-04 | northbridge/intel/nehalem: Fix native VGA init | Nicolas Reinecke |
| 2015-10-04 | drivers/uart/Kconfig: Select 8250 mem when 8250 mem32 is enabled | Alexandru Gagniuc |
| 2015-10-03 | Remove FSP Rangeley SOC and mohonpeak board support | Alexandru Gagniuc |
| 2015-10-03 | Remove sandybridge and ivybridge FSP code path | Alexandru Gagniuc |
| 2015-10-03 | sandybridge ivybridge: Treat native init as first class citizen | Alexandru Gagniuc |
| 2015-10-02 | vboot: provide CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL option | Aaron Durbin |
| 2015-10-02 | tegra124: use the common verstage flow | Aaron Durbin |
| 2015-10-02 | broadcom/cygnus: remove verstage.c | Aaron Durbin |
| 2015-10-02 | commonlib/helpers.h: handle interaction with other environments | Aaron Durbin |
| 2015-10-02 | fsp1_1: move relocation algorithm to commonlib | Aaron Durbin |
| 2015-10-02 | fsp1_1: use commonlib/endian.h routines | Aaron Durbin |
| 2015-10-02 | mc_tcu3: Remove dummy blocks from hwinfo.hex | Werner Zeh |
| 2015-10-02 | mc_tcu3: Enable the usage of blobs. | Werner Zeh |
| 2015-10-01 | tegra132/tegra210: remove verstage.c | Aaron Durbin |
| 2015-10-01 | intel/fsp_baytrail: Remove unused MICROCODE_INCLUDE_PATH from Kconfig | Werner Zeh |
| 2015-10-01 | northbridge/intel/gm45: Fix native VGA init | Audrey Pearson |
| 2015-09-30 | chromeos: vboot_common: Avoid code duplication when grabbing the handoff info | Paul Kocialkowski |
| 2015-09-30 | pcengines/apu1: Add CMOS/NVRAM support | Maxime de Roucy |
| 2015-09-30 | amd/family14: Add k10temp thermal zone. | Tobias Diedrich |
| 2015-09-30 | AMD Bettong: Fix usb device in devicetree for Carrizo | zbao |
| 2015-09-30 | vboot: provide a unified flow for separate verstage | Aaron Durbin |
| 2015-09-30 | cpu: microcode: Use microcode stored in binary format | Alexandru Gagniuc |
| 2015-09-30 | intel/fsp1_0: Declare microcode to be size 0 if it doesn't exist | Patrick Georgi |
| 2015-09-30 | x86: prepare cache-as-ram to allow multiple stages | Aaron Durbin |
