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2021-01-24device/pci_rom.c: Use __func__Elyes HAOUAS
2021-01-24mb/lenovo/t400: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-24mb/lenovo/s230u: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-24ec/purism/librem/acpi/ec.asl: Convert to ASL 2.0 syntaxElyes HAOUAS
2021-01-24soc/samsung/exynos5250/dp-reg.c: Use __func__Elyes HAOUAS
2021-01-24arch/x86: Use wildcard for mb/smihandler.cKyösti Mälkki
2021-01-24ACPI: Clean up GNVS initialisationKyösti Mälkki
2021-01-24soc/amd/cezanne/Kconfig: select missing SSE2 optionFelix Held
2021-01-24soc/amd/cezanne/Kconfig: select X86_AMD_FIXED_MTRRSFelix Held
2021-01-24soc/amd/cezanne: add basic romstageFelix Held
2021-01-24soc,vendorcode/amd/cezanne: add basic FSP integrationFelix Held
2021-01-24soc/amd/picasso: Remove some empty stringsZheng Bao
2021-01-24soc/amd/cezanne: Add PSP integration for cezanneZheng Bao
2021-01-24soc/intel/xeon_sp/cpx: Account for 'rc' heap managerArthur Heymans
2021-01-24arch/x86/car.ld: Account for FSP-T reserved areaArthur Heymans
2021-01-24soc/intel/lpc_lib: drop dead codeMichael Niewöhner
2021-01-24soc/intel/icl: drop wrong, unused codeMichael Niewöhner
2021-01-24soc/intel/cnl: use Kconfig to determine PCH typeMichael Niewöhner
2021-01-24soc/intel/broadwell: Align raminit with HaswellAngel Pons
2021-01-24soc/intel/broadwell: Drop `struct romstage_params`Angel Pons
2021-01-24broadwell: Flatten `mainboard_pre_raminit`Angel Pons
2021-01-24broadwell: Clean up `mainboard_post_raminit`Angel Pons
2021-01-24soc/intel/broadwell/chip.h: Drop unused fieldsAngel Pons
2021-01-24soc/intel/broadwell: Select CPU_INTEL_HASWELLAngel Pons
2021-01-24soc/intel/broadwell: Move romstage.c to HaswellAngel Pons
2021-01-24soc/intel/broadwell: Drop now-unused CPU codeAngel Pons
2021-01-24soc/intel/broadwell: Use Haswell CPU headersAngel Pons
2021-01-24mb/google/auron: Use Haswell CPU codeAngel Pons
2021-01-24mb/google/jecht: Use Haswell CPU codeAngel Pons
2021-01-24mb/intel/wtm2: Use Haswell CPU codeAngel Pons
2021-01-24mb/purism/librem_bdw: Use Haswell CPU codeAngel Pons
2021-01-24soc/intel/broadwell: Allow to use Haswell CPU code insteadAngel Pons
2021-01-24soc/intel/broadwell: Select INTEL_LYNXPOINT_LPAngel Pons
2021-01-24cpu/intel/haswell: Add Broadwell CPUIDs and microcodeAngel Pons
2021-01-24cpu/intel/haswell: Set C9/C10 vccminAngel Pons
2021-01-24cpu/intel/haswell: Add fast ramp voltage for BroadwellAngel Pons
2021-01-24lib/edid_fill_fb: Relax bits_per_pixel constraintRaul E Rangel
2021-01-23soc/intel/baytrail,broadwell: Use bootstate for save_wake_source()Kyösti Mälkki
2021-01-23ACPI: Add helpers for CBMEM_ID_POWER_STATEKyösti Mälkki
2021-01-23soc/amd: Rename chipset_state to chipset_power_stateKyösti Mälkki
2021-01-23ACPI S3: Replace stashed acpi_slp_typ valueKyösti Mälkki
2021-01-23intel/baytrail,braswell,broadwell: Add const qualifier for power_stateKyösti Mälkki
2021-01-23ELOG: Add const qualifier for chipset_power_stateKyösti Mälkki
2021-01-23soc/amd/picasso/pcie_gpp: Remove duplication in pirq_data declarationRaul E Rangel
2021-01-23soc/amd/picasso/pci_gpp: Replace the swizzle string with a u8 arrayRaul E Rangel
2021-01-23soc/amd/picasso/pcie_gpp: Add clarifying commentRaul E Rangel
2021-01-23mb/google/guybrush: Set FWM position to an upper addressZheng Bao
2021-01-23soc/amd/picasso/acpi: Remove dummy AOAC parent deviceRaul E Rangel
2021-01-23soc/intel/cometlake: Add ucode for CML-HTim Crawford
2021-01-23mb/google/auron: Drop `variant_romstage_entry`Angel Pons
2021-01-23mb/google/auron: Factor out SPD indexingAngel Pons
2021-01-23mb/google/auron: Factor out `mainboard_print_spd_info`Angel Pons
2021-01-23mb/google/auron: Merge two print statementsAngel Pons
2021-01-23mb/google/auron: Drop `spd.h` from variantsAngel Pons
2021-01-23mb/intel/coffeelake_rvp: do UART pad configuration at board-levelMichael Niewöhner
2021-01-23soc/intel/apl: drop LPC pad configuration codeMichael Niewöhner
2021-01-23drivers/intel/fsp2_0: Add meaningful ERROR messageSubrata Banik
2021-01-22vendorcode/google/chromeos: Build CSE Board Reset in RomstageKarthikeyan Ramasubramanian
2021-01-22soc/amd/cezanne: add pci_devs.hFelix Held
2021-01-22mb/amd/majolica: Add PSP support for board majolicaZheng Bao
2021-01-22mb/google/guybrush: Set the ROMSIZE as 16MZheng Bao
2021-01-22ec/google/chromeec: Provide EC access for Retimer firmware updateJohn Zhao
2021-01-22ec/google/chromeec: Add RFWU into EC RAM for Retimer firmware updateJohn Zhao
2021-01-22drivers/intel/usb4: Enable retimer FW upgrade mux interactionBrandon Breitenstein
2021-01-22mb/prodrive/hermes: Fix 30 second boot delayPatrick Rudolph
2021-01-22mb/google/octopus: Garfour override VBT selectionTony Huang
2021-01-22mb/google/nightfury: Update RAM IDs usageSeunghwan Kim
2021-01-22types.h: Add a helper macro BITS_PER_BYTEFurquan Shaikh
2021-01-22soc/intel/alderlake: Adding Kconfig for ADL_M PCHVarshit Pandya
2021-01-22soc/intel/commmon: Include Alder Lake device IDsVarshit Pandya
2021-01-22mb/google/volteer/var/elemi: Update dptf parametersWisley Chen
2021-01-22soc/mediatek/mt8192: pmic: Set efuses manuallyHsin-Hsiung Wang
2021-01-22mb/google/volteer/variants/eldrid: Configure USB2 port for Type-CNick Chen
2021-01-22soc/mediatek/mt8183: Fix pq module size configYu-Ping Wu
2021-01-22mb/emulation/qemu-q35: Account for TSEGArthur Heymans
2021-01-22cpu/intel/haswell: Enable timed MWAIT if supportedAngel Pons
2021-01-22soc/amd/common/block/smbus: always return SMBus MMIO in get_sm_mmioFelix Held
2021-01-22mb/getac/p470/acpi: Convert 'battery.asl' to ASL 2.0 syntaxElyes HAOUAS
2021-01-22soc/intel/baytrail,broadwell: Refactor acpi_wake_source()Kyösti Mälkki
2021-01-22mb/google/kukui: Enable MT8183_DRAM_EMCP for katsuSunway
2021-01-21soc/amd/cezanne: include LAPIC code and set MAX_CPUS to 16Felix Held
2021-01-21mb/siemens/chili: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/up/squared: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/kblrvp: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/minnow3: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/leafhill: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/glkrvp: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/apollolake_rvp: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/tglrvp: do UART pad config at board-levelMichael Niewöhner
2021-01-21mb/intel/jasperlake_rvp: do UART pad config at board-levelMichael Niewöhner
2021-01-21mb/intel/icelake_rvp: do UART pad config at board-levelMichael Niewöhner
2021-01-21mb/google/reef: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/minnow3: drop unneeded call to lpc_configure_padsMichael Niewöhner
2021-01-21mb/intel/leafhill: do LPC/eSPI pad configuration at board-levelMichael Niewöhner
2021-01-21mb/intel/glkrvp: do LPC/eSPI pad configuration at board-levelMichael Niewöhner
2021-01-21mb/up/squared: do LPC/eSPI pad configuration at board-levelMichael Niewöhner
2021-01-21mb/google/reef: do LPC/eSPI pad configuration at board-levelMichael Niewöhner
2021-01-21mb/google/hatch: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/google/glados: do UART pad configuration at board-levelMichael Niewöhner
2021-01-21mb/google/octopus: do UART pad configuration at board-levelMichael Niewöhner