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2015-04-20chromeos: vboot2: Add TPM PCR extension supportJulius Werner
ChromeOS/vboot devices expect the TPM PCRs 0 and 1 to be extended with digests that attest the chosen boot mode (developer/recovery) and the HWID in a secure way. This patch uses the newly added vboot2 support functions to fetch these digests and store them in the TPM. CQ-DEPEND=CL:244542 BRANCH=veyron BUG=chromium:451609 TEST=Booted Jerry. Confirmed that PCR0 contains the same value as on my vboot1 Blaze and Falco (and PCR1 contains some non-zero hash). Original-Change-Id: I7037b8198c09fccee5440c4c85f0821166784cec Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/245119 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 8b44e13098cb7493091f2ce6c4ab423f2cbf0177) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I549de8c07353683633fbf73e4ee62ba0ed72ff89 Reviewed-on: http://review.coreboot.org/9706 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-20vboot2 workbuf alignment is now 16 bytes, not 8Bill Richardson
BUG=chromium:452179 BRANCH=ToT CQ-DEPEND=CL:243362 TEST=manual emerge-veyron_pinky coreboot Original-Change-Id: Ibcbaea2990e5e06ea7cfaaa5412ef7c1477f5fcc Original-Signed-off-by: Bill Richardson <wfrichar@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/243380 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 8e5c18eeb21944bdcb064b4491c6781d16ef5608) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I26f6fb67655cb1dfbdcdc48530ef6bfeb1aa692a Reviewed-on: http://review.coreboot.org/9705 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-18vboot2: provide path for booting using alternative CBFS instancesVadim Bendebury
When CONFIG_MULTIPLE_CBFS_INSTANCES is enabled, the image is expected to have CBFS instances in rw-a and rw-b sections of the bootrom. This patch adds code which makes sure that CBFS header points at the proper bootrpom section as determined by vboot, and the RW stages load from that section. BRANCH=storm BUG=chrome-os-partner:34161, chromium:445938 TEST=with the rest of the patches in, STORM boots all the way into Linux login prompt. Original-Change-Id: I187e3d3e65d548c672fdf3b42419544d3bd11ea1 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/237662 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 71ad0bb41b183374a84a5b9fb92c3afd813ceace) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ia05cb713981c44da8cb379b72dfbe17fe1f6c5ff Reviewed-on: http://review.coreboot.org/9704 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-18vboot2: Implement new vb2ex_hwcrypto APIJulius Werner
This patch aligns our verstage code to the new API addition in vboot2. The hardware crypto functions are stubbed out by default and just pretend that all algorithms are unsupported, causing vboot to fall back to the normal software hashing code. These weak symbols can be overridden by individual platform code to provide actual hardware crypto engine support. CQ-DEPEND=CL:236453 BRANCH=None BUG=chrome-os-partner:32987 TEST=Booted Pinky, confirmed vboot falls back to software crypto. Original-Change-Id: Idf6a38febd163aa2bff6e9a0e207213f01ca8324 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/236435 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 9b5ee7f575f1aa3b0eb6ef78947ca93a4818f57b) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I6f0e19255a9bc5c5cd1767db76f1e47897ef0798 Reviewed-on: http://review.coreboot.org/9703 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-18vboot: make vboot2_verify_firmware returnDaisuke Nojiri
this allows each board to decide what to do after firmware verification is done. some board needs to return back to the previous stage and let the previous stage kick off the verified stage. this also makes it more visible what is going to happen in the verstage since stage_exit now resides in main(). BUG=none BRANCH=tot TEST=booted cosmos dev board. booted blaze in normal and recovery mode. built for all current boards. Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I3cb466cedf2a9c2b0d48fc4b0f73f76d0714c0c7 Original-Reviewed-on: https://chromium-review.googlesource.com/232517 (cherry picked from commit 495704f36aa54ba12231d396376f01289d083f58) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ic20dfd3fa93849befc2b37012a5e0907fe83e8e2 Reviewed-on: http://review.coreboot.org/9702 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-17chromeos: Provide common watchdog reboot supportJulius Werner
Many ChromeOS devices use a GPIO to reset the system, in order to guarantee that the TPM cannot be reset without also resetting the CPU. Often chipset/SoC hardware watchdogs trigger some kind of built-in CPU reset, bypassing this GPIO and thus leaving the TPM locked. These ChromeOS devices need to detect that condition in their bootblock and trigger a second (proper) reboot. This patch adds some code to generalize this previously mainboard-specific functionality and uses it on Veyron boards. It also provides some code to add the proper eventlog entry for a watchdog reset. Since the second reboot has to happen before firmware verification and the eventlog is usually only initialized afterwards, we provide the functionality to place a tombstone in a memlayout-defined location (which could be SRAM or some MMIO register that is preserved across reboots). [pg: Integrates 'mips: Temporarily work around build error caused by <arch/io.h> mismatch] BRANCH=veyron BUG=chrome-os-partner:35705 TEST=Run 'mem w 0xff800000 0x9' on a Jerry, watch how a "Hardware watchdog reset" event appears in the eventlog after the reboot. Change-Id: I0a33820b236c9328b2f9b20905b69cb934326f2a Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fffc484bb89f5129d62739dcb44d08d7f5b30b33 Original-Change-Id: I7ee1d02676e9159794d29e033d71c09fdf4620fd Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/242404 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Id: c919c72ddc9d2e1e18858c0bf49c0ce79f2bc506 Original-Change-Id: I509c842d3393bd810e89ebdf0dc745275c120c1d Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/242504 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9749 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-17chromeos: Move memlayout.h/symbols.h into common directoryJulius Werner
Turns out there are uses for memlayout regions not specific to vboot2. Rather than add yet another set of headers for a single region, let's make the vboot2 one common for chromeos. BRANCH=veyron BUG=chrome-os-partner:35705 TEST=Booted Jerry, compiled Blaze, Cosmos, Ryu and Storm. Change-Id: I228e0ffce1ccc792e7f5f5be6facaaca2650d818 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: c6d7aab9f4e6d0cfa12aa0478288e54ec3096d9b Original-Change-Id: I1dd7d9c4b6ab24de695d42a38913b6d9b952d49b Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/242630 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9748 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-17veyron: move setup_chromeos_gpios() prototype to board.hJulius Werner
I always had that TODO comment in there but I had already forgotten what I even meant by it. It's really just a simple cleanup... this function is (currently) veyron-specific and doesn't belong in common code. BRANCH=veyron BUG=None TEST=Booted Jerry. Change-Id: Iccd6130c90e67b8ee905e188857c99deda966f14 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d188398704575ad2fedc2a715e609521da2332b0 Original-Change-Id: I6ce701a15a6542a615d3d81f70aa71662567d4fa Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/241190 Reviewed-on: http://review.coreboot.org/9733 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-14timestamps: You can never have enough of them!Julius Werner
Now that we have timestamps in pre-RAM stages, let's actually make use of them. This patch adds several timestamps to both the bootblock and especially the verstage to allow more fine-grained boot time tracking. Some of the introduced timestamps can appear more than once per boot. This doesn't seem to be a problem for both coreboot and the cbmem utility, and the context makes it clear which operation was timestamped at what point. Also simplifies cbmem's timestamp printing routine a bit, fixing a display bug when a timestamp had a section of exactly ",000," in it (e.g. 1,000,185). BRANCH=None BUG=None TEST=Booted Pinky, Blaze and Falco, confirmed that all timestamps show up and contained sane values. Booted Storm (no timestamps here since it doesn't support pre-RAM timestamps yet). Change-Id: I7f4d6aba3ebe3db0d003c7bcb2954431b74961b3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7a2ce81722aba85beefcc6c81f9908422b8da8fa Original-Change-Id: I5979bfa9445a9e0aba98ffdf8006c21096743456 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/234063 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9608 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-14rk3288: Add CBMEM console support and fix RETURN_FROM_VERSTAGEJulius Werner
Since we can now reduce our vboot2 work buffer by 4K, we can use all that hard-earned space for the CBMEM console instead (and 4K are unfortunately barely enough for all the stuff we dump with vboot2). Also add console_init() and exception_init() to the verstage for CONFIG_RETURN_FROM_VERSTAGE, which was overlooked before (our model requires those functions to be called again at the beginning of every stage... even though some consoles like UARTs might not need it, others like the CBMEM console do). In the !RETURN_FROM_VERSTAGE case, this is expected to be done by the platform-specific verstage entry wrapper, and already in place for the only implementation we have for now (tegra124). (Technically, there is still a bug in the case where EARLY_CONSOLE is set but BOOTBLOCK_CONSOLE isn't, since both verstage and romstage would run init_console_ptr() as if they were there first, so the romstage overwrites the verstage's output. I don't think it's worth fixing that now, since EARLY_CONSOLE && !BOOTBLOCK_CONSOLE is a pretty pointless use-case and I think we should probably just get rid of the CONFIG_BOOTBLOCK_CONSOLE option eventually.) BRANCH=None BUG=None TEST=Booted Pinky. Change-Id: I87914df3c72f0262eb89f337454009377a985497 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 85486928abf364c5d5d1cf69f7668005ddac023c Original-Change-Id: Id666cb7a194d32cfe688861ab17c5e908bc7760d Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/232614 Reviewed-on: http://review.coreboot.org/9607 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-14CBFS: Correct ROM_SIZE for ARM boards, use CBFS_SIZE for cbfstoolJulius Werner
Some projects (like ChromeOS) put more content than described by CBFS onto their image. For top-aligned images (read: x86), this has traditionally been achieved with a CBFS_SIZE Kconfig (which denotes the area actually managed by CBFS, as opposed to ROM_SIZE) that is used to calculate the CBFS entry start offset. On bottom-aligned boards, many define a fake (smaller) ROM_SIZE for only the CBFS part, which is not consistently done and can be an issue because ROM_SIZE is expected to be a power of two. This patch changes all non-x86 boards to describe their actual (physical) ROM size via one of the BOARD_ROMSIZE_KB_xxx options as a mainboard Kconfig select (which is the correct place to declare unchangeable physical properties of the board). It also changes the cbfstool create invocation to use CBFS_SIZE as the -s parameter for those architectures, which defaults to ROM_SIZE but gets overridden for special use cases like ChromeOS. This has the advantage that cbfstool has a consistent idea of where the area it is responsible for ends, which offers better bounds-checking and is needed for a subsequent fix. Also change the FMAP offset to default to right behind the (now consistently known) CBFS region for non-x86 boards, which has emerged as a de-facto standard on those architectures and allows us to reduce the amount of custom configuration. In the future, the nightmare that is ChromeOS's image build system could be redesigned to enforce this automatically, and also confirm that it doesn't overwrite any space used by CBFS (which is now consistently defined as the file size of coreboot.rom on non-x86). CQ-DEPEND=CL:231576,CL:231475 BRANCH=None BUG=chromium:422501 TEST=Built and booted on Veyron_Pinky. Change-Id: I89aa5b30e25679e074d4cb5eee4c08178892ada6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: e707c67c69599274b890d0686522880aa2e16d71 Original-Change-Id: I4fce5a56a8d72f4c4dd3a08c129025f1565351cc Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/229974 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9619 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-13Fix dependency issue in Chrome OS vendor codeStefan Reinauer
make *config was complaining about mainboards selecting a virtual dev switch when CONFIG_CHROMEOS is not enabled. While the long term cleanup should be to move the option out of CONFIG_CHROMEOS and make it not be a user changeable option, this approach is contained to vendorcode/ and gets rid of the warning. Change-Id: Id090eb31d1307af7a0d1f9fbe641534dc24b24a9 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/9301 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13vboot: remove vboot_handoff.h from chromeos.hDaisuke Nojiri
chromeos.h includes vboot_handoff.h, which includes vboot_api.h. since vboot_api.h is not available to non-chromeos projects, build fails for some boards (e.g. glados). this change removes (unnecessary) inclusion of vboot_handoff.h in chromeos.h and fixes other files which rely on indirect inclusion of vboot_handoff.h by making it direct. BUG=none BRANCH=tot TEST=built for cosmos, falco, lumpy, nyan_blaze, parrot, rambi, rush_ryu, samus, storm, veyron_pinky Change-Id: I465e3657c6a0944bc75a669e5e52e74d46b3ec6c Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 6ace70d721aceae9257288815ce8fd7c6c74b8f5 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I12612773372e358584d12fffaf5f968a46083fab Original-Reviewed-on: https://chromium-review.googlesource.com/245864 Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9566 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13vboot2: Fill vboot1 handoff with correct TPM firmware versionJulius Werner
sd->fw_version represents the version of the *current* firmware, which is not necessarily the same as the one stored in the TPM (and may be 0 in recovery mode). Use the newly added sd->fw_version_secdata instead which contains a more correct value. CQ-DEPEND=CL:244601 BRANCH=veyron BUG=chrome-os-partner:35941 TEST=Booted Jerry in recovery mode, confirmed crossystem tpm_fwver was corrent (and not 0). Change-Id: I30f5998da5ac518d6fcb7a651eba4e1fabc14478 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: eb8142f69cea34e11f9081caafcaae7a15cc3801 Original-Change-Id: Id95bd8c6412f2e8b2ae643c3b5a3dee13d0d47be Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/244591 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: http://review.coreboot.org/9565 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13The vboot_reference fwlib2 target has changed to fwlib20Bill Richardson
There are multiple vboot APIs (1.0, 2.0, 2.1). We have to be explicit about which library we want to link with. When building firmware, the vboot_reference Makefile should be invoked in one of three ways: TARGET OUTPUT VERSION fwlib vboot_fw.a 1.0 fwlib20 vboot_fw20.a 2.0 fwlib21 vboot_fw21.a 2.1 BUG=chromium:228932 BRANCH=ToT CQ-DEPEND=CL:243980 TEST=manual emerge-veyron_pinky vboot_reference coreboot emerge-samus vboot_reference coreboot emerge-daisy_spring vboot_reference chromeos-u-boot Change-Id: I7dde513c49b8148bf46e8768ae438e1a85af4243 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 5e339cadad4815f061d4e5e20a9c9733f64cc90b Original-Change-Id: I850646117211930d9215693c48f2c30d55a984d3 Original-Signed-off-by: Bill Richardson <wfrichar@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/243981 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: http://review.coreboot.org/9564 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13chromeos: add get_recovery_mode_from_vbnv() to vbnv_flashDavid Hendricks
The first platform that used flash-backed VBNV data has a physical recovery switch, get_recovery_mode_from_vbnv() was never implemented. This patch adds get_recovery_mode_from_vbnv() similarly to how it's implemented for other vbnv storage in other places. BUG=chrome-os-partner:34436 BRANCH=none TEST=needs testing Change-Id: Ifd795c5c1ff0f23619fd2125b4795571af03ece1 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 09f1bf96089bf9d159e4220c1f4d99388d709545 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I9cf18c988eaa4b7e720d6c66a02b1c5c63b473e9 Original-Reviewed-on: https://chromium-review.googlesource.com/239978 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9563 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13chromeos: Reverse FMAP signature constant to avoid having it in .rodataJulius Werner
Even though coreboot always hardcodes the FMAP offset, the same is not possible for all other tools that manipulate ROM images. Some need to manually find the FMAP by searching for it's magic number (ASCII "__FMAP__"). If we do something like 'memcmp(fmap_buffer, "__FMAP__", ...) in coreboot code, it has the unfortunate side effect that the compiler will output that very same magic number as a constant in the .rodata section to compare against. Other tools may mistake this for the "real" FMAP location and get confused. This patch reverses the constant defined in coreboot and changes the only use of it correspondingly. It is not impossible but extremely unlikely (at the current state of the art) that any compiler would be clever enough to understand this pattern and optimize it back to a straight memcmp() (GCC 4.9 definitely doesn't), so it should solve the problem at least for another few years/decades. BRANCH=veyron BUG=chromium:447051 TEST=Made sure the new binaries actually contain "__PAMF__" in their .rodata. Booted Pinky. Independently corrupted both the first and the last byte of the FMAP signature with a hex editor and confirmed that signature check fails in both cases. Change-Id: I314b5e7e4d78352f409e73a3ed0e71d1b56fe774 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 1359d2d4502eb34a043dffab35cf4a5b033ed65a Original-Change-Id: I725652ef2a77f7f99884b46498428c3d68cd0945 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/240723 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/9562 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13vbnv flash: use proper SPI flash offset for NVRAMVadim Bendebury
The current vbnv flash code mistakenly uses the offset into the NVRAM area as the absolute offset into the SPI NOR. This causes overwrites RO section of the flash (when it is not protected) and causes failures to retrieve the NVRAM contents by the user space apps. This patch makes sure that the correct offset is used when accessing NVRAM area in the SPI flash. BRANCH=storm BUG=chrome-os-partner:35316 TEST=run the update code on storm. - no more RO section corruption observed - running 'crossystem recovery_request=1' at Linux prompt causes the next boot happen in recovery mode Change-Id: Iba96cd2e0e5e01c990f8c1de8d2a2233cd9e9bc9 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 9fd15ff4b7aa77536723edbb94fa81f0ae767aed Original-Change-Id: I86fe4b9a35f7c16b72abf49cfbfcd42cc87937e3 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/240143 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: http://review.coreboot.org/9561 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13chromeos: Move common VBNV offsets to a headerDavid Hendricks
Some common VBNV variable offsets were defined in multiple vbnv_* source files. This moves them to a header so that we can avoid duplicating them in the future. BUG=none BRANCH=none TEST=compiled for nyan_blaze and rambi Change-Id: Ic292e546b665b40678b4de598783c1f6bfa35426 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: fd776f303a3d057d4b70997e7bb6bc85767e2278 Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: Ifcc13c90a910b86d4f9bb0027d913572c1d6d00b Original-Reviewed-on: https://chromium-review.googlesource.com/239977 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Reviewed-on: http://review.coreboot.org/9560 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13vboot1: Set BEFORE_OPROM_LOAD flag for VbInit()Duncan Laurie
This sets the new VB_INIT_FLAG_BEFORE_OPROM_LOAD flag for VbInit() to indicate that we are running from early firmware before option rom loading has occurred so it can do the right thing when it checks whether or not to tell the system to reboot after setting the VbNv flag. BUG=chrome-os-partner:32379 BRANCH=samus TEST=pass FAFT tests on samus Change-Id: Id432dc154736baa799d9ddf5a6a25bccc66217ef Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 8a576b0bf4b912f85a4e82bfe2cf13c838a069cc Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Change-Id: I6968fcb6cda74e88f56bea6ea9bbf77cc795b8d6 Original-Reviewed-on: https://chromium-review.googlesource.com/230887 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9559 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13vboot1: Fix compilation error with CONFIG_ARCH_ROMSTAGE_ARM64 enabledYidi Lin
make: *** No rule to make target `build/lib/memset.rmodules.o', needed by `build/vendorcode/google/chromeos/vboot1/vbootstub.elf'. Stop. Fix the error by refering to ./src/arch/arm64/Makefile.inc: rmodules_arm64-y += ../../lib/memset.c rmodules_arm64-y += ../../lib/memcpy.c BRANCH=none BUG=none TEST=build pass on our own MT8173 board Change-Id: Ic870136db1ec9405e3d30caf6085f056bc46a5c2 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: d317dbe8732abbf7e785466e7d1e07425aac326f Original-Change-Id: I69a7db83154a23f7878e9c604c9b541fb6fa308d Original-Reviewed-on: https://chromium-review.googlesource.com/237974 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Reviewed-on: http://review.coreboot.org/9591 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-13vboot2: use offset to vboot2 work buffer instead of absolute addressDaisuke Nojiri
this change makes vb2_working_data struct point to the vboot work buffer by the offset instead of by the absolute address, which can be different depending on the context (e.g. subprocessor v.s. main cpu). BUG=none BRANCH=tot TEST=booted veyron pinky Change-Id: I2191ca756c4f49441b3a357338f9c84564b58918 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 93f8b1da2b2c81aa3a33892987a71e9e1e7a8eff Original-Change-Id: I4e4c12613304586b7395c5173cf08b8093f59521 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/236583 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9588 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10fmap: allocate memory as much as discovered fmap sizeDaisuke Nojiri
fmap_find used to read 4096 bytes from the fmap offset blindly. instead, we read the fmap header first to calcurate the size of the fmap. Then, we read flash again exactly as much as the discovered fmap. BUG=none BRANCH=ToT TEST=Booted Storm and Peppy. Built all current boards. Change-Id: Iaa50c1bc3401c77b433af11406d4b9d2e4e722e8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 755ff66ab0a4d05e6d5410c11a6badb9fcb77a0d Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ie5058d181e6565acb70bf108464682dd0e6c1f64 Original-Reviewed-on: https://chromium-review.googlesource.com/231685 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9556 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-10vboot: Remove unused 2lib header pathRandall Spangler
Before the change to use vb2_api.h, coreboot needed to know where to find the vboot2 header files. Now those are all included by vb2_api.h, so coreboot doesn't need to know about firmware/2lib/include (and in fact, the 2lib directory is about to go away). BUG=chromium:423882 BRANCH=none TEST=emerge-veyron_pinky coreboot Original-Change-Id: I7f69ca9cf8d45c325219efceca0cb8d1340f7736 Original-Signed-off-by: Randall Spangler <rspangler@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/233223 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit b4d4a2da1c8b5a5f8f8da51f009227d3a616b096) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I4006f38835ea0f927142a8133bc24caaf2b7a214 Reviewed-on: http://review.coreboot.org/9447 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10vboot: Include vb2_api.h, instead of lower-level vboot2 header filesRandall Spangler
This will allow vboot2 to continue refactoring without breaking coreboot, since there's now only a single file which needs to stay in sync. BUG=chromium:423882 BRANCH=none TEST=emerge-veyron_pinky coreboot CQ-DEPEND=CL:233050 Original-Change-Id: I74cae5f0badfb2d795eb5420354b9e6d0b4710f7 Original-Signed-off-by: Randall Spangler <rspangler@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/233051 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit df55e0365de8da85844f7e7b057ca5d2a9694a8b) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I999af95ccf8c326f2fd2de0f7da50515e02ad904 Reviewed-on: http://review.coreboot.org/9446 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10vboot2: Reduce minimum required work buffer sizeJulius Werner
Apparently our initial submission of 16K was a little too generous for the vboot2 work buffer, and I hear that we should also be well within bounds for 12K. This patch reduces the minimum asserted by memlayout so some of our low-mem boards can get a few more kilobytes back for discretionary spending. Also changes the required minimum alignment to 8 since that's what the current vboot code aligns it to anyway, and add a warning comment to make it clearer that this is a dangerous number people should not be playing with lightly. BRANCH=None BUG=None TEST=Built and booted on Pinky. Original-Change-Id: Iae9c74050500a315c90f5d5517427d755ac1dfea Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/232613 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 64e972f10363451cd544fdf8642bd484463703bc) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I362b8c33cf79534bb76bd7acda44d467563fe133 Reviewed-on: http://review.coreboot.org/9445 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10vboot: add physical recovery switch supportDaisuke Nojiri
PHYSICAL_REC_SWITCH is set n by default and y for panther and stumpy. BUG=none BRANCH=ToT TEST=Built nyan_blaze using vboot1/2. Built falco, lumpy, nyan, blaze, parrot, rambi, samus, storm, pinky with default configuration. panther and stumpy are not tested because they currently don't build on ToT. Original-Change-Id: Ic45f78708aaa7e485d2ab459fd1948524edb412f Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/227940 Original-Reviewed-on: https://chromium-review.googlesource.com/229602 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit edb2ba347b48887ffe450586af0351e384faad59) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I277f665cd4f3e1c21745cdc5c7a2cfe148661abe Reviewed-on: http://review.coreboot.org/9444 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10vboot2: update fw_version_tpm when creating vboot1 shared dataDaisuke Nojiri
This changes copies firmware version from vboot2 shared data to vboot1 shared data. This fixes FAFT firmware_TPMVersionCheck test. BUG=none BRANCH=ToT TEST=firmware_TPMVersionCheck passed on Nyan Kitty. Original-Change-Id: Idfd282931421dc16cd1aa82c7ccb6c6790a4d0d7 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/230186 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Tested-by: Yen Lin <yelin@nvidia.com> (cherry picked from commit 1f590741893bee75d872184eba01c62e92455816) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I205b651976d047923815efcd45b114cc7bf866e4 Reviewed-on: http://review.coreboot.org/9443 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10ramoops: Add support for passing ramoops region through cb tables.Furquan Shaikh
CQ-DEPEND=CL:228856 BUG=chrome-os-partner:33676 BRANCH=None TEST=ramoops buffer verified on ryu. Original-Change-Id: I29584f89ded0c22c4f255a40951a179b54761053 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/228744 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit e8b2c8b75c51160df177edc14c90e5bd3836e931) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I5fdeb59056945a602584584edce9c782151ca8ea Reviewed-on: http://review.coreboot.org/9442 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10chromeos: Add correct dependency on HAVE_ACPI_TABLES for gvns and ramoops.Furquan Shaikh
CQ-DEPEND=CL:228856 BUG=chrome-os-partner:33676 BRANCH=None TEST=Compiles successfully for samus, link, rush_ryu. Original-Change-Id: I8499cab5dd08981a558688964b99b65d78bde476 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/228743 Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit e6aa03752ba8c22b303f3fa590cbc9cf938872ef) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ib229756d8dece6f5670460702413f74bc2c692df Reviewed-on: http://review.coreboot.org/9441 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10vboot: reduce references to parent's files in MakefilesDaisuke Nojiri
this change also allows vboot1 code to use flash as nvram device. BUG=none BRANCH=ToT TEST=Built nyan_blazw using vboot1/2. Built falco, lumpy, nyan, blaze, parrot, rambi, samus, storm, pinky with default configuration. Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ie97a4436d4fc10851a535adfdb45c4d499e45b5d Original-Reviewed-on: https://chromium-review.googlesource.com/229598 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 8ac8ff28bab1337782e8694275bb2c644b86f38a) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ief087fedbf29b4b82c1668ad5603c121323dcbf2 Reviewed-on: http://review.coreboot.org/9440 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10vboot: fix invalid check for the returned value from spi_flash->writeDaisuke Nojiri
spi_flash->write returns non-zero on error and zero on success, not the number of bytes written. BUG=none BRANCH=ToT TEST=Booted storm. Verified successfully nvdata was saved. Original-Change-Id: If50cc1a62a4f06398d1830cca60085b6f925fff3 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/229389 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 1e8cdbdb07e99c3f72c35f76d68144f46107acd9) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I216e97f734da8d4b52c2da8329f4143b7b0656cd Reviewed-on: http://review.coreboot.org/9439 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10vboot: adding VBSD_BOOT_FIRMWARE_WP_ENABLED logicGediminas Ramanauskas
BUG=chrome-os-partner:33395 BRANCH=none TEST=emerge and test using crossystem Original-Change-Id: I0d49f85219d45c837a7100e0195bef86da2c6cdd Original-Signed-off-by: Gediminas Ramanauskas <gedis@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/227546 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 5a2868e04140973691136adfd7d9e6d1aa1f6dae) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I93c1ea9ce1270c2c143fd44ead2291dfbc114c00 Reviewed-on: http://review.coreboot.org/9437 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10fmap: use CBFS for all other than x86 platformsVadim Bendebury
The architectiure check in fmap.c is in fact used to delineate between platforms where SPI flash is mapped to memory address space and where it needs to be accessed through CBFS. In fact cosmos board uses an ARM SOC which also maps SPI flash to processor address space, this will have to be addressed when that SOC's support is introduced, for now let's just presume that all but X86 platforms require CBFS layer to access fmap. BRANCH=none BUG=chrome-os-partner:31438 TEST=none Original-Change-Id: Id135dc63278555a7fc5039a568fb28864f7cb8d1 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/226180 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit b3c04f84504380066c54a6dec93781a4f25a5fc6) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I3a0a70fe583b69b1c9cd8729817bd7062126e1a9 Reviewed-on: http://review.coreboot.org/9436 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2015-04-10chromeos: Add a function to copy VPD WiFi calibration data to CBMEMVadim Bendebury
This patch adds functions looking in the VPD for WiFi calibration data, and if found, copying the calibration blobs into CBMEM. Two possible key names templates are used: wifi_base64_calibrationX and wifi_calibrationX, where X is replaced by the WiFi interface number. Up to four interfaces can be provisioned. The calibration data will be retrieved from CBMEM by the bootloader and placed into the device tree before starting the kernel. The structure of the WiFi calibration data CBMEM entry is defined locally: it is a concatenation of the blob names and their contents. Each blob is padded as necessary to make sure that the size divisible by four. To make sure that the exactly required amount of memory is allocated for the CBMEM entry, the function first scans the VPD, caching the information about the available blobs and calculating their combined size. Then the required size CBMEM entry is allocates and the blobs are copied into it. BRANCH=storm BUG=chrome-os-partner:32611 TEST=when this function is called, and the VPD includes calibration data blobs, the WIFI entry shows up in the list of CBMEM entries reported by coreboot. Original-Change-Id: Ibe02dc36ff6254e3b9ad0a5bd2696ca29e1b2be3 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/225271 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 9fe185ae5fdc1a896bf892b498bff27a3462caeb) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ia60f0c5c84decf9854426c4f0cb88f8ccee69046 Reviewed-on: http://review.coreboot.org/9435 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10vboot: move vboot files to designated directoryDaisuke Nojiri
This moves vboot1 and vboot2 files to their designated directory. Common code stays in vendorcode/google/chromeos. BUG=none BRANCH=none TEST=built cosmos, veyron_pinky, rush_ryu, nyan_blaze, samus, parrot, lumpy, daisy_spring, and storm. Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ia9fb41ba30930b79b222269acfade7ef44b23626 Original-Reviewed-on: https://chromium-review.googlesource.com/222874 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit cbfef9ad40776d890e2149b9db788fe0b387d210) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: Ia73696accfd93cc14ca83516fa77f87331faef51 Reviewed-on: http://review.coreboot.org/9433 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-10vendorcode/amd/agesa/f16kb: Enable support for AM1 socketSergej Ivanov
Adds option FORCE_AM1_SOCKET_SUPPORT to disable package type mismatch check between cpu and northbridge. Default agesa for kabini doesn't know about AM1 socket so it returns FALSE, that stops memory config code. With this hack current agesa version supports the AM1 socket. Change-Id: I99e9cec5cd558087092cf195094df20489f6d3b5 Signed-off-by: Sergej Ivanov <getinaks@gmail.com> Reviewed-on: http://review.coreboot.org/9291 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-04-10chromeos: add another VPD access APIVadim Bendebury
The new API allows to find VPD objects in the VPD cache. There is no need for the caller to allocate or free the per object memory. The existing API (cros_vpd_gets) now uses the new function as well. BRANCH=storm BUG=chrome-os-partner:32611 TEST=verified that MAC addresses still show up in the device tree on the booted storm device Change-Id: Id06be315981cdaa2285fc1ec61b96b62b1178a4b Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 99a34344448a5521cee8ad3918aefb1fde28417d Original-Change-Id: I6c0b11bb844d6235930124d642da632319142d88 Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/225258 Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/9403 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-10chromeos: move VPD MAC address retrieval functionVadim Bendebury
Retrieval of the MAC address from the VPD is a Chrome OS specific feature, required just on one platform so far. There is no need to look for the MAC address in the VPD on all other Chrome OS boards. BRANCH=storm BUG=chromium:417117 TEST=with the upcoming patch applied verified that MAC addresses still show up in the device tree on storm Change-Id: If5fd4895bffc758563df7d21f38995f0c8594330 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: fb4906ac559634321a01b4814f338611b9e98b2b Original-Change-Id: I8e6f8dc38294d3ab11965931be575360fd12b2fc Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/223796 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9398 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-04-07cbfs: Enforce media->map() result checking, improve error messagesJulius Werner
If you try to boot a VBOOT2_VERIFY_FIRMWARE with less than 4K CBFS cache right now, your system will try and fail to validate the FMAP signature at (u8 *)0xFFFFFFFF and go into recovery mode. This patch avoids the memcmp() to potentially invalid memory, and also adds an error message to cbfs_simple_buffer_map() to make it explicit that we ran out of CBFS cache space. BUG=None TEST=Booted on Veyron_Pinky with reduced CBFS cache, saw the message. Original-Change-Id: Ic5773b4e0b36dc621513f58fc9bd29c17afbf1b7 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/222899 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 0ed3c0c2b63be0d32e8162faf892e41cef1f1f23) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I20ccac83bff4a377caca6327d0e21032efff44c1 Reviewed-on: http://review.coreboot.org/9373 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-04-06New mechanism to define SRAM/memory map with automatic bounds checkingJulius Werner
This patch creates a new mechanism to define the static memory layout (primarily in SRAM) for a given board, superseding the brittle mass of Kconfigs that we were using before. The core part is a memlayout.ld file in the mainboard directory (although boards are expected to just include the SoC default in most cases), which is the primary linker script for all stages (though not rmodules for now). It uses preprocessor macros from <memlayout.h> to form a different valid linker script for all stages while looking like a declarative, boilerplate-free map of memory addresses to the programmer. Linker asserts will automatically guarantee that the defined regions cannot overlap. Stages are defined with a maximum size that will be enforced by the linker. The file serves to both define and document the memory layout, so that the documentation cannot go missing or out of date. The mechanism is implemented for all boards in the ARM, ARM64 and MIPS architectures, and should be extended onto all systems using SRAM in the future. The CAR/XIP environment on x86 has very different requirements and the layout is generally not as static, so it will stay like it is and be unaffected by this patch (save for aligning some symbol names for consistency and sharing the new common ramstage linker script include). BUG=None TEST=Booted normally and in recovery mode, checked suspend/resume and the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies with ToT and looked for red flags. Change-Id: Ifd2276417f2036cbe9c056f17e42f051bcd20e81 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: f1e2028e7ebceeb2d71ff366150a37564595e614 Original-Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/213370 Reviewed-on: http://review.coreboot.org/9283 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-04-06Add predefined __ROMSTAGE__ and __RAMSTAGE__ macrosJulius Werner
This patch adds the macros __ROMSTAGE__ and __RAMSTAGE__ which get predefined in their respective stages by make, so that we have one specific macro for every stage. It also renames __BOOT_BLOCK__ and __VER_STAGE__ to __BOOTBLOCK__ and __VERSTAGE__ for consistency. This change is intended to provide finer control and clearer communication of intent after we added a new (optional) stage that falls under __PRE_RAM__, and will hopefully provide some robustness for the future (we don't want to end up always checking for romstage with #if defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__) && !defined(__VER_STAGE__) && !defined(__YET_ANOTHER_PRERAM_STAGE__)). The __PRE_RAM__ macro stays as it is since many features do in fact need to differentiate on whether RAM is available. (Some also depend on whether RAM is available at the end of a stage, in which case #if !defined(__PRE_RAM__) || defined(__ROMSTAGE__) should now be authoritative.) It's unfeasable to change all existing occurences of __PRE_RAM__ that would be better described with __ROMSTAGE__, so this patch only demonstratively changes a few obvious ones in core code. BUG=None TEST=None (tested together with dependent patch). Change-Id: I6a06d0f42c27a2feeb778a4acd35dd14bb53f744 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: a4ad042746c1d3a7a3bfda422d26e0d3b9f9ae42 Original-Change-Id: I6a1f25f7077328a8b5201a79b18fc4c2e22d0b06 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/219172 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9304 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-04-04build system: rename __BOOT_BLOCK__ and __VER_STAGE__Patrick Georgi
Drop the inner underscore for consistency. Follows the commit stated below. Change-Id: I75cde6e2cd55d2c0fbb5a2d125c359d91e14cf6d Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Based-on-Change-Id: I6a1f25f7077328a8b5201a79b18fc4c2e22d0b06 Based-on-Signed-off-by: Julius Werner <jwerner@chromium.org> Based-on-Reviewed-on: https://chromium-review.googlesource.com/219172 Reviewed-on: http://review.coreboot.org/9290 Reviewed-by: Aaron Durbin <adurbin@google.com> Tested-by: build bot (Jenkins)
2015-04-02vboot: add vbnv flash driverDaisuke Nojiri
this adds a driver for vboot to read and write nvdata in spi flash. it's assumed that flash contents are erased to 1-bits and write operations can only change 1-bits to 0-bits. when all nvram space is used, the driver will erase the whole block and start the next write from the beginning. BUG=chrome-os-partner:32774 BRANCH=ToT TEST=Built for cosmos. Change-Id: I40858f847151aa0770e1101e905476d270550f60 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 09713828b7b0cabd13a08de3f34e32bc4dbef4a4 Original-Change-Id: Ia9049f342b21fa4c289cb7b9254ab89ec1ef1699 Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/226525 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9229 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-04-01chromeos: INCLUDES was renamed to CPPFLAGS_commonPatrick Georgi
Change-Id: I39841c5358c53e6d2325d1304fd6cdfadb7f7ac4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9173 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-30build system: provide generic compiler flag variablesPatrick Georgi
Introduce generic-$(type)-ccopts and $(class)-generic-ccopts to declare compiler flags that apply to all files of a certain type or of a certain class. Then use them. This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I655688e82a0cc5bad89b6f55dc217b9f66b64604 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner@chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9114 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-29build system: remove intermediate link step in vbootPatrick Georgi
This is inspired by the commit listed below, but rewritten to match upstream, and split in smaller pieces to keep intent clear. Change-Id: I5405c0ee6bee203281e723feaecaee57fad8f6cb Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b Based-On-Signed-off-by: Julius Werner <jwerner@chromium.org> Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170 Reviewed-on: http://review.coreboot.org/9109 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-26Chrome OS vendorcode: Fix vboot_reference compilationStefan Reinauer
Includes moved into $(CPPFLAGS_*), so add that to VBOOT_CFLAGS. Shift vboot build parameters from the environment to be make parameters, and use $(MAKE) instead of make to fix non-Linux build systems. Change-Id: I5aee9935ab36ad571fbcf9f6fa8d8ace2bac16b3 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/8703 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-24rk3288: update romstage & mainboardhuang lin
BUG=chrome-os-partner:29778 TEST=Build coreboot Change-Id: I877b4bf741f45f6cfd032ad5018a60e8a1453622 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 640da5ad5597803c62d9374a1a48832003077723 Original-Change-Id: I805d93e94f73418099f47d235ca920a91b4b2bfb Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Original-Signed-off-by: huang lin <hl@rock-chips.com> Original-Reviewed-on: https://chromium-review.googlesource.com/209469 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Tested-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/8867 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24vboot: Add support for OPROM_MATTERS and SLOW_ECDuncan Laurie
In order to display a "update in progress" screen on devices with a slow EC or PD chip it may be necessary to also load the VGA Option ROM when doing EC software sync. This adds config options for VBOOT_EC_SLOW_UPDATE which simply sets a flag in the input parameters that is already handled by vboot. It also adds a config option for VBOOT_OPROM_MATTERS which is a bit more tricky in that it sets a flag in input parameters, but also needs to keep track of the option rom being loaded and pass that flag into VbInit as well. Since VbInit will clear the NV bit for option rom loaded the check that is done in vboot_wants_oprom() needs to first compare against the vboot handoff copy of the input flags. BUG=chrome-os-partner:32379 BRANCH=samus TEST=manual testing: 1) in normal mode, with EC/PD in RW, ensure that they are rebooted to RO and the VGA Option ROM is loaded and the wait screen is displayed, and then the system is rebooted at the end and the VGA Option ROM is not loaded. 2) same as #1 with EC/PD in RO already, same result 3) same as #1 with system in developer mode, same result except there is no reboot at the end of software sync 4) same as #1 with system in developer mode and EC/PD in RO, ensure that there is no extra reboot at the beginning or end of software sync. Original-Change-Id: Ic2b34bf9e7c6cc5498413fa1b8dff6e6207c9d0a Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/223831 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 7d7aa89238efb5081885f9386c8e872fc96f573f) Change-Id: Ib7fb24e6e80e1f7e836bc62246ab9b3e056fd73d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8887 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-03-24vboot: add vbnv_flash as templateDaisuke Nojiri
this adds a flash vbnv driver for vboot to store non-volatile data in a flash storage. BUG=chrome-os-partner:32774 BRANCH=none TEST=Built samus, veyron pinky, and cosmos Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: If5fc1b779722528134ad283fa030f150b3bab55f Original-Reviewed-on: https://chromium-review.googlesource.com/222258 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 1916da67123680d379d8926380d797cf466b7994) Change-Id: If5ff3542cc14139ec0b02cf5661c42a1b02da23e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8886 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24vboot2: factory-initialize kernel space in tpmDaisuke Nojiri
this change makes coreboot initialize kernel space and backup space in the tpm when no firmware space is found in the tpm. BUG=chrome-os-partner:32410 TEST=Forced factory initialization and verified it went through without errors. BRANCH=None Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I777e3cb7004870c769163827543c83665d3732b9 Original-Reviewed-on: https://chromium-review.googlesource.com/220412 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit d8c0c407bf0fed60d76441ada7bedd36f6fc3a38) Change-Id: Icc3779125262b4499e47781991ebbf584abf074a Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8885 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24vboot2: avoid fall through when hard_reset is not implementedDaisuke Nojiri
this change makes prevent execution from falling through to unverified code when hard_reset is not implemented. it also includes a few touch-ups. BUG=None TEST=Booted Veyron Pinky. Verified firmware selection in the log. BRANCH=None Original-Change-Id: I9b02ab766172a62c98b434c29f310bc4a44f342d Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/219625 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit d1f5207d83d2247b55f2bb9d02ac843305fc3ded) Change-Id: I99dd5a2ca3a5369accb14408ea9d266bf60e7132 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8884 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24vboot2: load decompressed stage directly to load addressDaisuke Nojiri
this change allows vboot_load_stage to load a decompressed stage directly to the load address without using the cbfs cache. BUG=None TEST=Booted Nyan Blaze. BRANCH=None Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I76530276ff9a87b44f98a33f2c34bd5b2de6888f Original-Reviewed-on: https://chromium-review.googlesource.com/219028 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 0ad6f7fee9df31e1b35d4df9a8c373516416a235) Change-Id: I7abdbdda0cc549894dfb9d599a576bba0a4fadfc Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8883 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-24vboot2: Make struct vb2_working_data cpu architecture agnosticDaisuke Nojiri
this allows vb2_working_data to be accessed from stages running on different cpu architectures. BUG=none TEST=Built firmware for Blaze with USE=+/-vboot2. Ran faft on Blaze. BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ife2844637af8bf9e0d032a50fb516d98b8f80497 Original-Reviewed-on: https://chromium-review.googlesource.com/217835 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 2b36749bc5a761003f00b7a0d17edb1629245b88) Change-Id: Idc10f23ed2927717f5308f0112aa8113a683010e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8882 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24vboot2: separate verstage from bootblockDaisuke Nojiri
With CONFIG_RETURN_FROM_VERSTAGE false, the verstage loads the romstage over the bootblock, then exits to the romstage. this is necessary for some SOC (e.g. tegra124) which runs the bootblock on a different architecture. With CONFIG_RETURN_FROM_VERSTAGE true, the verstage returns to the bootblock. Then, the bootblock loads the romstage over the verstage and exits to the romstage. this is probably necessary for some SOC (e.g. rockchip) which does not have SRAM big enough to fit the verstage and the romstage at the same time. BUG=none TEST=Built Blaze with USE=+/-vboot2. Ran faft on Blaze. BRANCH=none Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I673945c5e21afc800d523fbb25d49fdc83693544 Original-Reviewed-on: https://chromium-review.googlesource.com/212365 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Note: This purposefully is probably broken in vendorcode/google/chromeos as I'm just trying to set a base for dropping more patches in. The vboot paths will have to change from how they are currently constructed. (cherry picked from commit 4fa17395113d86445660091413ecb005485f8014) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I9117434ce99695f9b7021a06196d864f180df5c9 Reviewed-on: http://review.coreboot.org/8881 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-24nyans: reduce code duplication in bootblock and romstagesDaisuke Nojiri
this change reduces the code duplication of the bootblock and the romstages for Nyans. BUG=none TEST=Built Nyan, Big, and Blaze. Ran faft on Blaze. BRANCH=none Original-Signed-off-by: dnojiri@chromium.org (Daisuke Nojiri) Original-Change-Id: Ieb9dac3b061a2cf46c63afb2f31eb67ab391ea1a Original-Reviewed-on: https://chromium-review.googlesource.com/214050 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit f3413d39458f03895fe4963a41285f71d81bcf5f) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I912f63b12321aa26a7add302fc8a6c4e607330ef Reviewed-on: http://review.coreboot.org/8880 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-23vboot: Introduce kconfig variable for VBNV backing storageDavid Hendricks
This introduces a new kconfig variable to select the VBNV backing store explicitly instead of inferring it from CPU/SoC architecture. x86 platforms have historically relied only on CMOS to store VBNV variables, while ARM-based platforms have traditionally relied on the EC. Neither of those solutions are going to scale well into the future if/when CMOS disappears and we make ARM-based systems without an EC. BUG=chrome-os-partner:29546 BRANCH=none TEST=compiled for nyan_blaze and samus Original-Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I4a8dadfb6bb666baf1ed4bec98b29c145dc4a1e7 Original-Reviewed-on: https://chromium-review.googlesource.com/213877 Original-Reviewed-by: Stefan Reinauer <reinauer@google.com> Original-Commit-Queue: Vadim Bendebury <vbendeb@chromium.org> Original-Tested-by: Vadim Bendebury <vbendeb@chromium.org> (cherry picked from commit d088fc71b2e2b45e826d3dedb8e536ad58b8d296) Change-Id: Iea325a8c4d07055143e993d89b827f86b8312330 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8777 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-23vboot: Update VBOOT_CFLAGS to include rmodules ccoptsFurquan Shaikh
rmodules ccopts contain information about specific arch like armv4,v7. Hence, it is important to include them in VBOOT_CFLAGS BUG=None BRANCH=None TEST=Compiles correctly for armv4 in rush Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Id: Original-Change-Id: I8f5509f753e28046678c3782d6f0b6210559f798 Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/209979 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> Original-Tested-by: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit ca9f2f86ff1bc445abf5f97f61c04b6eccbd3e25) Change-Id: I6cd7c47f33cf897d8ee96e7154222b3bfbe5221f Reviewed-on: http://review.coreboot.org/8775 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-03-23vboot2: translate shared data to hand off to depthchargeDaisuke Nojiri
TEST=Built Blaze with USE=+/-vboot2. Ran faft: CorruptBothFwAB, CorruptBothFWSigAB, CorruptFwBodyA/B, CoccurptFwSigA/B, DevBootUSB, DevMode, TryFwB, UserRequestRecovery, SelfSignedBoot, RollbackFirmware. BUG=None BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I45a1efd4d55fde37cc67fc02642fed0bc9366469 Original-Reviewed-on: https://chromium-review.googlesource.com/205236 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 0a9e7f099251c33ce286fa8d704a3e021eac4d3e) Change-Id: I5f61c03c66ca83a5837c14378905ba178aba5300 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8655 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-03-23chromeos: rename for easier patch mergingAaron Durbin
In order to more cleanly apply upcoming changes some files will need to do a dance. Change-Id: Ib50670743c10221785447490190ecdbff8c764fe Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8654 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-23vboot2: read secdata and nvdataDaisuke Nojiri
This code ports antirollback module and tpm library from platform/vboot_reference. names are modified to conform to coreboot's style. The rollback_index module is split in a bottom half and top half. The top half contains generic code which hides the underlying storage implementation. The bottom half implements the storage abstraction. With this change, the bottom half is moved to coreboot, while the top half stays in vboot_reference. TEST=Built with USE=+/-vboot2 for Blaze. Built Samus, Link. BUG=none Branch=none Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I77e3ae1a029e09d3cdefe8fd297a3b432bbb9e9e Original-Reviewed-on: https://chromium-review.googlesource.com/206065 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Reviewed-by: Luigi Semenzato <semenzato@chromium.org> (cherry picked from commit 6b66140ac979a991237bf1fe25e0a55244a406d0) Change-Id: Ia3b8f27d6b1c2055e898ce716c4a93782792599c Signed-off-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/8615 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-03-20loaders: add program_loading.h header fileAaron Durbin
Instead of two headers for payload and ramstage loading combine the 2 files into one. This also allows for easier refactoring by keeping header files consistent. Change-Id: I4a6dffb78ad84c78e6e96c886d361413f9b4a17d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8708 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-03-09Add and consistently use wrapper macro for romstage static variablesJulius Werner
x86 systems run their romstage as execute-in-place from flash, which prevents them from having writable data segments. In several code pieces that get linked into both romstage and ramstage, this has been worked around by using a local variable and having the 'static' storage class guarded by #ifndef __PRE_RAM__. However, x86 is the only architecture using execute-in-place (for now), so it does not make sense to impose the restriction globally. Rather than fixing the #ifdef at every occurrence, this should really be wrapped in a way that makes it easier to modify in a single place. The chromeos/cros_vpd.c file already had a nice approach for a wrapper macro, but unfortunately restricted it to one file... this patch moves it to stddef.h and employs it consistently throughout coreboot. BRANCH=nyan BUG=None TEST=Measured boot time on Nyan_Big before and after, confirmed that it gained 6ms from caching the FMAP in vboot_loader.c. Original-Change-Id: Ia53b94ab9c6a303b979db7ff20b79e14bc51f9f8 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/203033 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> (cherry picked from commit c8127e4ac9811517f6147cf019ba6a948cdaa4a5) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I44dacc10214351992b775aca52d6b776a74ee922 Reviewed-on: http://review.coreboot.org/8055 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-03-07AMD: Uniformly define MSRs for TOP_MEM and TOP_MEM2Kyösti Mälkki
Make the build tolerate re-definitions. Change-Id: Ia7505837c70b1f749262508b26576e95c7865576 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8609 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-14AMD cimx/sb800: Disable unused GPP portsKyösti Mälkki
If devicetree.cb has GPP port off, really disable it before even trying to do link training. Change-Id: I810945da28d86768e88249dc4d29a50ad9f9959b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8385 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-01-31intel/rangeley: Update UPD_DATA_REGION to support POST-GOLD 2 FSPYork Yang
Rangeley POST-GOLD 2 FSP added PCIe ports de-emphasis configuration by UPD input. Update UPD_DATA_REGION structure for matching up this FSP change. PcdCustomerRevision is a debugging aid that will be output to debug message in FSP. When needed, it can be customized by BCT tool for tracking BCT configurations. Change-Id: I6d4138c9d8bbb9c89f24c77f976dbc760d626a9b Signed-off-by: York Yang <york.yang@intel.com> Reviewed-on: http://review.coreboot.org/8107 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <gaumless@gmail.com>
2015-01-31vendorcode/amd/agesa/f14: update microcodeNicolas Reinecke
05000028 -> 05000029 tested on asrock E350M1 05000101 -> 05000119 Change-Id: Iccb096eb55a4a789c1e810f68c8c8eacfd5f8a0b Signed-off-by: Nicolas Reinecke <nr@das-labor.org> Reviewed-on: http://review.coreboot.org/8296 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-27southbridge/amd/pi: Rename Avalon to HudsonDave Frodin
To maintain consistancy with southbridge/amd/agesa/hudson rename pi/avalon to pi/hudson in advance of adding support for the base hudson southbridge. Change-Id: Icff8c4c06aae2d40cbd9e90903754735ac3510c3 Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/8251 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-01-27AMD Bald Eagle: Add binary PI vendorcode filesBruce Griffith
Add all of the PI source that will remain part of coreboot to build with a binary AGESA PI BLOB. This includes the gcc makefiles, some Kconfig, and the AGESA standard library functions. Change vendorcode Makefile and Kconfig so that they can compile AMD library files and use headers from outside the coreboot/src tree. This fix changes the makefile so that the AGESA dispatcher is built using its own rules rather than generic library generation rules in coreboot/Makefile and coreboot/Makefile.inc. The AGESA source files are initially copied from whereever they live into coreboot/build/agesa. They are compiled from there. The binary PI directory now has a mandatory structure that places the AGESA BLOB into the same directory as the support headers. These will nominally be placed in the amd directory in SageBIOS or the 3rdparty directory in coreboot.org. Change-Id: I56788cd197159939b64c7d16c1d32418f8cc2197 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Signed-off-by: Dave Frodin <dave.frodin@se-eng.com> Reviewed-on: http://review.coreboot.org/5967 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-01-27vboot2: copy tlcl from vboot_reference as a preparation for vboot2 integrationDaisuke Nojiri
vboot2 abtracts tpm storage as some 'secure' space. Thus, it's firmware's responsibility to handle vboot specific operations with tpm. This CL just copies related files from vboot_reference so that we can see how code was modified in the next CL. Note rollback_index.c/h were renamed to antirollback.c/h. TEST=none BUG=none Branch=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I1792a622058f70a8fcd3c4037547539ad2870420 Original-Reviewed-on: https://chromium-review.googlesource.com/206462 Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 2ae188b29242bf09c5e79e31f98b330a30bf7b93) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I5fa5a636003e8472127194e961fea4309489b1d9 Reviewed-on: http://review.coreboot.org/8164 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-01-27vboot_wrapper: handling VBERROR_TPM_REBOOT_REQUIRED from VbInit().Kevin Cheng
Doing reset while VBERROR_TPM_REBOOT_REQUIRED occured. BUG=chromium:389568 TEST=Manual force VBERROR_TPM_REBOOT_REQUIRED returned from VbInit() and system will reboot. Original-Change-Id: I9d7c4b3a380a931a728f792b4013b3b9bf65dfae Original-Signed-off-by: Kevin Cheng <kevin.cheng@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/206337 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 32728dd9fc43a95d6f763a85f9cc7a660a66b175) Original-Reviewed-on: https://chromium-review.googlesource.com/206948 Original-Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> (cherry picked from commit 1ea5e233386d236ce20f3d1695fac3a1bc49d4bd) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ib93fdf7b22918f563d3e29207a75fc831bee186a Reviewed-on: http://review.coreboot.org/8163 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-01-27vboot2: read dev and recovery switchDaisuke Nojiri
TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=none Branch=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Ia5353018a0db3dae2e0432b7e6a34d46f81b0ffa Original-Reviewed-on: https://chromium-review.googlesource.com/206064 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit b420451c71c86bc27784d920f53870ee56ddc0f2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I30c9f0ac44de0a5816b5b8d0ded2dc7d7e77c7a1 Reviewed-on: http://review.coreboot.org/8162 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-01-27vboot2: implement vb2ex_read_resourceDaisuke Nojiri
TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I633f9dddbf8b2f25797aacc246bcebaafb02bea4 Original-Reviewed-on: https://chromium-review.googlesource.com/206063 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit 1f215672de31847cc647e83d2c04633b7f8dfa33) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I57f449b052132b300f7bca4351871c539a7a8694 Reviewed-on: http://review.coreboot.org/8161 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-01-27vboot2: implement select_firmware for pre-romstage verificationDaisuke Nojiri
This patch has a basic structure of vboot2 integration. It supports only Nyans, which have bootblock architecture and romstage architecture are compatible from linker's perspective. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I4bbd4d0452604943b376bef20ea8a258820810aa Original-Reviewed-on: https://chromium-review.googlesource.com/204522 Original-Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri@chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri@chromium.org> (cherry picked from commit a6bce0cbed34def60386f3d9aece59e739740c58) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I63ddfbf463c8a83120828ec8ab994f8146f90001 Reviewed-on: http://review.coreboot.org/8160 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-01-27vboot2: add verstageStefan Reinauer
This reverts the revert commit 5780d6f3876723b94fbe3653c9d87dad6330862e and fixes the build issue that cuased it to be reverted. Verstage will host vboot2 for firmware verification. It's a stage in the sense that it has its own set of toolchains, compiler flags, and includes. This allows us to easily add object files as needed. But it's directly linked to bootblock. This allows us to avoid code duplication for stage loading and jumping (e.g. cbfs driver) for the boards where bootblock has to run in a different architecture (e.g. Tegra124). To avoid name space conflict, verstage symbols are prefixed with verstage_. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac Original-Reviewed-on: https://chromium-review.googlesource.com/204376 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I2a83b87c29d98d97ae316091cf3ed7b024e21daf Reviewed-on: http://review.coreboot.org/8224 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-16fmap: Fix pointer related castsFurquan Shaikh
BUG=None BRANCH=None TEST=Compiles Original-Change-Id: I3a747cb562e7390bb81eca874d6c5aaa54b81e6e Original-Signed-off-by: Furquan Shaikh <furquan@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/209337 Original-Tested-by: Furquan Shaikh <furquan@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org> (cherry picked from commit 5d3aef321a9313719308909ec40fdad0ec631a9f) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ia8edf54f65947be12a7ae69f6825545fb2aed0f1 Reviewed-on: http://review.coreboot.org/8222 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins)
2015-01-14Revert "vboot2: add verstage"Paul Menzel
This reverts commit 320647abdad1ea6cdceb834933507677020ea388, because it introduced the following regression. $ LANG=C make V=1 Warning: no suitable GCC for arm. Warning: no suitable GCC for aarch64. Warning: no suitable GCC for riscv. /bin/sh: --: invalid option Usage: /bin/sh [GNU long option] [option] ... /bin/sh [GNU long option] [option] script-file ... GNU long options: --debug --debugger --dump-po-strings --dump-strings --help --init-file --login --noediting --noprofile --norc --posix --rcfile --restricted --verbose --version Shell options: -ilrsD or -c command or -O shopt_option (invocation only) -abefhkmnptuvxBCHP or -o option make: -print-libgcc-file-name: Command not found It also introduced trailing whitespace. Change-Id: I50ec00a38e24c854fa926357cd24f9286bf4f66f Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/8223 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2015-01-14vendorcode/amd/agesa: Remove UCODE_VS_FLAG() macro unused variableEdward O'Callaghan
Remove useless AGESA microcode macro that leads to unused variable warnings. Change-Id: Ia21bfc758f81e349bdd0bfd185df75e8b1898336 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8200 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com> Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2015-01-13vboot2: add verstageDaisuke Nojiri
Verstage will host vboot2 for firmware verification. It's a stage in the sense that it has its own set of toolchains, compiler flags, and includes. This allows us to easily add object files as needed. But it's directly linked to bootblock. This allows us to avoid code duplication for stage loading and jumping (e.g. cbfs driver) for the boards where bootblock has to run in a different architecture (e.g. Tegra124). To avoid name space conflict, verstage symbols are prefixed with verstage_. TEST=Built with VBOOT2_VERIFY_FIRMWARE on/off. Booted Nyan Blaze. BUG=None BRANCH=none Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: Iad57741157ec70426c676e46c5855e6797ac1dac Original-Reviewed-on: https://chromium-review.googlesource.com/204376 Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> (cherry picked from commit 27940f891678dae975b68f2fc729ad7348192af3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I42b2b3854a24ef6cda2316eb741ca379f41516e0 Reviewed-on: http://review.coreboot.org/8159 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2015-01-13vendorcode/intel: remove DebugDeadLoop() from fsptypes.hMartin Roth
When included for the CAR transition, this was causing the error: error: invalid storage class for function 'DebugDeadLoop' Change-Id: Idf37a8104b4468b40c29c8cbe9a40f7a357a4f17 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/8193 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-01-03elog: Add function to log boot reason in ChromeOS caseDavid Hendricks
This adds a generic helper function for adding boot reason in the ChromeOS case. If vboot is enabled, it will use information passed in via the vboot handoff table in cbmem to determine mode and reason in the case of recovery. BUG=chromium:373467 BRANCH=nyan TEST=built along with follow-up CL and booted on Big under various modes, verified entry was added to eventlog with "mosys eventlog list" Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: I50a7aa6d55eb46413fe9929e732d6eb18c758d4b Original-Reviewed-on: https://chromium-review.googlesource.com/199690 Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Original-Commit-Queue: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 961c0bd1dd5512b1c2feb2ed4391bf507900eb7a) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I6ae4e2a891966d2d1de7d37dcc551383e94e4d75 Reviewed-on: http://review.coreboot.org/7991 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2014-12-31vendorcode/amd/cimx/sbX00: Make SBPort.c filename consistentEdward O'Callaghan
Change-Id: I41ba4cffa545a31c1e0845ec44c8a433bda9f99d Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7886 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-30chromeos: Unconditionally clear the EC recovery requestSheng-Liang Song
Add the empty weak function clear_recovery_mode_switch(). Problem: If GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC is set, the following will happen: 1. Boot device in recovery mode with Esc + F3 + Pwr. 2. Turn device off with Pwr button. 3. Turn device on with Pwr button. Device still boots to recovery screen with recovery_reason:0x02 recovery button pressed. If GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC isn't set, turning the device off and on again with the Pwr button does a normal boot. Solution: Unconditionally clear the recovery flag. BUG=chromium:279607 BRANCH=TOT TEST=Compile OK. Original-Change-Id: Ie1e3251a6db12e75e385220e9d3791078393b1bf Original-Signed-off-by: Sheng-Liang Song <ssl@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/197780 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Randall Spangler <rspangler@chromium.org> Original-Commit-Queue: Sheng-liang Song <ssl@google.com> Original-Tested-by: Sheng-liang Song <ssl@google.com> (cherry picked from commit 18908bb64cef34ca41812814817ef887961bed34) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I71ca9f3ea8d816c865375ec66a0603ca211f23ae Reviewed-on: http://review.coreboot.org/7895 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins)
2014-12-30vboot: Convert response_length from uint32_t to size_t in VbExTpmSendReceiveDaisuke Nojiri
Length arguments for VbExTpmSendReceive have type uint32_t but it calls function which expects size_t. This change converts uint32_t to size_t on call and size_t to uint32_t on return. BUG=None BRANCH=None TEST=Booted Nyan Big to Linux Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Original-Change-Id: I1971488baae2d060c0cddec7749461c91602a4f9 Original-Reviewed-on: https://chromium-review.googlesource.com/198016 (cherry picked from commit 6830747eb47568f2a2b494624522d37d8945c030) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I20741759e7bbd60dd7044c532287d6b55047e19a Reviewed-on: http://review.coreboot.org/7894 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-12-30vboot: Add a new post code for TPM failureDuncan Laurie
If the kernel does not properly handle the TPM and send it a TPM_SaveState command before suspend then it will not be in the correct state on resume. In order to easily detect this case add a new post code for TPM failure and use it in the vboot resume path. BUG=chromium:371105 TEST=Build and boot on wtm2. Original-Change-Id: I412520b521387a8e18ad1c6f5a64b39cdd5c88ec Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/199371 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit ff2f0dc56c1a783295710f81567af02729fe1da2) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I5baf894fd72922acd79d191e5485ae8ef7e0d559 Reviewed-on: http://review.coreboot.org/7936 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-12-22amd/agesa/f15/Proc/Common/S3SaveState.c: Sync with f15tnEdward O'Callaghan
Change-Id: If46079c1affc7d74767c4215467fd6754b24f20c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7576 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-12-18AMD Trinity: Update SMU firmware from 10.9 to 10.14Zheng Bao
The first dword in FirmwareTN has been changed from 0xa0009 to 0xa000e. The FirmwareTNHeader is not called by any one in latest PI. It seems to be useless for now. Change-Id: Ic7a20e0bcca8de0b56c7bc5d01e0ce86347bde21 Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/7844 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-12-17chromeos: Add empty functions when CONFIG_CHROMEOS is disabledDuncan Laurie
This allows the chromeos header and functions to be included without needing to guard with #if CONFIG_CHROMEOS. BUG=chrome-os-partner:28234 BRANCH=None TEST=emerge-rambi coreboot Original-Change-Id: I523813dc9521d533242ae2d2bc822eb8b0ffa5e2 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/196265 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit b78ccada9a01f54a60993dfc2c618201d31df9ad) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ic2f7127966da716e114336c30829a6403d82e180 Reviewed-on: http://review.coreboot.org/7843 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-17chromeos: vboot_loader: Add support for SW_WP_ENABLED flagShawn Nematbakhsh
Set VB_INIT_FLAG_SW_WP_ENABLED according to the status returned by an optional platform / mainboard function vboot_get_sw_write_protect(). BUG=chrome-os-partner:26777 TEST=Manual on Rambi with all patches in sequence: `crossystem sw_wpsw_boot` prints 0 `flashrom --wp-enable` and reboot `crossystem sw_wpsw_boot` prints 1 BRANCH=Rambi Original-Change-Id: Ifb852d75cc106d10120cfee0a396b0662282051a Original-Signed-off-by: Shawn Nematbakhsh <shawnn@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/190096 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit c4668fc8a9ab31d9cf876b3d9ad3405756d4d683) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Idace325439958f6b490d2e6705d55e95305c4b2a Reviewed-on: http://review.coreboot.org/7750 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2014-12-16amd/agesa/f*/Lib/amdlib.c: Integer overflow in loop constructEdward O'Callaghan
As is the case in commit: 3312ed7 amd/agesa/f1?/Lib/amdlib.c: Integer overflow in loop construct The semantics of this loop relies on an integer overflow in Index >=0 that implies a return value of (UINT8)-1 which around wraps to 0xFF, or VOLT_UNSUPPORTED. Also fix an infinite loop. Change-Id: Iced3eff3ae7b8935db3bdd6147372cf3b540883c Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7676 Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-15tegra124: Skip display init when vboot says we don't need it.Gabe Black
If EFS is enabled and vboot didn't tell us it's going to use the display, we can skip initializing it and save some boot time. BUG=chrome-os-partner:27094 TEST=Built and booted on nyan without EFS in recovery mode and normal mode. Built and booted on nyan with EFS in recovery mode and normal mode. Verified that in normal mode with EFS the display initialization was skipped and boot time was essentially the same as when display initialization was simply commented out. BRANCH=None Original-Change-Id: I1e2842b57a38061f40514407c8fab1e38b75be80 Original-Signed-off-by: Gabe Black <gabeblack@google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/192544 Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> Original-Commit-Queue: Gabe Black <gabeblack@chromium.org> Original-Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit a672d18c3570e6991a1c1c0089697112a4cd71d0) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I95e8bd7a447876174305f755cc632365ed6f5a30 Reviewed-on: http://review.coreboot.org/7734 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-12vendorcode/amd/pi/00730F01/Lib/amdlib.c: Remove optimize attributeBruce Griffith
Remove '__attribute__((optimize("Os")))' as it is unlikely to be necessary as it is not used in other families that have the same code and only hides deeper issues. Change-Id: Ica890812ebc2fb659b9c3e46b40cf3f6534b3cf2 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/7689 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-10vendorcode/amd/agesa/f16kb/*/PcieComplexDataKB.c: Implicit truncationEdward O'Callaghan
Clang complains: "implicit truncation from 'int' to bitfield changes value from -1 to 15" -1 is define in 'c11std 6.3.1.3p2' as: [Signed and unsigned integers] Otherwise, if the new type is unsigned, the value is converted by repeatedly adding or subtracting one more than the maximum value that can be represented in the new type until the value is in the range of the new type.60) FOOTNOTE.60 The rules describe arithmetic on the mathem... This is "0xFF" on Mullins and "0xF" in this case. Clang seems to complain about this two's complement in a bitfield as being truncated. As the bitfield is 4 bits wide, (a maximum of 15 decimal), we set the field as '0x0F'. Ideally this field /should/ be set to 'UINT8_MAX' however we still have silly truncation warnings. Change-Id: Ib7476d453ffd932bb911e638117cf9f56f71f269 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7719 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-12-09vboot: allow for non-memory-mapped VBOOT regionsAaron Durbin
Depending on the platform the underlying regions vboot requires may not be accessible through a memory-mapped interface. Allow for non-memory-mapped regions by providing a region request abstraction. There is then only a few touch points in the code to provide compile-time decision making no how to obtain a region. For the vblocks a temporary area is allocated from cbmem. They are then read from the SPI into the temporarily buffer. BUG=chrome-os-partner:27094 BRANCH=None TEST=Built and booted a rambi with vboot verification. Original-Change-Id: I828a7c36387a8eb573c5a0dd020fe9abad03d902 Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/190924 Original-Reviewed-by: Hung-Te Lin <hungte@chromium.org> (cherry picked from commit aee0280bbfe110eae88aa297b433c1038c6fe8a3) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: Ia020d1eebad753da950342656cd11b84e9a85376 Reviewed-on: http://review.coreboot.org/7709 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-08vendorcode/amd/agesa/fam10: Build as a static libraryEdward O'Callaghan
Following the same reasoning as commit ee905a8 vendorcode/amd/agesa/fam15tn: Build as a static library Since AGESA is stage-independent, we can build it just once, and use the resulting static library in both rom and ram stages. Change-Id: I8fbb318daacf64a14a71022705eb040a01c34fa8 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7699 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-08vendorcode/amd/agesa/fam15: Build as a static libraryEdward O'Callaghan
Following the same reasoning as commit ee905a8 vendorcode/amd/agesa/fam15tn: Build as a static library Since AGESA is stage-independent, we can build it just once, and use the resulting static library in both rom and ram stages. Change-Id: I7798b689db3e582649eb4af4ccd1877bb1d49063 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7698 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-07vendorcode/amd/agesa/f1{5,5tn,6kb}: Silence empty loop warnEdward O'Callaghan
Add decorations to specify that empty loop is intended so. Change-Id: Ia3e40d341eca5e26da3832edc733cf1ccc96c136 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Found-by: Clang Reviewed-on: http://review.coreboot.org/7688 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-07vendorcode/amd/agesa/f15tn/*/F15TnMsrTables.c: Topology Extensions SupportEdward O'Callaghan
Topology Extensions Support (bit 54 of 0xC0011005) applies to PACKAGE_TYPE_FS1r2 also. Rids us of: "Re-enabling disabled Topology Extensions Support" showing up in dmesg. Change-Id: Id123fa9632936c150cf1aebc4d34b404a4398ead Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/7671 Tested-by: build bot (Jenkins) Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
2014-12-06vendorcode/amd/agesa: Remove unused helper.c fileAlexandru Gagniuc
The contents of these files were guarded by a check for the _MSC_VER macro, which we don't use. Change-Id: Ic595c8e6284c54e1449cf21e0cebee8c9ce7c682 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/7670 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)