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AgeCommit message (Expand)Author
2021-01-09vc/intel/fsp1_1/skylake: Remove unused header fileFelix Singer
2021-01-03vc/google/chromeos: Move chromeos_set_me_hash() prototypeKyösti Mälkki
2020-12-28sb/amd/pi/hudson: Enable use of common GPIO APIKyösti Mälkki
2020-12-23vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1514_11Subrata Banik
2020-12-21soc/amd/picasso: Add UPDs for support eDP phy tunning adjustChris Wang
2020-12-18vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1512_11Subrata Banik
2020-12-07vc/intel/fsp/fsp2_0/cooperlake_sp: Update WW47 FSP Memory map HOBJohnny Lin
2020-12-05amd_blobs: Always set default pathsNico Huber
2020-12-03src: Remove redundant use of ACPI offset(0)Elyes HAOUAS
2020-12-02cbfs: Simplify load/map API names, remove type argumentsJulius Werner
2020-12-02vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support a custom memory profileMike Banon
2020-12-02vc/amd/agesa/f.../Proc/Mem/Tech/DDR3: Support XMP memory profilesMike Banon
2020-12-02vendorcode/intel/fsp: Add Elkhart Lake FSP headers for FSP v2341Tan, Lean Sheng
2020-12-02vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2385_04Ronak Kanabar
2020-11-26vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1483_11Subrata Banik
2020-11-22vendorcode/eltan/security: Add dependency for menu itemsFrans Hendriks
2020-11-22cpu/amd/pi: Remove unused cpu code 00660F01Martin Roth
2020-11-22vc/amd/pi/00670F00: Add raw AGESA binary only to COREBOOT CBFSFurquan Shaikh
2020-11-21vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1474_11Subrata Banik
2020-11-20vc/intel/fsp2/denverton_ns: Remove unused filesFelix Singer
2020-11-20vc/google/chromeos/sar: Make "SAR not found" log a debug messageMaulik V Vaghela
2020-11-20vc/intel/fsp/fsp2_0/cpx_sp: Expose RasModesEnabled field inTim Chu
2020-11-19vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2385_02Ronak Kanabar
2020-11-19ACPI S3: Replace acpi_is_wakeup()Kyösti Mälkki
2020-11-16vc/intel/fsp/fsp2_0/cooperlake_sp: Fix WW45 FSP Memory map HOB mismatchJohnny Lin
2020-11-15vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3444Srinidhi N Kaushik
2020-11-13vc/intel/fsp/fsp2_0/alderlake: Update FSP header file version to 1454Subrata Banik
2020-11-07vc/intel/FSP2_0/CPX-SP: update to ww45 release and add watermark optionJonathan Zhang
2020-11-06soc/amd/picasso: Update coreboot UPD variable names to include unitsZheng Bao
2020-11-02vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3425Srinidhi N Kaushik
2020-10-30vc/amd/fsp: Update bl_errorcodes_public.hMartin Roth
2020-10-25vc/intel/fsp/fsp2_0/adl: Update FSP header file version to 1432Subrata Banik
2020-10-23vc/amd/fsp/picasso: Remove typedefs in bl_syscall_public.hJason Glenesk
2020-10-19volteer+vendorcode: Retrieve Cr50 version only via SPIJes Klinke
2020-10-19vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2376Ronak Kanabar
2020-10-17vendorcode/amd: Fix typo in *is defined* in commentsPaul Menzel
2020-10-17vc/amd/Kconfig: Add missing dot in AMD domain www.amd.comPaul Menzel
2020-10-14vc/intel/fsp/fsp2_0/adl: Update FSP header to version 1332.01Subrata Banik
2020-10-13vendorcode/google/dram_part_num: Lower the severity of debug statementKarthikeyan Ramasubramanian
2020-10-12vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3373Srinidhi N Kaushik
2020-10-08vc/intel/fsp/fsp2_0/cpx_sp: Expose DIMM Present and DdrVoltage fieldsJohnny Lin
2020-10-08vc/intel/fsp/fsp2_0/CPX-SP: update to Intel ww40 releaseJonathan Zhang
2020-10-07vc/amd/fsp: Update the svc call header for the Mod Exp SVCMartin Roth
2020-10-05vendorcode/google: add CHROMEOS_DRAM_PART_NUMBER_IN_CBI Kconfig optionNick Vaccaro
2020-10-01vc/amd/fsp/picasso: Add bit definitions for PSP info in transfer blockMartin Roth
2020-09-28vc/intel/fsp/fsp2_0/CPX-SP: upgrade to ww38 FSP releaseJonathan Zhang
2020-09-25vc/amd/fsp/picasso: Update to UPD 1.0.1.3Raul E Rangel
2020-09-15chromeos: Provide common watchdog reboot support in romstageRavi Kumar Bokka
2020-09-14src/vendorcode/intel/fsp/fsp2_0/cpx-sp: add prev boot error info HOB header fileJonathan Zhang
2020-09-11vc/amd/fsp/picasso: Fix FSP-S UPD header file formattingFelix Held
2020-09-10vc/amd/fsp/picasso: Sync FSP-S UPD header fileMarshall Dawson
2020-09-10vendorcode/intel/fsp/alderlake: Fix FSPS_ARCH_UPD redefinition issueSubrata Banik
2020-09-09vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332Subrata Banik
2020-09-08vc/intel/fsp/fsp2_0/cpx_sp: Add DIMM definition in SystemMemoryMapHobJohnny Lin
2020-09-08vendorcode/intel/FSP2_0/CPX-SP: update to ww36Jonathan Zhang
2020-09-08vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3Johnny Lin
2020-09-08vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3333Srinidhi N Kaushik
2020-09-01{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik
2020-08-31vendorcode/google: Add error handlingJohn Zhao
2020-08-28vc/amd/fsp/picasso: Add FSP-M UPD enable_sata to 0xC7 to match FSPNikolai Vyssotski
2020-08-28vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt socJonathan Zhang
2020-08-27symbols: Change implementation details of DECLARE_OPTIONAL_REGION()Julius Werner
2020-08-26vc/amd/agesa/f15tn: add DDR1866_FREQUENCY to DdrMaxRateTab tableMike Banon
2020-08-25vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2295Ronak Kanabar
2020-08-24vc/google/chromeos: load wifi_sar_defaults.hex as the main WiFi SAR CBFS sourceKevin Chiu
2020-08-24nb/amd/agesa: define DDR3_SPD_SIZE as a common valueMike Banon
2020-08-24edk2-stable202005/IntelFsp2Pkg: Add FSP*_ARCH_UPD.Ronak Kanabar
2020-08-23vc/amd/fsp/picasso: add FSP-M UPD to disable the HD Audio controllerFelix Held
2020-08-23Revert "vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controller"Felix Held
2020-08-22vendorcode/google/chromeos: Introduce helper for CSE board resetKarthikeyan Ramasubramanian
2020-08-20vc/amd/agesa/f16kb: raise the UDIMM Freq limit 1333MT/s values to 1600MT/sMike Banon
2020-08-19vc/amd/fsp/picasso: update pci descriptor commentsMatt Papageorge
2020-08-17vc/amd/agesa/f15tn: add 933 MHz to GfxMemClockFrequencyDefinitionTableMike Banon
2020-08-17vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controllerFelix Held
2020-08-14vendercode/intel/fsp/fsp2_0/glk: Update FSP header file per v2.2.0Seunghwan Kim
2020-08-13vc/amd/picasso/bl_uapp: Update header fileMarshall Dawson
2020-08-13vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3313Srinidhi N Kaushik
2020-08-11vendorcode/intel/fsp/fsp2_0/CPX-SP: remove non-existing PSTACKsJonathan Zhang
2020-08-08vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt socJonathan Zhang
2020-08-05vendorcode/amd/fsp/picasso Fix type 17 smbios misalignmentJason Glenesk
2020-08-02vc/amd/fsp/picasso: document requirements for DXIO PCIe port assignmentsFelix Held
2020-07-31vc/amd/fsp/picasso: document DXIO lane number mappingFelix Held
2020-07-30vc/amd/picasso/bl_uapp: Update header fileMarshall Dawson
2020-07-28vc/cavium: Fix up license headersAngel Pons
2020-07-26amd/picasso: rework USB2 PHY tune parameter handlingFelix Held
2020-07-24vc/amd/fsp/picasso: update UPD headerFelix Held
2020-07-23amd/picasso: rename PCIe descriptor to DXIO descriptorFelix Held
2020-07-23vc/amd/fsp/picasso: add logical to lane number in port descriptor structFelix Held
2020-07-23soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fieldsJonathan Zhang
2020-07-22vc/amd/fsp/picasso: mark remaining UPD header structs as __packedFelix Held
2020-07-20vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3274Srinidhi N Kaushik
2020-07-15amd/picasso: rework DXIO and DDI UPD handlingFelix Held
2020-07-15vc/amd/fsp/picasso: replace #pragma pack(1) with __packed attributeFelix Held
2020-07-12soc/intel/xeon_sp/cpx: use HOB_TYPE_GUID_EXTENSION to interpret platform HOBsJonathan Zhang
2020-07-12vc/amd/fsp/picasso: add DMI data structure definitionsAaron Durbin
2020-07-12vendocode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww28 release and adapt socJonathan Zhang
2020-07-10vc/amd/pi/00660F01: Drop dead codeAngel Pons
2020-07-09vc/amd/agesa/f15tn: Drop dead codeAngel Pons
2020-07-09vc/amd/fsp/picasso: add comment on logical lane numbers in descriptorFelix Held
2020-07-07vendorcode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww26 release and adapt socJonathan Zhang
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