coreboot.git - my copy of coreboot

Age	Commit message (Expand)	Author
2011-08-06	Update AMD F14 Agesa to support Rev C0 cpus	efdesign98
2011-07-22	Update AMD SR5650 and SB700	efdesign98
2011-07-15	Add the AMD Family10 Agesa code	efdesign98
2011-06-28	Addition of Family12/SB900 wrapper code	efdesign98
2011-06-22	Move existing AMD Ffamily14 code to f14 folder	efdesign98
2011-06-22	Rename {CPU\|NB\|SB}/amd/*_wrapper folders	efdesign98
2011-06-21	Add AMD SB900 CIMx code	efdesign98
2011-06-21	Add AMD Family 12 cpu Agesa code	efdesign98
2011-06-01	trivial remove blanks at the end of line	Kerry She
2011-06-01	This patch fix a AMD sb800 wrapper compile warning:	Kerry She
2011-05-15	Remove multiple mmconf settings and just use kconfig setting.	Marc Jones
2011-05-15	Move mmconf base from e0000000 to f8000000 to avoid conflict with UMA BAR.	Scott Duplichan
2011-05-15	Fix ACPI shutdown function by removing reliance on SMI.	Scott Duplichan
2011-05-07	SB800 CIMX code can share the AGESA V5 lib code,	Kerry She
2011-05-07	1. move _mm_clflush_fs() to __SSE3__ block, because __builtin_ia32_sfence() i...	Kerry She
2011-05-07	put the amdlib and agesa constant to .rodata segment.	Kerry She
2011-05-05	Adds VOID to empty parameter lists to get rid of some build warnings.	Frank Vibrans
2011-05-05	Remove AMD Agesa requirement for standard include files	Frank Vibrans
2011-03-17	Fix breaking the build after removing files in tthe previous checkin.	Marc Jones
2011-03-17	Perform cleanup and file shrinkage of the AMD AGESA code.	Frank.Vibrans
2011-02-14	Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8.	Frank Vibrans
2011-01-18	remove the code which is not ready to release.	Zheng Bao
2011-01-11	change a readable way to fix SB800 CIMX "multi-character constant warning".	Kerry She
2011-01-04	Trivial:	Kerry She
2011-01-01	Add AMD SB800 southbridge CIMx code.	Kerry She