aboutsummaryrefslogtreecommitdiff
path: root/src/vendorcode/intel/fsp/fsp2_0
AgeCommit message (Collapse)Author
2017-02-08vendorcode/intel/skykabylake: Update FSP UPD header filesAamir Bohra
Update FSP UPD header files as per version 1.6.0. Below UPDs are added to FspsUpd.h: * DelayUsbPdoProgramming * MeUnconfigIsValid * CpuS3ResumeDataSize * CpuS3ResumeData CQ-DEPEND=CL:*322871,CL:*323186,CL:*322870 BUG=None BRANCH=None TEST=Build and boot on RVP3 and poppy Change-Id: Id51a474764a28eec463285757d0eb8ec7ca13fd1 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/18289 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-02-08vendorcode/intel/skykabylake: Update CpuConfigFspData.h fileBarnali Sarkar
The FSP UPD offsets and the corresponding structure size do not match, CpuConfigData.h needs an update to align the same. Hence update the header file based on FSP version 1.4.0. BUG=chrome-os-partner:61548 BRANCH=none TEST=Built and booted KBLRVP and verify that all UPDs are in sync in both coreboot and FSP. Change-Id: I5ef7cbb569c3d1a44e7846717201952a0acf12ab Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/18285 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-01-14apollolake: Update UPD header files for FSP 1.3.0Brandon Breitenstein
These updated header files contain USB tuning parameters as well as some general cleanup of unused parameters in the UPD Headers. This patch along with the upcoming FSP 1.3.0 release will allow for USB tuning on apollolake platforms. CQ-DEPEND=CL:*315403 BUG=chrome-os-partner:61031 Change-Id: Id7cce1ea83057630d508523ada18c5425804535e Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/18046 Reviewed-by: Kevin Chiu <Kevin.Chiu@quantatw.com> Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-30vendorcode/skykabylake: Update header to fsp v1.4.0Naresh G Solanki
Add header files as is from FSP build output without any adaptations. Change-Id: Ic4b33c42efe8c9dbe9f9e2b11bf6344c9487d86e Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com> Reviewed-on: https://review.coreboot.org/17556 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-30vendorcode/intel: Update apollolake UPD headers to SIC 1.2.3 releaseBrandon Breitenstein
This header update contains updates for skipping punit as well as some MRC related UPD values. BUG=chrome-os-partner:60068 BRANCH=none TEST=built with FSP 1.2.3 and MRC patches for coreboot CQ-DEPEND=CL:*307357 Change-Id: I8c66c0c0febba5e67ae3290034e9b095c9e68f07 Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/17631 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-10-07vendorcode/intel/fsp: Update UPD headers for FSP 157_10Brandon Breitenstein
These header files contain a few new UPDs. The EnableS3Heci2 UPD will be used to save ~100ms from the S3 resume time on Apollolake chrome platforms. BUG=chrome-os-partner:58121 BRANCH=none TEST=built coreboot for reef and verified no regressions Change-Id: I1f324d00237c7150697800258a2f7b7eed856417 Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/16869 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-30mainboard/intel/quark: Add FSP selection valuesLee Leahy
Add Kconfig values to select the FSP setup: * FSP version: 1.1 or 2.0 * Implementation: Subroutine or SEC/PEI core based * Build type: DEBUG or RELEASE * Enable all debugging for FSP * Remove USE_FSP1_1 and USE_FSP2_0 Look for include files in vendorcode/intel/fsp/fsp???/quark BRANCH=none BUG=None TEST=Build FSP 1.1 (subroutine) and run on Galileo Gen2 Change-Id: I3a6cb571021611820263a8cbfe83e69278f50a21 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/16806 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-09-12vendorcode/skylake: Add FSP header files without any adaptationsRizwan Qureshi
Add header files as is from FSP build output. Move the FSP header files to new location as in apollolake. Update all the FSP structure references now that they are typedef'd. Change-Id: I148bff04c064cf853eccaaaf7a465d0079c46b07 Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/16517 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-09-02apollolake: relocate fsp header files to vendorcodeBrandon Breitenstein
FSP header files should be located in vendorcode, not soc directory. This patch includes changes any references to the old location to the new location. Change-Id: I44270392617418ec1b9dec15ee187863f2503341 Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/16310 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-11vendorcode/intel/fsp: Add fsp 2.0 header files for skylake and kabylakeRizwan Qureshi
Add FSP 2.0 header files, these files are common for Skylake and Kabylake, name the folder as skykabylake to signify the same. Change-Id: I71b43a59c9a9b0adf1ee48285e4a72e24a13df2d Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/16050 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>