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Drop a leading blank line in the license header comment.
Change-Id: Ic3d7568303f9d816a8727a2960270e7667d41104
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
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The former is not standard C, and we primarily use the latter form.
Change-Id: Ia7091b494ff72588fb6910710fd72165693c1ac5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
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Stefan thinks they don't add value.
Command used:
sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool)
The exceptions are for:
- crossgcc (patch file)
- gcov (imported from gcc)
- elf.h (imported from GNU's libc)
- nvramtool (more complicated header)
The removed lines are:
- fmt.Fprintln(f, "/* This file is part of the coreboot project. */")
-# This file is part of a set of unofficial pre-commit hooks available
-/* This file is part of coreboot */
-# This file is part of msrtool.
-/* This file is part of msrtool. */
- * This file is part of ncurses, designed to be appended after curses.h.in
-/* This file is part of pgtblgen. */
- * This file is part of the coreboot project.
- /* This file is part of the coreboot project. */
-# This file is part of the coreboot project.
-# This file is part of the coreboot project.
-## This file is part of the coreboot project.
--- This file is part of the coreboot project.
-/* This file is part of the coreboot project */
-/* This file is part of the coreboot project. */
-;## This file is part of the coreboot project.
-# This file is part of the coreboot project. It originated in the
- * This file is part of the coreinfo project.
-## This file is part of the coreinfo project.
- * This file is part of the depthcharge project.
-/* This file is part of the depthcharge project. */
-/* This file is part of the ectool project. */
- * This file is part of the GNU C Library.
- * This file is part of the libpayload project.
-## This file is part of the libpayload project.
-/* This file is part of the Linux kernel. */
-## This file is part of the superiotool project.
-/* This file is part of the superiotool project */
-/* This file is part of uio_usbdebug */
Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Sometimes coreboot needs to compile external code (e.g.
vboot_reference) using its own set of system header files.
When these headers don't line up with C Standard Library,
it causes problems.
Create stdio.h and stdarg.h header files. Relocate snprintf
into stdio.h and vsnprintf into stdarg.h from string.h.
Chain include these header files from string.h, since coreboot
doesn't care so much about the legacy POSIX location of these
functions.
Also move va_* definitions from vtxprintf.h into stdarg.h where
they belong (in POSIX). Just use our own definitions regardless
of GCC or LLVM.
Add string.h header to a few C files which should have had it
in the first place.
BUG=b:124141368
TEST=make clean && make test-abuild
BRANCH=none
Change-Id: I7223cb96e745e11c82d4012c6671a51ced3297c2
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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free() is not needed since the memory is not dynamically allocated.
Change-Id: I90659722aaca6ced1e1cbc3db4180b0811205e95
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37940
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Change-Id: I9ded44422a267e244343502dd5d6ab355e5a788d
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37378
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I70029700bfb297ac06561056da730731a2ca1e8b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33682
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I64876a2b6cffdabf3e365fc07017adb14f086ecc
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37380
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: Id52603c525cce1bead423d188e23f6efd50511a9
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37377
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I7c93031c8c0e3a86261988edc956e8cd5a8dd961
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34998
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This function can capture and allocate its own eye data, so in that case
set need_free to true so it is freed at the end.
Change-Id: I63ca6d743e6610d3e3ab6bd7b0356aabdfa6f784
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1393969
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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The bdk_phys_to_ptr() function converts a uint64_t address to a void *
pointer. Judging by the comments, the old implementation had a check
that would refuse to convert a null pointer, which required several
workarounds when trying to convert the address 0 to a pointer. This
isn't the case for coreboot though, which implements this function
as a simple (void *) cast, so we can remove the old workarounds.
Change-Id: I6537d1699e6726c1fb155d69a51e14da856232de
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1393962
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34590
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Ensure that best_en_idx is within bounds before accessing the _en array.
Change-Id: Ifa6259e28875a8cf8199896bda7982370ccaa277
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1393971
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34593
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The total number of errors is only needed after a final tuning run at the
end of this function, so we can remove this unneeded store for earlier
runs.
Change-Id: I62adb38ccba98d90bcf8ccd13998762b9b694111
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1393967
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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volt_str is used to print information about the RAM configuration
in report_common_dimm(), so let's print out "unknown voltage" if the
voltage isn't recognized rather than a garbage value.
Change-Id: I8e85917fd682e166172fbf10597bde4a8a11dfc7
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1393958, 1393982
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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Sometimes coreboot needs to compile external code (e.g.
vboot_reference) using its own set of system header files. When
these headers don't line up with C Standard Library, it causes
problems.
Create ctype.h header file. Relocate ctype.h functions from
string.h into ctype.h. Update source files which call ctype.h
functions accordingly.
Note that ctype.h still lacks five functions which are not used
in coreboot source:
isalnum, isalpha, iscntrl, isgraph, ispunct
BUG=b:124141368
TEST=make clean && make test-abuild
BRANCH=none
Change-Id: I31b5e8af49956ec024a392a73c3c9024b9a9c194
Signed-off-by: Joel Kitching <kitching@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33525
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
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Fixes Coverity CID 1393957 (Missing Comma)
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Change-Id: I63ee47f870081bcf081bcf6dcec764e830b4ab75
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32021
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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This patch is a raw application of
find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g'
Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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find src -type f "!" -regex ".*\.\(vbt\|bin\)" -exec sed -i -e "s,\s\+$,,g" {} \;
Change-Id: Ic70cf8524dcd0a0f5700f91b704b3c545dd8a01a
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30959
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Change-Id: I179264ee6681a7ba4488b9f1c6bce1a19b4e1772
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/30160
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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This is an issue found by the new builder image and needs to be fixed
before we can upgrade to the new toolchain version:
In function `bdk_dram_get_size_mbytes':
src/vendorcode/cavium/bdk/libbdk-dram/bdk-dram-size.c:198:
undefined reference to `bdk_pop'
In function `bdk_get_num_cores':
/src/vendorcode/cavium/include/bdk/libbdk-hal/bdk-utils.h:164:
undefined reference to `bdk_dpop'
In function `init_octeon3_ddr3_interface':
src/vendorcode/cavium/bdk/libdram/dram-init-ddr3.c:7550:
undefined reference to `bdk_pop'
Change-Id: Ibf71e4556014795bfedceccfe3837dc9deb29ad2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/c/29851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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Change-Id: I81985bd2836bdeb369587f170504a8a048ee496b
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-on: https://review.coreboot.org/29196
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Prevent a reboot loop due to slow PCIe init.
Poke the watchdog a few times.
Change-Id: I03739d7dbad3072ccf77364fa4caba42c66ac643
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27455
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Swap 100Mhz and 156Mhz reference clock.
Correct values are taken from __bdk_qlm_sff81xx_set_reference().
Tested on Cavium's cn8100_sff_evb.
Change-Id: I312ce7379b361594249f9f26f4e561ebf57347df
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27454
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Fix Coverity CID1393970
Change-Id: I5db6866b8e51eaea201a4c03e59d7d00f4f826e7
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27453
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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* Fix CID1393963 (Uninitialized variables)
* Comment in working code
* Remove workaround to limit DDR speed
Change-Id: I96289da43c1018c2fdf9d013ce7f21d7511ba595
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27452
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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The BDK config subsystem can't store values in romstage.
Read frequency from DDR memory controller instead from
BDK config.
Fixes memory info showing always 0 MT/s.
Change-Id: Iaee33e57e27ca182f41be923cf950868f66d3638
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27451
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Fix Coverity CID1393975
Change-Id: I275cabf55fba464be7bd4c21dfe5826ea554ac84
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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* Use Kconfig options instead of unusable getenv
* Select CAVIUM_BDK_DDR_TUNE_HW_OFFSETS on CN81XX
* Fix Coverity CID 1393976 (DEADCODE)
Tested on Cavium's cn8100_sff_evb.
Change-Id: Ia16c0161b0e9cf5d06418e46556c0fb45532a5b1
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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Fix a typo.
Only memcpy into target buffer if pointer is not NULL.
Change-Id: I1aa4b2ce1843e53ab6ed2224eaa928fc79ea3b83
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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* Make it compile.
* Fix whitespace errors.
* Fix printf formats.
* Add missing headers includes
* Guard headers with ifdefs
Compile DRAM init code in romstage.
Compile QLM, PCIe, RNG, PHY, GPIO, MDIO init code in ramstage.
Change-Id: I0a93219a14bfb6ebe41103a825d5032b11e7f2c6
Signed-off-by: David Hendricks <dhendricks@fb.com>
Reviewed-on: https://review.coreboot.org/25089
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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This imports common BDK sources that will be used in subsequent
patches.
The BDK is licensed under BSD and will be reduced in size and optimized to
compile under coreboot.
Change-Id: Icb32ee670d9fa9e5c10f9abb298cebf616fa67ad
Signed-off-by: David Hendricks <dhendricks@fb.com>
Reviewed-on: https://review.coreboot.org/25524
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
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