| Age | Commit message (Expand) | Author |
|---|---|---|
| 2021-03-08 | soc/mediatek/mt8192: initialize DRAM using vendor reference code | Huayang Duan |
| 2019-06-04 | vendorcode/eltan: Add vendor code for measured and verified boot | Frans Hendriks |
| 2018-07-03 | soc/cavium: Integrate BDK files into coreboot | David Hendricks |
| 2016-04-28 | vendorcode/siemens: Add hwilib for Siemens specific info struct | Werner Zeh |
| 2013-12-04 | Add Intel FSP northbridge support Sandybridge and Ivybridge | Marc Jones |
| 2012-04-02 | Add Google ChromeOS vendor support | Stefan Reinauer |
| 2011-12-02 | Change AMD vendorcode build | Kyösti Mälkki |
| 2011-07-15 | Add the AMD Family10 Agesa code | efdesign98 |
| 2011-06-28 | Addition of Family12/SB900 wrapper code | efdesign98 |
| 2011-02-14 | Add AMD Agesa and AMD CIMx SB800 code. Patch 1 of 8. | Frank Vibrans |
| 2011-01-18 | remove the code which is not ready to release. | Zheng Bao |
| 2011-01-01 | Add AMD SB800 southbridge CIMx code. | Kerry She |
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index : coreboot.git | |
| my copy of coreboot | User & |
| summaryrefslogtreecommitdiff |