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path: root/src/superio/winbond/w83627thf
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2007-05-11The Super I/O needs 0x87 sent twice to 0x2e (or 0x4e) to enable extendedRoger Zauner
function (power-on strapping). Although this is already done in superio.c, it's not being done when w83627thf_early_serial.c is executed. As such, no console_init() without it. Signed-off-by: Roger Zauner <roger@eskimo.com> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-11-05Use the canonical name of the vendors/devices and theUwe Hermann
same format for all CHIP_NAME() entries in LinuxBIOS (Closes #20). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@linuxbios.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11cleanup patch from Uwe Hermann.Stefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-11mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a ↵Eric Biederman
complex expression. crt0.S.lb: Modified so that it is safe to include console.inc console.c: Added print_debug_ and frieds which are non inline variants of the normal console functions div64.h: Only include limits.h if ULONG_MAX is not defined and define ULONG_MAX on ppc socket_754/Config.lb Conditionally set config chip.h socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references. slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops slot_2/slot2.c: The same spelling fix socket_mPGA603/chip.h: again socket_mPGA603/socket_mPGA603_400Mhz.c: and again socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME socket_mPGA604_800Mhz/chip.h: Another spelling fix socket_mPGA604_800Mhz.c and again via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates earlymtrr.c: Remove work around for older versions of romcc pci_ids.h: More ids. malloc.c: We don't need string.h any longer uart8250.c: Be consistent when delcaring functions static inline arima/hdama/mptable.c: Cleanup to be a little more consistent amdk8/coherent_ht.c: - Talk about nodes not cpus (In preparation for dual cores) - Remove clear_temp_row (as it is no longer needed) - Demoted the failure messages to spew. - Modified to gracefully handle failure (It should work now if cpus are removed) - Handle the non-SMP case in verify_mp_capabilities - Add clear_dead_routes which replaces clear_temp_row and does more - Reorganize setup_coherent_ht_domain to cleanly handle failure. - incoherent_ht.c: Clean up the indenation a little. i8259.c: remove blank lines at the start of the file. keyboard.c: Make pc_keyboard_init static ramtest.c: Add a print out limiter, and cleanup the printout a little. amd8111/Config.lb: Mention amd8111_smbus.c amd8111_usb.c: Call the structure usb_ops not smbus_ops. NSC/pc97307/chip.h: Fix spelling issue pc97307/superio.c: Use &ops no &pnp_ops. w83627hf/suerio.c: ditto w83627thf/suerio.c: ditto buildrom.c: Use braces around the body of a for loop. It's more maintainable. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-04- Update abuild.sh so it will rebuild successfull buildsEric Biederman
- Move pci_set_method out of hardwaremain.c - Re-add debugging name field but only include the CONFIG_CHIP_NAME is enabled. All instances are now wrapped in CHIP_NAME - Many minor cleanups so most ports build. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21- Bump the LinuxBIOS major versionEric Biederman
- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- First stab at running linuxbios without the old static device tree.Eric Biederman
Things are close but not quite there yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-12new supportRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-29almost there.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-01-28incomplete (wrong) support for this chip.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1