| Age | Commit message (Collapse) | Author |
|---|
|
Add LPC read/write functions for access aspeed's memory, also
create config data table to config memory and SIO. These
functions are used at early stages to configure devices.
Signed-off-by: Bryant Ou <Bryant.Ou.Q@gmail.com>
Change-Id: Ib59c29a042b2c7bf196b8a5bd5218704d8075855
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40483
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
|
The authors from the header of the files are added in a previous commit.
Change-Id: Iafeaafb9689c65bd2f5de3960097ec0d4c1009e7
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38544
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
|
Working on some other code, I noticed that superio/aspeed was added as
an include path even though I wasn't using it. I investigated and found
that NOTHING is using it. The files in the aspeed directory all
reference files in their own directory.
The supermicro x11-lga1151-series boards are the only ones using this
SIO.
TEST=util/abuild/abuild -t supermicro/x11-lga1151-series
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I377066451a50452c17c9bfaa0f815f69e039984e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37390
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
|
|
Add support for ASpeed AST2400.
This device uses write twice 0xA5 to enter config mode.
BUG = N/A
TEST = ASRock D1521D4U
Change-Id: I58fce31f0a2483e61e9d31f38ab5a059b8cf4f83
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Signed-off-by: Felix Singer <migy@darmstadt.ccc.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/23135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
|
